BT258-800R,127

**10 December 2015** 

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## **IMPORTANT NOTICE** 

## **1.  Global joint venture starts operations as WeEn Semiconductors** 

Dear customer, 

As from November 9th, 2015 NXP Semiconductors N.V. and Beijing JianGuang Asset Management Co. Ltd established Bipolar Power joint venture (JV), **WeEn Semiconductors** , which will be used in future Bipolar Power documents together with new contact details. 

In this document where the previous NXP references remain, please use the new links as shown below. 

**WWW** - For www.nxp.com use www.ween-semi.com **Email** - For salesaddresses@nxp.com use salesaddresses@ween-semi.com 

For the copyright notice at the bottom of each page (or elsewhere in the document, depending on the version) “[©] **NXP Semiconductors N.V.** _**{year}**_ **. All rights reserved** ” becomes “[©] **WeEn Semiconductors Co., Ltd.** _**{year}**_ **. All rights reserved** ” 

If you have any questions related to this document, please contact our nearest sales office via e- mail or phone (details via salesaddresses@ween-semi.com). 

Thank you for your cooperation and understanding, 

WeEn Semiconductors 

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## _**DISCRETE SEMICONDUCTORS**_ 

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DATA SHEET<br>**----- End of picture text -----**<br>


**BT258 series** Thyristors logic level 

Product specification 

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October 2002 

**NXP Semiconductors** 

**Product specification** 

**BT258 series** 

## **Thyristors logic level** 

## **GENERAL DESCRIPTION** 

## **QUICK REFERENCE DATA** 

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||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|
|Passivated,|sensitive|gate|thyristors|SYMBOL|PARAMETER|MAX.|MAX.|MAX.|UNIT|
|in a plastic envelope, intended for use|
|in|general|purpose|switching|and|BT258-|500R|600R|800R|
|phase|control|applications.|These|VDRM,|Repetitive peak off-state|500|600|800|V|
|devices are intended to be interfaced|VRRM|voltages|
|directly|to|microcontrollers,|logic|IT(AV)|Average on-state current|5|5|5|A|
|integrated|circuits|and|other|low|IT(RMS)|RMS on-state current|8|8|8|A|
|power gate trigger circuits.|ITSM|Non-repetitive peak on-state|75|75|75|A|
|current|

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## **PINNING - TO220AB** 

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PIN CONFIGURATION SYMBOL<br>tab<br>**----- End of picture text -----**<br>


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||||||
|---|---|---|---|---|
|PIN|DESCRIPTION|
|tab|
|1|cathode|
|2|anode|
|3|gate|
|tab|anode|1|2|3|

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|||
|---|---|
|a|k|
|g|

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## **LIMITING VALUES** Limiting values in accordance with the Absolute Maximum System (IEC 134). 

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|---|---|---|---|---|---|---|---|---|---|---|---|
|SYMBOL|PARAMETER|CONDITIONS|MIN.|MAX.|UNIT|
|-500R|-600R|-800R|
|VDRM, VRRM|Repetitive peak off-state|-|500|[1]|600|[1]|800|V|
|voltages|
|IT(AV)|Average on-state current|half sine wave; Tmb|≤ 111 ˚C|-|5|A|
|IT(RMS)|RMS on-state current|all conduction angles|-|8|A|
|ITSM|Non-repetitive peak|half sine wave; Tj = 25 ˚C prior to|
|on-state current|surge|
|t = 10 ms|-|75|A|
|t = 8.3 ms|-|82|A|
|I|[2]|t|I|[2]|t for fusing|t = 10 ms|-|28|A|[2]|s|
|dIT/dt|Repetitive rate of rise of|ITM = 10 A; IG = 50 mA;|-|50|A/µs|
|on-state current after|dIG/dt = 50 mA/µs|
|triggering|
|IGM|Peak gate current|-|2|A|
|VRGM|Peak reverse gate voltage|-|5|V|
|PGM|Peak gate power|-|5|W|
|PG(AV)|Average gate power|over any 20 ms period|-|0.5|W|
|Tstg|Storage temperature|-40|150|˚C|
|Tj|Operating junction|-|125|[2]|˚C|
|temperature|

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> **1** Although not recommended, off-state voltages up to 800V may be applied without damage, but the thyristor may switch to the on-state. The rate of rise of current should not exceed 15 A/µs. 

> **2** Note: Operation above 110˚C may require the use of a gate to cathode resistor of 1kΩ or less. 

October 2002 

Rev 2.000 

1 

NXP Semiconductors Product specification BT258 series 

## Thyristors logic level 

## **THERMAL RESISTANCES** 

||**SYMBOL**<br>**PARAMETER**|**SYMBOL**<br>**PARAMETER**||||**CONDITIONS**|**CONDITIONS**||||||||**MIN.**||**TYP.**|**TYP.**||**MAX.**|**MAX.**|**UNIT**||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
||Rth j-mb<br>Thermal resistance<br>junction to mounting base||||||||||||||-||-|||2.0||K/W||||
||Rth j-a|Thermal resistance<br>junction to ambient||||in free air|||||||||-||60|||-||K/W||||
||**STATIC CHARACTERISTICS**|||||||||||||||||||||||||
||Tj= 25 ˚C unless otherwise stated<br>**SYMBOL**<br>**PARAMETER**|||||**CONDITIONS**|||||||||**MIN.**||**TYP.**|||**MAX.**||**UNIT**||||
||IGT|Gate trigger current||||VD= 12 V; IT= 0.1 A|||||||||-||50|||200||µA||||
||IL|Latching current||||VD= 12 V; IGT=|||0.1 A||||||-||0.4|||10||mA||||
||IH|Holding current||||VD= 12 V; IGT=|||0.1 A||||||-||0.3|||6||mA||||
||VT|On-state voltage||||IT= 16 A|||||||||-||1.3|||1.6||V||||
||VGT|Gate trigger voltage||||VD= 12 V; IT= 0.1 A|||||||||-||0.4|||1.5||V||||
||ID, IR|Off-state leakage current||||VD= VDRM(max); IT= 0.1 A; Tj= 110 ˚C<br>VD= VDRM(max); VR= VRRM(max); Tj= 125 ˚C|||||||||0.1<br>-||0.2<br>0.1|||-<br>0.5||V<br>mA||||



## **DYNAMIC CHARACTERISTICS** 

## Tj = 25 ˚C unless otherwise stated 

|**SYMBOL**<br>**PARAMETER**|**SYMBOL**<br>**PARAMETER**||||**CONDITIONS**||||||||**MIN.**||**TYP.**|**TYP.**||**MAX.**|**MAX.**|**UNIT**||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|dVD/dt<br>Critical rate of rise of<br>off-state voltage|||||VDM= 67% VDRM(max); Tj= 125<br>exponential waveform; RGK=||||||˚C;<br>100|Ω|50||100|||-||V/µs||
|tgt|Gate controlled turn-on<br>time||||ITM= 10 A; VD= VDRM(max);<br>dIG/dt = 0.2 A/µs|||||IG=|5 mA;||-||2|||-||µs||
|tq|Circuit commutated<br>turn-off time||||VD= 67% VDRM(max); Tj= 125 ˚C;<br>ITM= 12 A; VR= 24 V; dITM/dt = 10 A/µs;<br>dVD/dt = 2 V/µs; RGK= 1 kΩ||||||||-||100|||-||µs||



October 2002 

Rev 2.000 

2 

NXP Semiconductors 

Product specification 

## Thyristors logic level 

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Ptot (W) Tmb(max) (˚C)<br>8 109<br>conduction form a = 1.57<br>6 angledegrees609030 factor2.82.2(a)4 2.2 1.9 111113<br>120 1.9 2.8<br>180 1.57 115<br>4<br>4 117<br>119<br>2 121<br>123<br>0 125<br>0 2 4 IT(AV) (A) 6<br>Fig.1.  Maximum on-state dissipation, Ptot, versus<br>average on-state current, IT(AV), where<br>a = form factor = IT(RMS)/ IT(AV).<br>ITSM / A<br>1000<br>dI  /dt limitT<br>100<br>IT ITSM<br>T time<br>Tj initial = 25 C max<br>10<br>10us 100us 1ms 10ms<br>T / s<br>**----- End of picture text -----**<br>


_Fig.2.   Maximum permissible non-repetitive peak on-state current ITSM, versus pulse width tp, for sinusoidal currents, tp_ ≤ _10ms._ 

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IT(RMS) / A BT258<br>9<br>111 C<br>8<br>7<br>6<br>5<br>4<br>3<br>2<br>1<br>0<br>-50 0 50 100 150<br>Tmb / C<br>**----- End of picture text -----**<br>


_Fig.3.  Maximum permissible rms current IT(RMS) , versus mounting base temperature Tmb._ 

## BT258 series 

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ITSM / A<br>80<br>70 IT ITSM<br>60 T time<br>50 Tj initial = 25 C max<br>40<br>30<br>20<br>10<br>0<br>1 10 100 1000<br>Number of half cycles at 50Hz<br>**----- End of picture text -----**<br>


_Fig.4.   Maximum permissible non-repetitive peak on-state current ITSM, versus number of cycles, for sinusoidal currents, f = 50 Hz._ 

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24 IT(RMS) / A<br>20<br>16<br>12<br>8<br>4<br>0<br>0.01 0.1 1 10<br>surge duration / s<br>**----- End of picture text -----**<br>


_Fig.5.   Maximum permissible repetitive rms on-state current IT(RMS), versus surge duration, for sinusoidal currents, f = 50 Hz; Tmb_ ≤ _111˚C._ 

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VGT(Tj)<br>1.6 VGT(25 C)<br>1.4<br>1.2<br>1<br>0.8<br>0.6<br>0.4<br>-50 0 50 100 150<br>Tj / C<br>**----- End of picture text -----**<br>


_Fig.6.  Normalised gate trigger voltage VGT(Tj)/ VGT(25˚C), versus junction temperature Tj._ 

October 2002 

Rev 2.000 

3 

NXP Semiconductors 

Product specification 

## Thyristors logic level 

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IGT(Tj)<br>IGT(25 C)<br>3<br>2.5<br>2<br>1.5<br>1<br>0.5<br>0<br>-50 0 50 100 150<br>Tj / C<br>**----- End of picture text -----**<br>


_Fig.7.   Normalised gate trigger current IGT(Tj)/ IGT(25˚C), versus junction temperature Tj_ . 

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IL(Tj)<br>IL(25 C) BT150<br>3<br>2.5<br>2<br>1.5<br>1<br>0.5<br>0<br>-50 0 50 100 150<br>Tj / C<br>Fig.8.   Normalised latching current IL(Tj)/ IL(25˚C),<br>versus junction temperature Tj .<br>**----- End of picture text -----**<br>


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IH(Tj)<br>IH(25 C)<br>3<br>2.5<br>2<br>1.5<br>1<br>0.5<br>0<br>-50 0 50 100 150<br>Tj / C<br>Fig.9.   Normalised holding current IH(Tj)/ IH(25˚C),<br>versus junction temperature Tj .<br>**----- End of picture text -----**<br>


BT258 series 

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IT / A<br>30<br>Tj = 125 °C<br>Tj = 25 °C<br>20<br>typ<br>max<br>10<br>Vo = 1 V<br>Rs = 0.04 Ω<br>0<br>0 0.5 1 1.5 2<br>VT / V<br>**----- End of picture text -----**<br>


_Fig.10.  Typical and maximum on-state characteristic._ 

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10 Zth j-mb  (K/W)<br>1<br>0.1 PD t p<br>t<br>0.01<br>10us 0.1ms 1ms 10ms 0.1s 1s 10s<br>tp / s<br>**----- End of picture text -----**<br>


_Fig.11.  Transient thermal impedance Zth j-mb, versus pulse width tp._ 

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1000 dVD/dt (V/us)<br>RGK = 100 ohms<br>100<br>10<br>1<br>0 50 100 150<br>Tj / C<br>Fig.12.  Typical, critical rate of rise of off-state voltage,<br>dVD/dt versus junction temperature Tj.<br>**----- End of picture text -----**<br>


October 2002 

Rev 2.000 

4 

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NXP  Semiconductors<br>**----- End of picture text -----**<br>


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NXP  Semiconductors Product specification<br>Thyristors BT258 series<br> logic level<br>MECHANICAL DATA<br>Dimensions in mm<br>4,5<br>Net Mass: 2 g max<br>10,3<br>max<br>1,3<br>3,7<br>2,8<br>5,9<br>min<br>15,8<br>max<br>3,0 max<br>3,0<br>not tinned<br>13,5<br>min<br>1,3<br>max 1 2 3<br>(2x) 0,9 max (3x)<br>0,6<br>2,4<br>2,54 2,54<br>Fig.13.  SOT78 (TO220AB). pin 2 connected to mounting base.<br>**----- End of picture text -----**<br>


**Notes** 

1. Refer to mounting instructions for SOT78 (TO220) envelopes. 

2. Epoxy meets UL94 V0 at 1/8". 

October 2002 

Rev 2.000 

5 

NXP Semiconductors 

## Legal information 

## **DATA SHEET STATUS** 

|**DATA SHEET STATUS**|||
|---|---|---|
|**DOCUMENT**<br>**STATUS**(1)|**PRODUCT**<br>**STATUS**(2)|**DEFINITION**|
|Objective data sheet|Development|This document contains data from the objective specification for product<br>development.|
|Preliminarydata sheet|Qualification|This document contains data from thepreliminaryspecification.|
|Product data sheet|Production|This document contains theproduct specification.|



## **Notes** 

1. Please consult the most recently issued document before initiating or completing a design. 

2. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 

## **DEFINITIONS** 

**Product specification** ⎯ The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 

## **DISCLAIMERS** 

**Limited warranty and liability** ⎯ Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. 

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NXP Semiconductors 

## Legal information 

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⎯ **Limiting values** Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. 

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## **Customer notification** 

This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal definitions and disclaimers. No changes were made to the content, except for the legal definitions and disclaimers. 

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## © NXP B.V. 2011 

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