BT152-400R,127

_**DISCRETE SEMICONDUCTORS**_ — kk; —_— 

**BT152 series** Thyristors 

Product specification 

**==> picture [76 x 12] intentionally omitted <==**

**----- Start of picture text -----**<br>
March 1997<br>**----- End of picture text -----**<br>


**��� Semiconductors** 

**Product specification** 

**BT152 series** 

## **Thyristors** 

## **GENERAL DESCRIPTION** 

## **QUICK REFERENCE DATA** 

|Glasspassivatedthyristorsinaplastic<br>envelope,<br>intended<br>for<br>use<br>in<br>applications<br>requiring<br>high<br>bidirectional<br>blocking<br>voltage<br>capability and high thermal cycling<br>performance.<br>Typical<br>applications<br>include motor control, industrial and<br>domestic lighting, heating and static<br>switching.|**SYMBOL**<br>VDRM,<br>VRRM<br>IT(AV)<br>IT(RMS)<br>ITSM|**PARAMETER**|**MAX.**|**MAX.**|**MAX. **|**UNIT**<br>V<br>A<br>A<br>A|
|---|---|---|---|---|---|---|
|||**BT152-**<br>Repetitive peak off-state<br>voltages<br>Average on-state current<br>RMS on-state current<br>Non-repetitive peak on-state<br>current|**400R**<br>450<br>13<br>20<br>200|**600R**<br>650<br>13<br>20<br>200|**800R**<br>800<br>13<br>20<br>200||



||**PINNING - TO220AB**<br>**PIN**<br>**DESCRIPTION**<br>1<br>cathode<br>2<br>anode<br>3<br>gate<br>tab<br>anode|**PINNING - TO220AB**<br>**PIN**<br>**DESCRIPTION**<br>1<br>cathode<br>2<br>anode<br>3<br>gate<br>tab<br>anode|**PIN CONFIGURATION**<br>**SYMBOL**<br>a<br>k<br>g<br>1 2 3<br>tab|
|---|---|---|---|
|||**PIN**<br>1<br>2<br>3<br>tab||



## **LIMITING VALUES** 

Limiting values in accordance with the Absolute Maximum System (IEC 134). 

||**SYMBOL**<br>**PARAMETER**|**SYMBOL**<br>**PARAMETER**|**SYMBOL**<br>**PARAMETER**|**SYMBOL**<br>**PARAMETER**|**SYMBOL**<br>**PARAMETER**||**CONDITIONS**|**CONDITIONS**|**CONDITIONS**|||**MIN.**|**MIN.**|**MIN.**||||**MAX.**|**MAX.**||||**UNIT**|**UNIT**|**UNIT**|**UNIT**|||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|||||||||||||||**-400R**||||**-600R**<br>**-800R**|||||||||||
||VDRM|Repetitive peak off-state|||||||||||-|4501||||6501||800||||V|||||
|||voltages|||||||||||||||||||||||||||
||IT(AV)<br>IT(RMS)<br>ITSM|Average on-state current<br>RMS on-state current<br>Non-repetitive peak<br>on-state current|||||half sine wave; Tmb ≤103 ˚C<br>all conduction angles<br>half sine wave; Tj= 25 ˚C prior to<br>surge||||||-<br>-|||||13<br>20||||||A<br>A|||||
||||||||t|= 10 ms|||||-|||||200||||||A|||||
||||||||t|= 8.3 ms|||||-|||||220||||||A|||||
||I2t|I2t||for fusing|||t|= 10 ms|||||-|||||200||||||A2s|||||
||dIT/dt|Repetitive rate of rise of|||||ITM= 50 A; IG= 0.2 A;||||||-|||||200|||||A/μs||||||
|||on-state current after|||||dIG/dt = 0.2 A/μs||||||||||||||||||||||
|||triggering|||||||||||||||||||||||||||
||IGM|Peak gate current|||||||||||-|||||5||||||A|||||
||VGM|Peak gate voltage|||||||||||-|||||5||||||V|||||
||VRGM|Peak reverse gate voltage|||||||||||-|||||5||||||V|||||
||PGM|Peak gate power|||||||||||-|||||20||||||W|||||
||PG(AV)<br>Tstg<br>Tj|Average gate power<br>Storage temperature<br>Operating junction|||||over any||20 ms period||||-<br>-40<br>-|||||0.5<br>150<br>125||||||W<br>˚C<br>˚C|||||
|||temperature|||||||||||||||||||||||||||



> **1** Although not recommended, off-state voltages up to 800V may be applied without damage, but the thyristor may switch to the on-state. The rate of rise of current should not exceed 15 A/μs. 

March 1997 

Rev 1.200 

1 

��� Semiconductors 

Product specification 

## Thyristors 

## BT152 series 

## **THERMAL RESISTANCES** 

||**SYMBOL**<br>**PARAMETER**<br>**CONDITIONS**<br>**MIN.**<br>**TYP.**<br>**MAX.**<br>**UNIT**<br>Rth j-mb<br>Thermal resistance<br>-<br>-<br>1.1<br>K/W<br>junction to mounting base<br>Rth j-a<br>Thermal resistance<br>in free air<br>-<br>60<br>-<br>K/W<br>junction to ambient|
|---|---|



## **STATIC CHARACTERISTICS** 

T = 25 ˚C unless otherwise stated j 

||**SYMBOL**<br>**PARAMETER**<br>**CONDITIONS**<br>**MIN.**<br>**TYP.**<br>**MAX.**<br>**UNIT**<br>IGT<br>Gate trigger current<br>VD= 12 V; IT= 0.1 A<br>-<br>3<br>32<br>mA<br>IL<br>Latching current<br>VD= 12 V; IGT= 0.1 A<br>-<br>25<br>80<br>mA<br>IH<br>Holding current<br>VD= 12 V; IGT= 0.1 A<br>-<br>15<br>60<br>mA<br>VT<br>On-state voltage<br>IT= 40 A<br>-<br>1.4<br>1.75<br>V<br>VGT<br>Gate trigger voltage<br>VD= 12 V; IT= 0.1 A<br>-<br>0.6<br>1.5<br>V<br>VD= VDRM(max); IT= 0.1 A; Tj= 125 ˚C<br>0.25<br>0.4<br>-<br>V<br>ID, IR<br>Off-state leakage current<br>VD= VDRM(max); VR= VRRM(max); Tj= 125 ˚C<br>-<br>0.2<br>1.0<br>mA|
|---|---|



## **DYNAMIC CHARACTERISTICS** 

Tj = 25 ˚C unless otherwise stated 

|**SYMBOL**<br>**PARAMETER**|**SYMBOL**<br>**PARAMETER**|**SYMBOL**<br>**PARAMETER**|**SYMBOL**<br>**PARAMETER**|**SYMBOL**<br>**PARAMETER**||**CONDITIONS**|||**MIN.**|**MIN.**|**MIN.**||**TYP.**|**TYP.**|**TYP.**||**MAX.**|**MAX.**|**MAX.**||**UNIT**|**UNIT**|**UNIT**|||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|dVD/dt||Critical rate of rise<br>off-state voltage|||of|VDM= 67% VDRM(max); Tj= 125 ˚C;<br>exponential waveform gate open circuit||||200||||300||||-|||V/μs|||||
|tgt||Gate controlled turn-on<br>time||||VD= VDRM(max); IG= 0.1 A; dIG/dt = 5 A/μs;<br>ITM= 40 A||||-||||2||||-||||μs||||
|tq||Circuit commutated<br>turn-off time||||VD= 67% VDRM(max); Tj= 125 ˚C;<br>ITM= 50 A; VR= 25 V; dITM/dt = 30 A/μs;||||-||||70||||-||||μs||||
|||||||dVD/dt = 50 V/μs; RGK= 100Ω||||||||||||||||||||



March 1997 

Rev 1.200 

2 

NXP Semiconductors 

Product specification 

## Thyristors 

## BT152 series 

**==> picture [687 x 192] intentionally omitted <==**

**----- Start of picture text -----**<br>
25 Ptot / W BT152 Tmb(max) / C97.5 250 ITSM / A BT152<br>conductionangle formfactor IT ITSM<br>degrees a a = 1.57<br>20 30 60 4 2.8 1.9 103 200 T time<br>90120 2.21.9 2.2 Tj initial =  25 C max<br>15 180 1.57 108.5 150<br>2.8<br>4<br>10 114 100<br>5 119.5 50<br>0 0 5 10 15125 01 10 100 1000<br>IT(AV) / A Number of half cycles at 50Hz<br>Fig.1.  Maximum on-state dissipation, Ptot, versus Fig.4.   Maximum permissible non-repetitive peak<br>average on-state current, IT(AV), where on-state current ITSM, versus number of cycles, for<br>a = form factor = IT(RMS)/ IT(AV). sinusoidal currents, f = 50 Hz.<br>**----- End of picture text -----**<br>


**==> picture [196 x 148] intentionally omitted <==**

**----- Start of picture text -----**<br>
ITSM / A BT152<br>1000<br>dI  /dt limit T<br>100<br>I T I TSM<br>T time<br>Tj initial =  25 C max<br>10<br>10us 100us 1ms 10ms<br>T / s<br>**----- End of picture text -----**<br>


Fig.2.   Maximum permissible non-repetitive peak on-state current ITSM, versus pulse width tp, for sinusoidal currents, tp ≤ 10ms. 

**==> picture [193 x 149] intentionally omitted <==**

**----- Start of picture text -----**<br>
50 IT(RMS) / A BT152<br>40<br>30<br>20<br>10<br>0<br>0.01 0.1 1 10<br>surge duration / s<br>**----- End of picture text -----**<br>


Fig.5.   Maximum permissible repetitive rms on-state current IT(RMS), versus surge duration, for sinusoidal currents, f = 50 Hz; Tmb ≤ 103˚C. 

**==> picture [315 x 182] intentionally omitted <==**

**----- Start of picture text -----**<br>
IT(RMS) / A BT152<br>25<br>103 C<br>20<br>15<br>10<br>5<br>0<br>-50 0 50 100 150<br>Tmb / C<br>Fig.3.  Maximum permissible rms current IT(RMS) ,<br>versus mounting base temperature Tmb.<br>**----- End of picture text -----**<br>


**==> picture [329 x 182] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGT(Tj)<br>1.6 VGT(25 C) BT151<br>1.4<br>1.2<br>1<br>0.8<br>0.6<br>0.4<br>-50 0 50 100 150<br>Tj / C<br>Fig.6.  Normalised gate trigger voltage<br>VGT(Tj)/ VGT(25˚C), versus junction temperature Tj.<br>**----- End of picture text -----**<br>


March 1997 

Rev 1.200 

3 

����Semiconductors 

Product specification 

## Thyristors 

## BT152 series 

**==> picture [678 x 182] intentionally omitted <==**

**----- Start of picture text -----**<br>
IGT(Tj) IT / A BT152<br>IGT(25 C) BT152 50<br>3 Tj = 125 C<br>Tj = 25 C<br>2.5 40 Vo = 1.12 V<br>Rs = 0.015 ohms<br>2 30 typ max<br>1.5<br>20<br>1<br>10<br>0.5<br>0 0<br>-50 0 50 100 150 0 0.5 1 1.5 2<br>Tj / C VT / V<br>Fig.7.   Normalised gate trigger current Fig.10.  Typical and maximum on-state characteristic.<br>IGT(Tj)/ IGT(25˚C), versus junction temperature Tj.<br>**----- End of picture text -----**<br>


**==> picture [678 x 182] intentionally omitted <==**

**----- Start of picture text -----**<br>
ILIL(25 C(Tj) ) BT145 10 Zth j-mb (K/W) BT152<br>3<br>2.5 1<br>2<br>0.1<br>1.5<br>1 P D t p<br>0.01<br>0.5 t<br>0 0.001<br>-50 0 50 100 150 10us 0.1ms 1ms 10ms 0.1s 1s 10s<br>Tj / C tp / s<br>Fig.8.   Normalised latching current IL(Tj)/ IL(25˚C), Fig.11.  Transient thermal impedance Zth j-mb, versus<br>versus junction temperature Tj. pulse width tp.<br>**----- End of picture text -----**<br>


**==> picture [318 x 182] intentionally omitted <==**

**----- Start of picture text -----**<br>
IH(Tj)<br>IH(25 C) BT152<br>3<br>2.5<br>2<br>1.5<br>1<br>0.5<br>0<br>-50 0 50 100 150<br>Tj / C<br>Fig.9.   Normalised holding current IH(Tj)/ IH(25˚C),<br>versus junction temperature Tj.<br>**----- End of picture text -----**<br>


**==> picture [329 x 181] intentionally omitted <==**

**----- Start of picture text -----**<br>
10000 dVD/dt (V/us)<br>RGK = 100 Ohms<br>1000<br>gate open circuit<br>100<br>10<br>0 50 100 150<br>Tj / C<br>Fig.12.  Typical, critical rate of rise of off-state voltage,<br>dVD/dt versus junction temperature Tj.<br>**----- End of picture text -----**<br>


March 1997 

Rev 1.200 

4 

����Semiconductors 

Product specification 

## Thyristors 

## BT152 series 

## **MECHANICAL DATA** 

**==> picture [481 x 349] intentionally omitted <==**

**----- Start of picture text -----**<br>
Dimensions in mm<br>4,5<br>Net Mass: 2 g max<br>10,3<br>max<br>1,3<br>3,7<br>2,8<br>5,9<br>min<br>15,8<br>max<br>3,0 max<br>3,0<br>not tinned<br>13,5<br>min<br>1,3<br>max 1 2 3<br>(2x) 0,9 max (3x)<br>0,6<br>2,4<br>2,54 2,54<br>**----- End of picture text -----**<br>


**==> picture [233 x 10] intentionally omitted <==**

**----- Start of picture text -----**<br>
Fig.13.  TO220AB; pin 2 connected to mounting base.<br>**----- End of picture text -----**<br>


## **Notes** 

1. Refer to mounting instructions for TO220 envelopes. 

2. Epoxy meets UL94 V0 at 1/8". 

March 1997 

Rev 1.200 

5 

NXP Semiconductors 

## Legal information 

## **DATA SHEET STATUS** 

|**DATA SHEET STATUS**|||
|---|---|---|
|**DOCUMENT**<br>**STATUS**(1)|**PRODUCT**<br>**STATUS**(2)|**DEFINITION**|
|Objective data sheet|Development|This document contains data from the objective specification for product<br>development.|
|Preliminarydata sheet|Qualification|This document contains data from the preliminaryspecification.|
|Product data sheet|Production|This document contains the product specification.|



## **Notes** 

1. Please consult the most recently issued document before initiating or completing a design. 

2. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 

## **DEFINITIONS** 

**Product specification** ⎯ The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 

## **DISCLAIMERS** 

**Limited warranty and liability** ⎯ Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. 

In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. 

Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the _Terms and conditions of commercial sale_ of NXP Semiconductors. 

**Right to make changes** ⎯ NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. 

**Suitability for use** ⎯ NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. 

**Applications** ⎯ Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 

Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. 

NXP Semiconductors 

## Legal information 

NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. 

**Limiting values** ⎯ Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. 

**Terms and conditions of commercial sale** ⎯ NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. 

**No offer to sell or license** ⎯ Nothing in this document may be interpreted or construed as an offer to sell products 

that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 

**Export control** ⎯ This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 

**Quick reference data** ⎯ The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 

**Non-automotive qualified products** ⎯ Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. 

In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. 

## **Customer notification** 

This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal definitions and disclaimers. No changes were made to the content, except for the legal definitions and disclaimers. 

## **Contact information** 

For additional information please visit: **http://www.nxp.com** For sales offices addresses send e-mail to: **salesaddresses@nxp.com** 

## © NXP B.V. 2011 

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. 

Printed in The Netherlands