BSS123L

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## N-Channel Logic Level Enhancement Mode Field Effect Transistor 

## BSS123L 

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D<br>G<br>S<br>N−Channel<br>**----- End of picture text -----**<br>


## **Description** 

This N−channel enhancement mode field effect transistor is produced using high cell density, trench MOSFET technology. This product minimizes on−state resistance while providing rugged, reliable and fast switching performance. This product is particularly suited for low−voltage, low−current applications such as small servo motor control, power MOSFET gate drivers, logic level transistor, high speed line drivers, power management/power supply and switching applications. 

## **Features** 

- 0.17 A, 100 V 

   - ♦ RDS(on) = 6 � @ VGS = 10 V 

   - ♦ RDS(on) = 10 � @ VGS = 4.5 V 

- High Density Cell Design for Low RDS(ON) 

- Rugged and Reliable 

- Compact Industry Standard SOT−23 Surface Mount Package 

- Very Low Capacitance 

- Fast Switching Speed 

- This Device is Pb−Free and Halogen Free 

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SOT−23−3<br>CASE 318−08<br>**----- End of picture text -----**<br>


## **MARKING DIAGRAM** 

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3<br>Drain<br>SB M �<br>�<br>1 2<br>Gate Source<br>SB = Specific Device Code<br>M = Date Code*<br>� = Pb−Free Package<br>**----- End of picture text -----**<br>


(Note: Microdot may be in either location) 

*Date Code orientation and/or position may vary depending upon manufacturing location. 

## **ORDERING INFORMATION** 

|**Device**|**Package**|**Shipping**†|
|---|---|---|
|BSS123L|SOT−23−3<br>(Pb−Free)|3000 /<br>Tape & Reel|



- †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. 

Publication Order Number: **BSS123L/D** 

**1** 

© Semiconductor Components Industries, LLC, 2014 **November, 2021 − Rev. 2** 

**BSS123L** 

## **ABSOLUTE MAXIMUM RATINGS** (TA = 25 ° C unless otherwise noted) 

|**ABSOLUTE**|**MAXIMUM RATINGS**(TA= 25°C unless otherwise noted)|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|VDSS|Drain−Source Voltage|100|V|
|VGSS|Gate−Source Voltage|±20|V|
|ID|Maximum Drain Current – Continuous|0.17|A|
||Maximum Drain Current – Pulsed|0.68||
|TJ, TSTG|Operating and Storage Temperature Range|−55 to +150|°C|
|TL|Maximum Lead Temperature for Soldering Purposes,<br>1/16” from Case for 10 s|300|°C|



Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

**THERMAL CHARACTERISTICS** (TA = 25 ° C unless otherwise noted) 

|**THERMAL C**|**HARACTERISTICS**(TA= 25°C unless otherwise noted)|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|PD|Maximum Power Dissipation (Note 1)|0.36|W|
||Derate Above 25°C|2.8|mW/°C|
|R�JA|Thermal Resistance, Junction−to−Ambient (Note 1)|380|°C/W|



## **ESD RATING** (Note 2) 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|HBM|Human Body Model per ANSI/ESDA/JEDEC JS−001−2012|50|V|
|CDM|Charged Device Model per JEDEC C101C|>2000|V|



## **ELECTRICAL CHARACTERISTICS** (TA = 25 ° C unless otherwise noted) 

|**ELECTRICA**|**ELECTRICA**|**L CHARACTERISTICS**(TA= 25°C unles|s otherwise noted)|||||
|---|---|---|---|---|---|---|---|
|**Symbol**||**Parameter**|**Test Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
||BVDSS|Drain–Source Breakdown Voltage|VGS= 0 V, ID= 250�A|100|103|−|V|
||�BVDSS<br>�TJ|Breakdown Voltage Temperature<br>Coefficient|ID= 250μA,<br>Referenced to 25°C|−|100|−|mV/°C|
||IDSS|Zero Gate Voltage Drain Current|VDS= 100 V, VGS= 0 V|−|0.027|1|�A|
||||VDS= 100 V, VGS= 0 V,<br>TJ= 125°C|−|0.159|60||
||||VDS= 20 V, VGS= 0 V|−|0.07|10|nA|
||IGSSF|Gate–Body Leakage, Forward|VGS= 20 V, VDS= 0 V|−|0.036|50|nA|
||IGSSR|Gate–Body Leakage, Reverse|VGS= −20 V, VDS= 0 V|−|−0.019|−50|nA|
|**ON CHARACTERISTICS**(Note 3)||||||||
||VGS(th)|Gate Threshold Voltage|VDS= VGS,ID= 1 mA|0.8|1.405|2|V|
||�VGS(th)<br>�TJ|Gate Threshold Voltage Temperature<br>Coefficient|ID= 1 mA,<br>Referenced to 25°C|−|–2.82|−|mV/°C|
||RDS(on)|Static Drain–Source On–Resistance|VGS= 10 V, ID= 0.17 A|−|2.98|6|�|
||||VGS= 4.5 V, ID= 0.17 A|−|3.17|10||
||||VGS= 10 V, ID= 0.17 A,<br>TJ= 125°C|−|5.63|12||
||ID(ON)|On–State Drain Current|VGS= 10 V, VDS= 5 V|0.680|0.735|−|A|
||gFS|Forward Transconductance|VDS= 10 V, ID= 0.17 A|0.08|2.13|−|S|



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**2** 

**BSS123L** 

**ELECTRICAL CHARACTERISTICS** (TA = 25 ° C unless otherwise noted) (continued) 

|**ELECTRICA**|**L CHARACTERISTICS**(TA= 25°C unles|s otherwise noted) (continued)|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|**DYNAMIC CHARACTERISTICS**|||||||
|Ciss|Input Capacitance|VDS= 25 V, VGS= 0 V,<br>f = 1.0 MHz|−|21.5|−|pF|
|Coss|Output Capacitance||−|3.52|−||
|Crss|Reverse Transfer Capacitance||−|1.67|−||
|RG|Gate Resistance|VGS= 15 mV, f = 1.0 MHz|−|7.18|−|�|
|**SWITCHING CHARACTERISTICS**(Note 3)|||||||
|td(on)|Turn–On Delay|VDD= 30 V, ID= 0.28 A,<br>VGS= 10 V, RGEN= 6�|−|2.2|3.4|ns|
|tr|Turn–On Rise Time||−|1.7|18||
|td(off)|Turn–Off Delay||−|5.9|31||
|tf|Turn–Off Fall Time||−|5.6|5||
|Qg|Total Gate Charge|VDS= 30 V, ID= 0.22 A,<br>VGS= 10 V|−|0.793|2.5|nC|
|Qgs|Gate–Source Charge||−|0.092|−||
|Qgd|Gate–Drain Charge||−|0.171|−||
|**DRAIN−SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS**|||||||
|VSD|Drain–Source Diode Forward Voltage|VGS=0V, IS= 440 mA<br>(Note 1)|−|0.867|1.3|V|
|Trr|Diode Reverse Recovery Time|IF= 0.2 A, dif/dt= 100 A/�s|−|11.9|−|ns|
|Qrr|Diode Reverse Recovery Charge||−|1.3|−|nC|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 1. R � JA is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R � JC is guaranteed by design while R � CA is determined by the user’s board design. a) 380 ° C/W when mounted on a minimum pad. 

2. ESD values are in typical, no over−voltage rating is implied, ESD CDM zap voltage is 2000 V maximum. 

3. Pulse test: pulse width ≤ 300 ms, duty cycle ≤ 2.0%. 

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**3** 

**BSS123L** 

## **TYPICAL CHARACTERISTICS** 

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**Figure 3. On−Resistance Variation with Temperature** 

**Figure 4. On−Resistance Variation with Gate−to−Source Voltage** 

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1.0<br>0.8 Se<br>0.6<br>0.4 a Va2<br>0.2 |<br>f |<br>0 ID)<br>ZA<br>0 1 2 3 4<br>VGS, Gate To Source Voltage (V)<br>, Drain Current (A)<br>ID<br>**----- End of picture text -----**<br>


**Figure 5. Transfer Characteristics** 

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1 PSA<br>0.1<br>0.01<br>fht f f<br>0.001<br>fff<br>0.0001 FFE[7f/ | 7 [Pf | |<br>0.2 0.4 0.6 0.8 1.0 1.2<br>VSD, Body Diode Forward Voltage (V)<br>, Reverse Drain Current (A)<br>IS<br>**----- End of picture text -----**<br>


**Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature** 

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**4** 

**BSS123L** 

## **TYPICAL CHARACTERISTICS** (continued) 

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10 100 —— a<br>ee<br>8 FL dt poa e Pta eeeeAeeeeOEE eEett|ELA<br>6 | 10 HIATE EI LETT<br>4 i/ p———— a EHHaeset SeeeaeS| SHHpTa<br>2 / pt<br>1MHz<br>f= See eee alee oe<br>0 1<br>0 0.5 1 1.5 2 0.1 ver LUE 1 ET ihe 10 Perl 100<br>Qg, Gate Charge (nC) VSD, Drain To Source Voltage (V)<br>Capacitance (pF)<br>, Gate−Source Voltage (V)<br>GS<br>V<br>**----- End of picture text -----**<br>


**Figure 7. Gate Charge Characteristics** 

**Figure 8. Capacitance Characteristics** 

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1<br>Sees<br>SPSE 4SNNN Xv<br>rtiimSO1) Ze=>NNNNTiNyi NATSN NTTUIN..4W.\ toons 100 ———SSPSECa sos |aeeor0re aeeo<br>0.1 ee eee LT NUTTPP<br>= SER RY TT ETP PT PP AR<br>=oeRosioy LIMITee 10 LIAISEae eeEVI TETee TUeel eee<br>Pt Zt a<br>SINGLE PULSE aNSANSONNS Cc|set<br>0.01 AT || Rect coo UL SUH rome es<br>1<br>=Aae ne=es 28c SE 100m sineteRug = 380°C Pulse {il | {HM | HINT rr<br>Poteet W SEEeee<br>108 Sasoec TATE<br>| 7 rrirmm ofr retry 7 fiyy boc ane Ce Crere t<br>0.001 SBANT 0.1 CCM CTCECONO<br>0.01 0.1 1 10 100 300 0.0001 0.001 0.01 0.1 1 10 EC 100 1000<br>VDS, Drain−Source Voltage (V) t, Time (s)<br>Figure 9. Maximum Safe Operating Area Figure 10. Single Pulse Maximum Power<br>Dissipation<br>10 FE<br>PF<br>|<br>Pt Tt ee eae ee<br>1<br>ee eT<br>a a ce =<br>= SFr rt} HH HA} HH} TH<br>0.1 Rae ea<br>eee aa | ll<br>P= 0.05 SedFS eh dd<br>Fos eeriety =o Tdeae<br>|<br>em ee<br>singioruse |<br>“ (IT | TTT TT TT oT TT oT TTT ET TTT<br>0.01 a<br>0.0001 0.001 0.01 0.1 1 10 100 1000<br>t, Rectangular Pulse Duration (s)<br>, Drain Current (A)<br>ID<br>Peak Transient Power (W)<br>, Normalized Thermal Impedance<br>JA<br>Z<br>**----- End of picture text -----**<br>


**Figure 11. Transient Thermal Response Curve** 

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**5** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

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SOT−23 (TO−236)<br>CASE 318−08<br>ISSUE AS<br>2 DATE 30 JAN 2018<br>SCALE 4:1<br>D NOTES:<br>1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETERS.<br>3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH.<br>0.25 MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF<br>“a 3 t = THE BASE MATERIAL.<br>| E HE T 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,PROTRUSIONS, OR GATE BURRS.<br>1 2<br>MILLIMETERS INCHES<br>DIM MIN NOM MAX MIN NOM MAX<br>L A 0.89 1.00 1.11 0.035 0.039 0.044<br>3X b L1 A1b 0.010.37 0.060.44 0.100.50 0.0000.015 0.0020.017 0.0040.020<br>e VIEW C c 0.08 0.14 0.20 0.003 0.006 0.008<br>TOP VIEW D 2.80 2.90 3.04 0.110 0.114 0.120<br>E 1.20 1.30 1.40 0.047 0.051 0.055<br>e 1.78 1.90 2.04 0.070 0.075 0.080<br>L 0.30 0.43 0.55 0.012 0.017 0.022<br>A L1 0.35 0.54 0.69 0.014 0.021 0.027<br>H E 2.10 2.40 2.64 0.083 0.094 0.104<br>= T 0 ° −−− 10 ° 0 ° −−− 10 °<br>a A1 SIDE VIEW SEE VIEW C c<br>GENERIC<br>END VIEW<br>MARKING DIAGRAM*<br>RECOMMENDED<br>SOLDERING FOOTPRINT XXXM<br>1<br>2.90 i 0.903X XXX = Specific Device Code oo<br>M = Date Code<br>= Pb−Free Package<br>LO | cr ,<br>*This information is generic. Please refer to<br>3X 0.80 a) LL 0.95 device data sheet for actual part marking.<br>PITCH Pb−Free indicator, “G” or microdot “ ”, |<br>DIMENSIONS: MILLIMETERS may or may not be present.<br>STYLE 1 THRU 5: STYLE 6: STYLE 7: STYLE 8:<br>CANCELLED PIN 1. BASE PIN 1. EMITTER PIN 1. ANODE<br>2. EMITTER 2. BASE 2. NO CONNECTION<br>3. COLLECTOR 3. COLLECTOR 3. CATHODE<br>STYLE 9: STYLE 10: STYLE 11: STYLE 12: STYLE 13: STYLE 14:<br>PIN 1. ANODE PIN 1. DRAIN PIN 1. ANODE PIN 1. CATHODE PIN 1. SOURCE PIN 1. CATHODE<br>2. ANODE 2. SOURCE 2. CATHODE 2. CATHODE 2. DRAIN 2. GATE<br>3. CATHODE 3. GATE 3. CATHODE−ANODE 3. ANODE 3. GATE 3. ANODE<br>STYLE 15: STYLE 16: STYLE 17: STYLE 18: STYLE 19: STYLE 20:<br>PIN 1. GATE PIN 1. ANODE PIN 1. NO CONNECTION PIN 1. NO CONNECTION PIN 1. CATHODE PIN 1. CATHODE<br>2. CATHODE 2. CATHODE 2. ANODE 2. CATHODE 2. ANODE 2. ANODE<br>3. ANODE 3. CATHODE 3. CATHODE 3. ANODE 3. CATHODE−ANODE 3. GATE<br>STYLE 21: STYLE 22: STYLE 23: STYLE 24: STYLE 25: STYLE 26:<br>PIN 1. GATE PIN 1. RETURN PIN 1. ANODE PIN 1. GATE PIN 1. ANODE PIN 1. CATHODE<br>2. SOURCE 2. OUTPUT 2. ANODE  2. DRAIN  2. CATHODE  2. ANODE<br>3. DRAIN 3. INPUT 3. CATHODE  3. SOURCE  3. GATE  3. NO CONNECTION<br>STYLE 27: STYLE 28:<br>PIN 1. CATHODE PIN 1. ANODE<br> 2. CATHODE  2. ANODE<br> 3. CATHODE  3. ANODE<br>Electronic versions are uncontrolled except when accessed directly from the Document Repository.<br>DOCUMENT NUMBER: 98ASB42226B Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red.<br>DESCRIPTION: SOT−23 (TO−236) PAGE 1 OF 1<br>aes<br>ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.<br>ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding<br>the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically<br>disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the<br>rights of others.<br>**----- End of picture text -----**<br>


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