BSS123

## **Is Now Part of** 

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June 2003 

## **BSS123** 

## **N-Channel Logic Level Enhancement Mode Field Effect Transistor** 

## **General Description** 

These     N-Channel   enhancement  mode  field effect transistors are produced using  Fairchild’s proprietary, high cell density,  DMOS technology.  These products have been designed  to minimize  on-state  resistance while  provide  rugged,   reliable,  and   fast   switching performance.These products are particularly suited for low  voltage,   low  current  applications such  as small servo motor control, power MOSFET gate drivers, and other switching applications. 

## **Features** 

• 0.17 A, 100 V. RDS(ON) =  6Ω @ VGS = 10 V RDS(ON) =  10Ω @ VGS = 4.5 V • High density cell design for extremely low RDS(ON) 

- Rugged and Reliable 

- Compact industry standard SOT-23 surface mount package 

|**D**||||||||D|D||||||||
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|**S**|||||||||||||||||
|||||G||||||||S|||||
|**G**<br>**SOT-23**|||||||||||||||||
|**Absolute Maximum Ratings**TA=25oC unless otherwise noted|C unless otherwise noted||||||||||||||||
|**Symbol**<br>**Parameter**||||||**Ratings**||||||||||**Units**|
|VDSS<br>Drain-Source Voltage|||||||100|||||||||V|
|VGSS<br>Gate-Source Voltage|||||||±20|||||||||V|
|ID<br>Drain Current<br>– Continuous|(Note 1)||||||0.17|||||||||A|
|– Pulsed|||||||0.68||||||||||
|Maximum Power Dissipation<br>PD|(Note 1)||||||0.36|||||||||W|
|Derate Above 25°C|||||||2.8|||||||||mW/°C|
|TJ, TSTG<br>Operatingand Storage Junction Temperature Ran|erature Range|||||−55 to +150||||||||||°C|
|TL<br>Maximum Lead Temperature for Soldering<br>Purposes,1/16” fromCasefor 10 Seconds|||||||300||||||||||
|**Thermal Characteristics**|||||||||||||||||
|RθJA<br>Thermal Resistance, Junction-to-Ambient|(Note 1)||||||350|||||||||°C/W|



## **Package Marking and Ordering Information** 

|**Device Marking**|**Device**|**Reel Size**|**Tape width**|**Quantity**|
|---|---|---|---|---|
|SA|BSS123|7’’|8mm|3000 units|



BSS123  Rev G(W) 

2003 Fairchild Semiconductor Corporation 

|**Electrical Characteristics**|**Electrical Characteristics**|TA= 25°C unless otherwise noted|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test Conditions**|**Min**|**Typ**|**Max**|**Units**|
|**Off Characteristics**|||||||
|BVDSS|Drain–Source Breakdown Voltage|VGS= 0 V,<br>ID= 250µA|100|||V|
|∆BVDSS<br>∆TJ|Breakdown Voltage Temperature<br>Coefficient|ID= 250µA,Referenced to 25°C||97||mV/°C|
|IDSS|Zero Gate Voltage Drain Current|VDS= 100 V,<br>VGS= 0 V|||1|µA|
|||VDS= 100 V,VGS= 0 V TJ= 125°C|||60|µA|
|||VDS= 20 V,<br>VGS= 0 V|||10|nA|
|IGSS|Gate–BodyLeakage.|VGS=±20 V,<br>VDS= 0 V|||±50|nA|
|**On Characteristics**<br>**(Note 2)**|||||||
|VGS(th)|Gate Threshold Voltage|VDS= VGS,<br>ID= 1 mA|0.8|1.7|2|V|
|∆VGS(th)<br>∆TJ|Gate Threshold Voltage<br>Temperature Coefficient|ID= 1 mA,Referenced to 25°C||–2.7||mV/°C|
|RDS(on)|Static Drain–Source<br>On–Resistance|VGS= 10 V,<br>ID= 0.17 A<br>VGS= 4.5 V,<br>ID= 0.17 A<br>VGS= 10 V,ID= 0.17 A,TJ= 125°C||1.2<br>1.3<br>2.2|6<br>10<br>12|Ω|
|ID(on)|On–State Drain Current|VGS= 10 V,<br>VDS= 5 V|0.68|||A|
|gFS|Forward Transconductance|VDS= 10V,<br>ID= 0.17 A|0.08|0.8||S|
|**Dynamic Characteristics**|||||||
|Ciss|Input Capacitance|VDS= 25  V,<br>VGS= 0 V,<br>f = 1.0 MHz||73||pF|
|Coss|Output Capacitance|||7||pF|
|Crss<br>RG|Reverse Transfer Capacitance|||3.4||pF|
||Gate Resistance|VGS= 15 mV,<br>f = 1.0 MHz||2.2||Ω|
|**Switching Characteristics**<br>**(Note 2)**|||||||
|td(on)|Turn–On DelayTime|VDD= 30 V,<br>ID= 0.28 A,<br>VGS= 10 V,<br>RGEN= 6Ω||1.7|3.4|ns|
|tr|Turn–On Rise Time|||9|18|ns|
|td(off)|Turn–Off DelayTime|||17|31|ns|
|tf|Turn–Off Fall Time|||2.4|5|ns|
|Qg|Total Gate Charge|VDS= 30 V,<br>ID= 0.22 A,<br>VGS= 10 V||1.8|2.5|nC|
|Qgs|Gate–Source Charge|||0.2||nC|
|Qgd|Gate–Drain Charge|||0.3||nC|
|**Drain–Source Diode Characteristics**||**and Maximum Ratings**|||||
|IS|Maximum Continuous Drain–Source Diode Forward Current||||0.17|A|
|VSD|Drain–Source Diode Forward<br>Voltage|VGS= 0 V,<br>IS= 0.34 A(Note 2)||0.8|1.3|V|
|trr|Diode Reverse Recovery Time|IF= 0.17 A,<br>diF/dt= 100 A/µs||11||nS|
|Qrr|Diode Reverse Recovery Charge|||3||nC|



**NOTE:** 

**1.** RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.  RθJC is guaranteed by design while RθCA is determined by the user's board design. 

a) 350°C/W when mounted on a minimum pad.. 

Scale 1 : 1 on letter size paper 

**2.** Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0% 

BSS123 Rev G(W) 

## **Typical Characteristics** 

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1 VGS = 10V 3.5V 1.6<br>6.0V 1.5<br>0.8<br>4.5V 3.0V<br>1.4<br>0.6 2.5V 1.3 VGS = 2.5V<br>1.2<br>0.4<br> 3.0V<br>1.1<br> 3.5V  4.5V  6.0V  10V<br>0.2<br>1<br>2.0V<br>0.9<br>0<br>0 0.2 0.4 0.6 0.8 1<br>0 1 2 3 4 5<br>VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with<br>Drain Current and Gate Voltage.<br>2.2 3.4<br>2 IVD = 170mAGS = 10V 3 ID = 0.08A<br>1.8<br>TA = 125 [o] C<br>1.6 2.6<br>1.4<br>2.2<br>1.2<br>1 1.8<br>0.8<br>1.4<br>0.6 TA = 25 [o] C<br>0.4 1<br>-50 -25 0 25 50 75 100 125 150 0 2 4 6 8 10<br>TJ, JUNCTION TEMPERATURE ( [o] C) VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 3. On-Resistance Variation with Figure 4. On-Resistance Variation with<br>Temperature. Gate-to-Source Voltage.<br>1 1 VGS = 0V<br>VDS = 10V<br>0.8<br>0.1<br>TA = 125 [o] C<br>0.6 25 [o] C<br>0.01<br>0.4 -55 [o] C<br>TA = 125 [o] C<br>0.001<br>0.2 25 [o] C<br>-55 [o] C<br>0 0.0001<br>1 1.5 2 2.5 3 0 0.2 0.4 0.6 0.8 1 1.2<br>VGS, GATE TO SOURCE VOLTAGE (V) VSD,  BODY DIODE FORWARD VOLTAGE (V)<br>Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation<br>with Source Current and Temperature.<br>, NORMALIZED<br>, DRAIN CURRENT (A)ID RDS(ON)<br>DRAIN-SOURCE ON-RESISTANCE<br>, NORMALIZED<br>DS(ON) , ON-RESISTANCE (OHM)<br>R DS(ON)<br>R<br> DRAIN-SOURCE ON-RESISTANCE<br>, DRAIN CURRENT (A)ID<br>, REVERSE DRAIN CURRENT (A)IS<br>**----- End of picture text -----**<br>


BSS123 Rev G(W) 

## **Typical Characteristics** 

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10 100<br>ID = 0.17A VDS = 30V 50V f = 1 MHzVGS = 0 V<br>8 80 C ISS<br>70V<br>6 60<br>4 40<br>2 20<br>COSS<br>CRSS<br>0 0<br>0 0.4 0.8 1.2 1.6 2 0 20 40 60 80 100<br>Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.<br>1 5<br>RDS(ON) LIMIT 100µs SINGLE PULSE<br>1ms RθJA = 350°C/W<br>10ms 4 T A  = 25°C<br>0.1 100ms<br>1s 3<br>10s<br>DC<br>2<br>0.01 VGS = 10V<br>SINGLE PULSE<br>R θJA  = 350 [o] C/W 1<br>T A  = 25 [o] C<br>0.001 0<br>1 10 100 1000 0.001 0.01 0.1 1 10 100 1000<br>VDS, DRAIN-SOURCE VOLTAGE (V) t1, TIME (sec)<br>Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum<br>Power Dissipation.<br>1<br>D = 0.5 RθJA(t) = r(t) * RθJA<br>0.2 R θJA  = 350 [o] C/W<br>0.1 0.1<br>0.05 P(pk)<br>0.02 t1<br>0.01 0.01 TJ - TA = P  t 2 * RθJA(t)<br>SINGLE PULSE Duty Cycle, D = t 1  / t 2<br>0.001<br>0.0001 0.001 0.01 0.1 1 10 100 1000<br>t1, TIME (sec)<br>Figure 11. Transient Thermal Response Curve.<br>Thermal characterization performed using the conditions described in Note 1a.<br>Transient thermal response will change depending on the circuit board design.<br>CAPACITANCE (pF)<br>, GATE-SOURCE VOLTAGE (V)<br>GS<br>V<br>, DRAIN CURRENT (A)ID<br>P(pk), PEAK TRANSIENT POWER (W)<br>THERMAL RESISTANCE<br>r(t), NORMALIZED EFFECTIVE TRANSIENT<br>**----- End of picture text -----**<br>


BSS123 Rev G(W) 

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TRADEMARKS<br>**----- End of picture text -----**<br>


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The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is<br>not intended to be an exhaustive list of all such trademarks.<br>ACEx™ FACT™ ImpliedDisconnect™ PACMAN™ SPM™<br>ActiveArray™ FACT Quiet Series™ ISOPLANAR™ POP™ Stealth™<br>Bottomless™ FAST® LittlkeFET™ Power247™ SuperSOT™-3<br>CoolFET™ FASTr™ MicroFET™ PowerTrench® SuperSOT™-6<br>CROSSVOLT™ FRFET™ MicroPak™ QFET™ SuperSOT ™-8<br>DOME™ GlobalOptoisolator™ MICROWIRE™ qas™ SyncFET™<br>EcoSPARK™ GTOo™ MSX™ QT Optoelectronics™ TinyLogic®<br>E?CMOS™ HiSeC™ MSXPro™ Quiet Series™ TruTranslation™<br>EnSigna™ 2co™ OCX™ RapidConfigure™ UHC™<br>Across the board. Around the world.™ OCXPro™ RapidConnect™ UltraFET®<br>The Power Franchise™ OPTOLOGIC® SILENT SWITCHER® VCX™<br>Programmable Active Droop™ OPTOPLANAR™ SMART START™<br>DISCLAIMER<br>FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER<br>NOTICE TOANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD<br>DOES NOTASSUMEANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT<br>OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT<br>RIGHTS, NOR THE RIGHTS OF OTHERS.<br>LIFE SUPPORT POLICY<br>FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT<br>DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTENAPPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.<br>As used herein:<br>1. Life support devices or systems are devices or 2. A critical component is any component ofa life<br>systems which, (a) are intended for surgical implant into support device or system whose failure to perform can<br>the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life<br>failure to perform when properly used in accordance support device or system, or to affect its safety or<br>with instructions for use provided in the labeling, can be effectiveness.<br>reasonably expected to result in significant injury to the<br>user.<br>PRODUCT STATUS DEFINITIONS<br>Definition of Terms<br>Advance Information Formative or This datasheet contains the design specifications for<br>In Design product development. Specifications may change in<br>any manner without notice.<br>Preliminary First Production This datasheet contains preliminary data, and<br>supplementary data will be published at a later date.<br>Fairchild Semiconductor reserves the right to make<br>changes at any time without notice in order to improve<br>design.<br>No Identification Needed Full Production This datasheet contains final specifications. Fairchild<br>Semiconductor reserves the right to make changes at<br>any time without notice in order to improve design.<br>Obsolete Not In Production This datasheet contains specifications on a product<br>that has been discontinued by Fairchild semiconductor.<br>The datasheet is printed for reference information only.<br>**----- End of picture text -----**<br>


Rev. 12 

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