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BSH105,215
Power MOSFET, N Channel, 20 V, 1.05 A, 0.2 ohm, SOT-23, Surface Mount
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- Manufacturer: NEXPERIA
- Product type: Single MOSFETs
- Transistor Polarity:N Channel; Continuous Drain Current Id:1.05A; Drain Source Voltage Vds:20V; On Resistance Rds(on):0.14ohm; Rds(on) Test Voltage Vgs:4.5V; Threshold Voltage Vgs:5
- MSL: MSL 1 - Unlimited
- SVHC: No SVHC (25-Jun-2025)
- No. of Pins: 3Pins
- Channel Type: N Channel
- Qualification: -
- Power Dissipation: 417mW
- Transistor Mounting: Surface Mount
- Rds(on) Test Voltage: 4.5V
- Transistor Case Style: SOT-23
- Drain Source Voltage Vds: 20V
- Operating Temperature Max: 150°C
- Continuous Drain Current Id: 1.05A
- Drain Source On State Resistance: 0.2ohm
- Gate Source Threshold Voltage Max: 570mV
| Delivery and price | |
|---|---|
| Units per pack | 9000 |
| Price | 0.132 € |
| Current stock | 10+ |
| Lead time | 30 days |
Datasheet
**Philips Semiconductors** **Product specification** ## **N-channel enhancement mode MOS transistor** ## **BSH105** ## **FEATURES** - Very low threshold voltage - Fast switching - Logic level compatible - Subminiature surface mount package ## **GENERAL DESCRIPTION** N-channel, enhancement mode, logic level, field-effect power transistor. This device has very low threshold voltage and extremely fast switching making it ideal for battery powered applications and high speed digital interfacing. The BSH105 is supplied in the SOT23 subminiature surface mounting package. ## **SYMBOL** ## **QUICK REFERENCE DATA** **==> picture [386 x 95] intentionally omitted <==** **----- Start of picture text -----**<br> d VDS = 20 V<br>ID = 1.05 A<br>g RDS(ON) ≤ 250 mΩ (VGS = 2.5 V)<br>VGS(TO) ≥ 0.4 V<br>s<br>**----- End of picture text -----**<br> ## **PINNING** ## **SOT23** **==> picture [406 x 128] intentionally omitted <==** **----- Start of picture text -----**<br> PIN DESCRIPTION<br>1 gate 3<br>Top view<br>2 source<br>3 drain<br>1 2<br>**----- End of picture text -----**<br> ## **LIMITING VALUES** Limiting values in accordance with the Absolute Maximum System (IEC 134) ||**SYMBOL**|**SYMBOL**|**PARAMETER**|**PARAMETER**|**PARAMETER**|**PARAMETER**||**CONDITIONS**|**CONDITIONS**|**CONDITIONS**||||**MIN.**|||**MAX.**|||**UNIT**||||| |---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---| ||VDS||Drain-source voltage|||||||||||-|||20|||V||||| ||VDGR||Drain-gate|||voltage||RGS= 20 kΩ||||||-|||20|||V||||| ||VGS||Gate-source voltage|||||||||||-|||±8|||V||||| ||ID||Drain current (DC)|||||Ta= 25 ˚C||||||-|||1.05|||A||||| |||||||||Ta= 100 ˚C||||||-|||0.67|||A||||| ||IDM||Drain current (pulse peak value)|||||Ta= 25 ˚C||||||-|||4.2|||A||||| ||Ptot||Total power dissipation|||||Ta= 25 ˚C||||||-|||0.417|||W||||| |||||||||Ta= 100 ˚C||||||-|||0.17|||W||||| ||Tstg, Tj||Storage & operating temperature|||||||||||- 55|||150|||˚C||||| ## **THERMAL RESISTANCES** ||**SYMBOL**<br>**PARAMETER**<br>**CONDITIONS**<br>**TYP.**<br>**MAX.**<br>**UNIT**<br>Rth j-a<br>Thermal resistance junction to<br>FR4 board, minimum<br>300<br>-<br>K/W<br>ambient<br>footprint| |---|---| August 1998 Rev 1.000 1 Philips Semiconductors Product specification N-channel enhancement mode MOS transistor BSH105 ## **ELECTRICAL CHARACTERISTICS** Tj= 25˚C unless otherwise specified ||**SYMBOL PARAMETER**|**SYMBOL PARAMETER**|**SYMBOL PARAMETER**|**SYMBOL PARAMETER**|**SYMBOL PARAMETER**|**SYMBOL PARAMETER**|**SYMBOL PARAMETER**||||||**CONDITIONS**|**CONDITIONS**|**CONDITIONS**|**CONDITIONS**|||||||**MIN.**|**MIN.**|**MIN.**|**MIN.**|**MIN.**|**TYP.**|**TYP.**|**TYP.**|**TYP.**|**TYP.**|**MAX.**|**MAX.**|**MAX.**|**MAX.**|**MAX.**|**MAX.**|**UNIT**|**UNIT**|**UNIT**|**UNIT**|**UNIT**|||||| |---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---| ||V(BR)DSS|||Drain-source breakdown|||||||||VGS||= 0 V; ID= 10µA|||||||||20||||||-||||||-||||V||||||||| |||||voltage||||||||||||||||||||||||||||||||||||||||||||| ||VGS(TO)|||Gate|||threshold||voltage||||VDS||= VGS; ID= 1 mA|||||||||0.4||||0.57||||||||-||||V||||||||| |||||||||||||||||||Tj=|150˚C|||||0.1||||||-||||||-||||V||||||||| ||RDS(ON)|||Drain-source on-state|||||||||VGS||= 4.5 V; ID= 0.6 A||||||||||-||||140|||||200|||||mΩ|||||||||| |||||resistance|||||||||VGS||= 2.5 V; ID= 0.6 A||||||||||-||||180|||||250|||||mΩ|||||||||| ||||||||||||||VGS||= 1.8 V; ID= 0.3 A||||||||||-||||240|||||300|||||mΩ|||||||||| ||||||||||||||VGS||= 2.5 V; ID= 0.6 A; Tj= 150˚C||||||||||-||||270|||||375|||||mΩ|||||||||| ||gfs|||Forward transconductance|||||||||VDS||= 16 V; ID= 0.6 A|||||||||0.5|||||1.6|||||||-||||S||||||||| ||IGSS|||Gate|||source leakage current<br>VGS||||||||=±8 V; VDS= 0 V||||||||||-||||10||||||100|||||nA||||||||| ||IDSS|||Zero|||gate voltage drain||||||VDS||= 16 V; VGS= 0 V;||||||||||-||||50||||||100|||||nA||||||||| |||||current||||||||||||||Tj=|150˚C||||||-||||1.3||||||10|||||µA||||||||| ||Qg(tot)|||Total gate charge|||||||||ID=||1 A; VDD= 20 V; VGS= 4.5 V||||||||||-||||3.9|||||||-||||nC||||||||| ||Qgs|||Gate-source charge|||||||||||||||||||||-||||0.4|||||||-||||nC||||||||| ||Qgd|||Gate-drain(Miller)charge|||||||||||||||||||||-||||1.4|||||||-||||nC||||||||| ||td on|||Turn-on delay||||time|||||VDD||= 20 V; ID= 1 A;||||||||||-|||||2||||||-||||ns||||||||| ||tr|||Turn-on rise time|||||||||VGS||= 8 V; RG= 6Ω||||||||||-||||4.5|||||||-||||ns||||||||| ||td off|||Turn-off delay||||time|||||Resistive load||||||||||||-||||45|||||||-||||ns||||||||| ||tf|||Turn-off fall time|||||||||||||||||||||-||||20|||||||-||||ns||||||||| ||Ciss|||Input capacitance|||||||||VGS||= 0 V; VDS= 16 V; f = 1 MHz||||||||||-||||152|||||||-||||pF||||||||| ||Coss|||Output capacitance|||||||||||||||||||||-||||71|||||||-||||pF||||||||| ||Crss|||Feedback capacitance|||||||||||||||||||||-||||33|||||||-||||pF||||||||| ## **REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS** Tj = 25˚C unless otherwise specified ||**SYMBOL**<br>**PARAMETER**<br>**CONDITIONS**<br>**MIN.**<br>**TYP.**<br>**MAX.**<br>**UNIT**<br>IDR<br>Continuous reverse drain<br>Ta= 25 ˚C<br>-<br>-<br>1.05<br>A<br>current<br>IDRM<br>Pulsed reverse drain current<br>-<br>-<br>4.2<br>A<br>VSD<br>Diode forward voltage<br>IF= 0.5 A; VGS= 0 V<br>-<br>0.74<br>1<br>V<br>trr<br>Reverse recovery time<br>IF= 0.5 A; -dIF/dt = 100 A/µs;<br>-<br>27<br>-<br>ns<br>Qrr<br>Reverse recoverycharge<br>VGS= 0 V; VR= 16 V<br>-<br>19<br>-<br>nC| |---|---| August 1998 Rev 1.000 2 Philips Semiconductors Product specification ## N-channel enhancement mode MOS transistor ## BSH105 **==> picture [325 x 189] intentionally omitted <==** **----- Start of picture text -----**<br> Normalised Power Dissipation, PD (%)<br>120<br>100<br>80<br>60<br>40<br>20<br>0<br>0 25 50 75 100 125 150<br>Ambient Temperature, Ta (C)<br>Fig.1. Normalised power dissipation.<br>PD% = 100⋅PD/PD 25 ˚C = f(Ta)<br>**----- End of picture text -----**<br> **==> picture [214 x 132] intentionally omitted <==** **----- Start of picture text -----**<br> Peak Pulsed Drain Current, IDM (A) BSH105<br>1000<br>D = 0.5<br>100<br>0.2<br>0.1<br>0.05<br>10<br>0.02 [P] D tp D = tp/T<br>single pulse<br>1<br>T<br>0.1<br>1E-06 1E-05 1E-04 1E-03 1E-02 1E-01 1E+00 1E+01<br>Pulse width, tp (s)<br>**----- End of picture text -----**<br> Fig.4. Transient thermal impedance. Zth j-a = f(t); parameter D = tp/T **==> picture [479 x 137] intentionally omitted <==** **----- Start of picture text -----**<br> Normalised Drain Current, ID (%) Drain Current, ID (A) BSH105<br>120 5<br>4.5V<br>4.5 2.5V<br>100<br>4<br>Tj = 25 C 2.1 V<br>80 3.5<br>3<br>60 2.5 VGS = 1.9 V<br>40 2 1.7 V<br>1.5<br>20 1 1.5 V<br>1.3 V<br>0.5<br>0 1.1 V<br>0 25 50 75 100 125 150 0<br>0 0.5 1 1.5 2<br>Ambient Temperature, Ta (C) Drain-Source Voltage, VDS (V)<br>**----- End of picture text -----**<br> Fig.2. Normalised continuous drain current. ID% = 100⋅ID/ID 25 ˚C = f(Ta); conditions: VGS ≥ 4.5 V Fig.5. Typical output characteristics, Tj = 25 ˚C. ID = f(VDS); parameter VGS **==> picture [215 x 137] intentionally omitted <==** **----- Start of picture text -----**<br> Peak Pulsed Drain Current, IDM (A) BSH105<br>100<br>10 RDS(on) = VDS/ ID<br>tp = 100 us<br>1 1 ms<br>10 ms<br>100 ms<br>0.1 d.c.<br>0.01<br>0.1 1 10 100<br>Drain-Source Voltage, VDS (V)<br>**----- End of picture text -----**<br> Fig.3. Safe operating area. Ta = 25 ˚C ID & IDM = f(VDS); IDM single pulse; parameter tp **==> picture [212 x 145] intentionally omitted <==** **----- Start of picture text -----**<br> Drain-Source On Resistance, RDS(on) (Ohms) BSH105<br>0.5<br>1.5 V 1.7 V 1.9 V 2.1 V<br>0.45<br>0.4<br>0.35<br>0.3<br>2.5 V<br>0.25<br>0.2<br>VGS = 4.5 V<br>0.15<br>0.1<br>0.05 Tj = 25 C<br>0<br>0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5<br>Drain Current, ID (A)<br>**----- End of picture text -----**<br> Fig.6. Typical on-state resistance, Tj = 25 ˚C. RDS(ON) = f(ID); parameter VGS August 1998 Rev 1.000 3 Philips Semiconductors Product specification ## N-channel enhancement mode MOS transistor ## BSH105 **==> picture [700 x 190] intentionally omitted <==** **----- Start of picture text -----**<br> Drain Current, ID (A) BSH105<br>3 Threshold Voltage, VGS(to), (V)<br>1<br>VDS > ID X RDS(on)<br>2.5 0.9<br>0.8 typical<br>2 0.7<br>0.6<br>1.5 0.5<br>0.4<br>minimum<br>1 0.3<br>150 C<br>Tj = 25 C 0.2<br>0.5 0.1<br>0<br>0<br>0 25 50 75 100 125 150<br>0 0.5 1 1.5 2 2.5 3<br>Gate-Source Voltage, VGS (V) Junction Temperature, Tj (C)<br>Fig.7. Typical transfer characteristics. Fig.10. Gate threshold voltage.<br>ID = f(VGS) VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS<br>**----- End of picture text -----**<br> **==> picture [212 x 135] intentionally omitted <==** **----- Start of picture text -----**<br> Transconductance, gfs (S) BSH105<br>4<br>3.5<br>3<br>2.5<br>2<br>1.5<br>1<br>0.5<br>0<br>0 0.5 1 1.5 2 2.5 3<br>Drain Current, ID (A)<br>**----- End of picture text -----**<br> Fig.8. Typical transconductance, Tj = 25 ˚C. gfs = f(ID) **==> picture [340 x 189] intentionally omitted <==** **----- Start of picture text -----**<br> Drain Current, ID (A) BSH105<br>1E+00<br>VDS = 5 V<br>1E-01 Tj = 25 C<br>1E-02<br>1E-03<br>1E-04<br>1E-05<br>1E-06<br>1E-07<br>0 0.2 0.4 0.6 0.8 1<br>Gate-Source Voltage, VGS (V)<br>Fig.11. Sub-threshold drain current.<br>ID = f(VGS); conditions: Tj = 25 ˚C<br>**----- End of picture text -----**<br> **==> picture [605 x 189] intentionally omitted <==** **----- Start of picture text -----**<br> Normalised Drain-Source On Resistance Capacitances, Ciss, Coss, Crss (pF) BSH105<br>1.8 1000<br>1.7 RDS(ON) @ Tj<br>1.6 RDS(ON) @ 25C<br>1.5 2.5 V<br>1.4 VGS = 4.5 V Ciss<br>1.3 100<br>1.2 1.8 V Coss<br>1.1<br>1 Crss<br>0.9<br>0.8<br>10<br>0 25 50 75 100 125 150<br>0.1 1 10 100<br>Junction Temperature, Tj (C) Drain-Source Voltage, VDS (V)<br>Fig.9. Normalised drain-source on-state resistance. Fig.12. Typical capacitances, Ciss, Coss, Crss.<br>RDS(ON)/RDS(ON)25 ˚C = f(Tj) C = f(VDS); conditions: VGS = 0 V; f = 1 MHz<br>**----- End of picture text -----**<br> August 1998 Rev 1.000 4 Philips Semiconductors Product specification ## N-channel enhancement mode MOS transistor ## BSH105 **==> picture [700 x 190] intentionally omitted <==** **----- Start of picture text -----**<br> 10 Gate-source voltage, VGS (V) BSH105 -5 Source-Drain Diode Current, IF (A) BSH105<br>VDD = 20 V<br>9 RD = 20 Ohms -4.5<br>8 Tj = 25 C -4<br>7 -3.5<br>6 -3<br>5 -2.5 150 C<br>4 -2 Tj = 25 C<br>-1.5<br>3<br>-1<br>2<br>-0.5<br>1<br>0<br>0<br>0 -0.2 -0.4 -0.6 -0.8 -1 -1.2<br>0 2 4 6 8<br>Gate charge, QG (nC) Drain-Source Voltage, VSDS (V)<br>Fig.13. Typical turn-on gate-charge characteristics. Fig.14. Typical reverse diode current.<br>VGS = f(QG) IF = f(VSDS); conditions: VGS = 0 V; parameter Tj<br>**----- End of picture text -----**<br> August 1998 Rev 1.000 5 Philips Semiconductors Product specification N-channel enhancement mode MOS transistor ## BSH105 ## **MECHANICAL DATA** **==> picture [975 x 465] intentionally omitted <==** **----- Start of picture text -----**<br> Plastic surface mounted package; 3 leads SOT23<br>D B E A X<br>HE v M A<br>3<br>Q<br>A<br>A1<br>1 2 c<br>e1 bp w M B Lp<br>e<br>detail X<br>0 1 2 mm<br>scale<br>DIMENSIONS (mm are the original dimensions)<br>UNIT A max.A1 bp c D E e e1 HE Lp Q v w<br>mm 1.10.9 0.1 0.480.38 0.150.09 3.02.8 1.41.2 1.9 0.95 2.52.1 0.450.15 0.550.45 0.2 0.1<br>VERSIONOUTLINE IEC JEDEC REFERENCES EIAJ PROJECTIONEUROPEAN ISSUE DATE<br> SOT23 97-02-28<br>Fig.15. SOT23 surface mounting package.<br>**----- End of picture text -----**<br> ## **Notes** 1. This product is supplied in anti-static packaging. The gate-source input must be protected against static discharge during transport or handling. 2. Refer to SMD Footprint Design and Soldering Guidelines, Data Handbook SC18. 3. Epoxy meets UL94 V0 at 1/8". August 1998 Rev 1.000 6 |Philips Semiconductors|Product specification| |---|---| |N-channel enhancement mode|BSH105| |MOS transistor|| ## **DEFINITIONS** |**DEFINITIONS**||||| |---|---|---|---|---| |**Data sheet status**||||| |Objective specification|This data sheet contains target orgoal specifications forproduct development.|||| |Preliminaryspecification This data sheet containspreliminarydata; supplementarydata maybepublished later.||||| |Product specification|This data sheet contains final product specifications.|||| ## **Limiting values** Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. ## **Application information** Where application information is given, it is advisory and does not form part of the specification. ## **Philips Electronics N.V. 1998** All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. ## **LIFE SUPPORT APPLICATIONS** These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. August 1998 Rev 1.000 7
Updated at April 24, 2026
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