BS270-D74Z

April 1995 

## **BS270** 

## **N-Channel Enhancement Mode Field Effect Transistor** 

## **General Description** 

## **Features** 

These  N-Channel enhancement mode field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. These products have been designed to minimize on-state resistance while provide rugged, reliable, and fast switching performance. They can be used in most applications requiring up to 500mA DC. These products are particularly suited for low voltage, low current applications such as small servo motor control, power MOSFET gate drivers, and other switching applications. 

- 400mA, 60V. RDS(ON) = 2Ω @ VGS = 10V. High density cell design for low RDS(ON). Voltage controlled small signal switch. 

- Rugged and reliable. 

- High saturation current capability. 

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|**Symbol**|**Parameter**|**BS270**|
|---|---|---|
|VDSS|Drain-Source Voltage|60|
|VDGR|Drain-Gate Voltage (R**GS** <<br> 1MΩ)|60|
|VGSS|Gate-Source Voltage - Continuous<br>- Non Repetitive (tp < 50µs)|±20|
|||±40|
|ID|Drain Current - Continuous<br>- Pulsed|400|
|||2000|
|PD|Maximum Power Dissipation<br>Derate Above 25**°**C|625|
|||5|
|TJ,TSTG|Operating and Storage Temperature Range|-55 to 150|
|TL|Maximum Lead Temperature for  Soldering<br>Purposes, 1/16" from Case for 10 Seconds|300|



BS270.SAM 

© 1997 Fairchild Semiconductor Corporation 

**Electrical Characteristics** (TA = 25°C unless otherwise noted) 

|**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Units**|
|---|---|---|---|---|---|---|---|
|**OFF CHARACTERISTICS**||||||||
|BVDSS|Drain-Source Breakdown Voltage|V**GS**= 0 V, I**D**= 10 µA||60|||V|
|IDSS|Zero Gate Voltage  Drain Current|V**DS**= 60 V, V**GS**= 0 V||||1|µA|
||||TJ= 125<br>oC|||500|µA|
|IGSSF|Gate - Body Leakage, Forward|V**GS**= 20 V, V**DS**= 0 V||||10|nA|
|IGSSF|Gate - Body Leakage, Reverse|V**GS**= -20 V, V**DS**= 0 V||||-10|nA|
|**ON CHARACTERISTICS**(Note 1)||||||||
|VGS(th)|Gate Threshold Voltage|V**DS **= V**GS**, I**D **= 250 µA||1|2.1|2.5|V|
|RDS(ON)|Static Drain-Source On-Resistance|V**GS**= 10 V, I**D**= 500 mA|||1.2|2|Ω|
||||TJ= 125<br>oC||2|3.5||
|||V**GS**= 4.5 V, I**D**= 75 mA|||1.8|3||
|VDS(ON)|Drain-Source On-Voltage|VGS= 10 V,  ID= 500 mA|||0.6|1|V|
|||VGS= 4.5 V,  ID= 75 mA|||0.14|0.225||
|ID(ON)|On-State Drain Current|V**GS**= 10 V,  V**DS**><br> 2 VDS(on)||2000|2700||mA|
|||V**GS**= 4.5 V,  V**DS**><br> 2 VDS(on)||400|600|||
|gFS|Forward Transconductance|V**DS**><br> 2 VDS(on), ID= 200 mA||100|320||mS|
|**DYNAMIC CHARACTERISTICS**||||||||
|Ciss|Input Capacitance|V**DS**= 25 V,  V**GS**= 0 V,<br>f  = 1.0 MHz|||20|50|pF|
|Coss|Output Capacitance||||11|25|pF|
|Crss|Reverse Transfer Capacitance||||4|5|pF|
|**SWITCHING CHARACTERISTICS**(Note 1)||||||||
|ton|Turn-On Time|VDD= 30 V,  ID= 500 m A,<br>VGS= 10 V, RGEN= 25Ω||||10|ns|
|toff|Turn-Off Time|||||10|ns|
|**DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS**||||||||
|IS|Maximum Continuous Drain-Source Diode Forward Current|||||400|mA|
|ISM|Maximum Pulsed Drain-Source Diode Forward Current|||||2000|mA|
|VSD|Drain-Source Diode Forward Voltage|VGS= 0 V, IS= 400 mA(Note 1)|||0.88|1.2|V|



Note: 

1. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. 

BS270.SAM 

## **Typical Electrical Characteristics** 

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2 3<br>V     = 10VGS 9.0  V    =4.0V GS<br>8.0 4.5<br>  7.0 2.5 5.0<br>1.5<br> 6 .0<br>6.0 2<br>7.0<br>1<br>5.0 1.5 8.0<br>9.0<br>10<br>0.5<br>4.0 1<br> 3.0<br>0 0.5<br>0 1 2 3 4 5 0 0.4 0.8 1.2 1.6 2<br>V     , DRAIN-SOURCE VOLTAGE (V)DS I    , DRAIN CURRENT (A)D<br>Figure 1. On-Region Characteristics . Figure 2. On-Resistance Variation with Gate Voltage<br>and Drain Current.<br>2 3<br>V     = 10VGS  V     = 10V GS<br>1.75 I   = 500mA D 2.5<br>T  = 125°CJ<br>1.5 2<br>1.25 1.5<br> 25°C<br>1 1<br>  -55°C<br>0.75 0.5<br>0.5-50 -25 0 25 50 75 100 125 150 0 0 0.4 0.8 1.2 1.6 2<br>T  , JUNCTION TEMPERATURE (°C)J I   , DRAIN CURRENT (A)D<br>Figure 3. On-Resistance Variation Figure 4. On-Resistance Variation with Drain<br>with Temperature. Current and Temperature.<br>2 1.1<br>V     = 10VDS T   = -55°CJ  25°C 125°C 1.05 V    = VDS GS<br>1.6 I    = 1 mAD<br>1<br>1.2<br>0.95<br>0.8<br>0.9<br>0.4<br>0.85<br>0 0.8<br>0 2 4 6 8 10 -50 -25 0 25 50 75 100 125 150<br>V     , GATE TO SOURCE VOLTAGE (V)GS T  , JUNCTION TEMPERATURE (°C)J<br>Figure 5. Transfer Characteristics . Figure 6. Gate Threshold Variation with<br>DS(on)<br>R           , NORMALIZED<br>I    , DRAIN-SOURCE CURRENT (A)D DRAIN-SOURCE ON-RESISTANCE<br>DS(ON) DS(on)<br>R            , NORMALIZED R           , NORMALIZED<br>DRAIN-SOURCE ON-RESISTANCE DRAIN-SOURCE ON-RESISTANCE<br>th<br>V   , NORMALIZED<br>I   , DRAIN CURRENT (A)<br>GATE-SOURCE THRESHOLD VOLTAGE<br>D<br>**----- End of picture text -----**<br>


**Figure 2. On-Resistance Variation with Gate Voltage and Drain Current.** 

**Figure 6. Gate Threshold Variation with Temperature** . 

BS270.SAM 

## **Typical Electrical Characteristics (continued)** 

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1.1<br>I    = 10µAD<br>1.075<br>1.05<br>1.025<br>1<br>0.975<br>0.95<br>0.925<br>-50 -25 0 25 50 75 100 125 150<br>T  , JUNCTION TEMPERATURE (°C)J<br>Figure 7. Breakdown Voltage Variation<br>with Temperature.<br>60<br>40<br>C  iss<br>20<br>C  oss<br>10<br>5<br>C   rss<br>f = 1 MHz<br>2<br>V     = 0VGS<br>1<br>1 2 3 5 10 20 30 50<br>V       , DRAIN TO SOURCE VOLTAGE (V)DS<br>BV        , NORMALIZED<br>DRAIN-SOURCE BREAKDOWN VOLTAGE<br>CAPACITANCE (pF)<br>DSS<br>**----- End of picture text -----**<br>


**Figure 9. Capacitance Characteristics.** 

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2<br>1  V      = 0V GS<br>0.5<br>T  = 125°C J<br>0.1  25°C<br>0.05<br>  -55°C<br>0.01<br>0.005<br>0.001<br>0.2 0.4 0.6 0.8 1 1.2 1.4<br>V       , BODY DIODE FORWARD VOLTAGE (V)SD<br>Figure 8.  Body Diode Forward Voltage Variation with<br>Current and Temperature.<br>10<br>I   =500mAD V    = 25VDS<br>8<br>6<br>4<br>2<br>0<br>0 0.4 0.8 1.2 1.6 2<br>Q    , GATE CHARGE (nC)g<br>I   , REVERSE DRAIN CURRENT (A)<br>GS<br>V      , GATE-SOURCE VOLTAGE (V)<br>S<br>**----- End of picture text -----**<br>


**Figure 8.  Body Diode Forward Voltage Variation with Current and Temperature.** 

**Figure 10. Gate Charge Characteristics** . 

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VDD t on toff<br>t d(on) t [r] t d(off) t f<br>VIN R L 90% 90%<br>D V OUT Output, Vout<br>10% 10%<br>V<br>GS Inverted<br>R 90%<br>GEN G DUT<br>Input, Vin 50% 50%<br>10%<br>S<br>Pulse Width<br>**----- End of picture text -----**<br>


**Figure 11. Switching Test Circuit.** 

**Figure 12. Switching Waveforms** . 

BS270.SAM 

## **Typical Electrical Characteristics (continued)** 

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3<br>2<br>1<br>0.5<br>0.1<br>0.05<br>V     = 10V GS<br>SINGLE PULSE<br>0.01 T    = 25°CA<br>0.005<br>1 2 5 10 20 30 60 80<br> V     , DRAIN-SOURCE VOLTAGE (V)DS<br>100us<br>1ms<br>10ms<br>100ms<br> 1s<br>10s<br> DC<br>RDS(ON) Limit<br>I   , DRAIN CURRENT (A)D<br>**----- End of picture text -----**<br>


## **Figure 13. Maximum Safe Operating Area.** 

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1<br>0.5  D = 0.5<br>R       (t) = r(t)  *   R          θJA θJA<br>0.2   0.2      R        = (See Datasheet)θJA<br> 0.1<br>0.1<br>P(pk)<br> 0.05<br>0.05  t  1<br> 0.02   t   2<br> 0.01  T  - T    = P  *  R       (t)J A θJA<br>0.02  Single Pulse<br>Duty Cycle, D = t   /t1 2<br>0.01<br>0.0001 0.001 0.01 0.1 1 10 100 300<br>t  , TIME (sec)1<br>r(t), NORMALIZED EFFECTIVE<br>TRANSIENT THERMAL RESISTANCE<br>**----- End of picture text -----**<br>


**Figure 14. Transient Thermal Response Curve.** 

BS270.SAM 

## **TO-92 Tape and Reel Data** 

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TO-92 Packaging<br>Configuration:  Figure 1.0<br>TAPE and REEL OPTION<br>FSCINT Label sample See Fig 2.0 for various<br>WOODALL LOT:   NSID:     CBVK741B019 FAIRCHILD SEMICONDUCTOR  CORPORATION            PN2222N UL QTY: SPEC:  10000HTB:B Reeling Styles “a > FSCINT<br>D/C1:    D9842      SPEC REV:     B2 Label<br>MINN QA REV: = . e e<br>5 Reels per<br>(FSCINT) Intermediate Box<br>IM = 8 866EN Customized<br>F63TNR Label sample Label<br>LOT: CBVK741B019 QTY: 2000 F63TNR<br>D/C1: D9842      QTY1: wT FSID:  PN222N         SPEC REV:              SPEC: = CustomizedLabel 2<br>D/C2:       QTY2:         CPN: N/F: F      (F63TNR)3 — Label<br>375mm x 267mm x 375mm<br>Intermediate Box<br>TO-92 TNR/AMMO PACKING INFROMATION AMMO PACK OPTION<br>Packing Style Quantity EOL code See Fig 3.0 for 2 AmmoPack Options<br>Reel A 2,000 D26Z<br>E 2,000 D27Z<br>Ammo M 2,000 D74Z<br>P 2,000 D75Z Si Gs [ee] :at] {)o- FSCINT<br>Unit weight                                      = 0.22 gm<br>Reel weight with components         = 1.04 kg Label<br>Ammo weight with components      = 1.02 kg | =—.~ > ye<br>Max quantity per intermediate box  = 10,000 units 327mm x 158mm x 135mm 5 Ammo boxes per<br>Immediate Box Intermediate Box Customized<br>\ Label<br>Customized | F63TNR oP<br>Label Label<br>333mm x 231mm x 183mm<br>Intermediate Box<br>(TO-92) BULK  PACKING INFORMATION BULK OPTION<br>CODEEOL DESCRIPTION DIMENSIONLEADCLIP QUANTITY See Bulk PackingInformation table<br>J18Z TO-18 OPTION STD NO LEAD CLIP 2.0 K / BOX Anti-static<br>J05Z TO-5   OPTION STD NO LEAD CLIP 1.5 K / BOX Bubble Sheets<br>FSCINT Label<br>NO EOLCODE TO-92  STANDARDSTRAIGHT FOR: PKG 92, NO LEADCLIP 2.0 K / BOX<br> 94 (NON PROELECTRON<br> SERIES), 96<br>L34Z TO-92  STANDARDSTRAIGHT FOR: PKG 94 NO LEADCLIP 2.0 K / BOX<br>(PROELECTRON SERIES  2000 units per 114mm x 102mm x 51mm<br>97, 98BCXXX, BFXXX, BSRXXX), EO70 box for std option Immediate Box<br>5 EO70 boxes per<br> intermediate Box<br>530mm x 130mm x 83mm Customized<br>Intermediate box Label<br>FSCINT Label 7 10,000 units maximum<br>~——~y per intermediate box<br>for std option<br>**----- End of picture text -----**<br>


©2001 Fairchild Semiconductor Corporation 

March 2001, Rev. B1 

## **TO-92 Tape and Reel Data, continued** 

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TO-92 Reeling Style<br>Configuration:  Figure 2.0<br>Machine Option “A” (H) Machine Option “E” (J)<br>Style “A”, D26Z, D70Z (s/h) Style “E”, D27Z, D71Z (s/h)<br>**----- End of picture text -----**<br>


**TO-92 Radial Ammo Packaging Configuration:** Figure 3.0 

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FIRST WIRE OFF IS COLLECTOR FIRST WIRE OFF IS EMITTER<br>ADHESIVE TAPE IS ON THE TOP SIDE ADHESIVE TAPE IS ON THE TOP SIDE<br>FLAT OF TRANSISTOR IS ON TOP FLAT OF TRANSISTOR IS ON BOTTOM<br>ORDER STYLE ORDER STYLE<br>D74Z (M) D75Z (P)<br>FIRST WIRE OFF IS EMITTER (ON PKG. 92) FIRST WIRE OFF IS COLLECTOR (ON PKG. 92)<br>ADHESIVE TAPE IS ON BOTTOM SIDE ADHESIVE TAPE IS ON BOTTOM SIDE<br>FLAT OF TRANSISTOR IS ON BOTTOM FLAT OF TRANSISTOR IS ON TOP<br>**----- End of picture text -----**<br>


September 1999, Rev. B 

## **TO-92 Tape and Reel Data, continued** 

**TO-92 Tape and Reel Taping Dimension Configuration:** Figure 4.0 

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Hd<br>P Pd<br>b<br>Ha W1<br>d S<br>L<br>H1 HO<br>L1 WO t<br>W2<br>W<br>t1<br>P1 F1<br>P2 DO<br>ITEM DESCRIPTION SYMBOL DIMENSION<br>PO<br>Base of Package to Lead Bend b 0.098 (max)<br>User Direction of Feed Component Height Ha 0.928 (+/- 0.025)<br>Lead Clinch Height  HO 0.630 (+/- 0.020)<br>Component Base Height H1 0.748 (+/- 0.020)<br>Component Alignment ( side/side ) Pd 0.040 (max)<br>Component Alignment ( front/back ) Hd 0.031 (max)<br>Component Pitch P 0.500 (+/- 0.020)<br>Feed Hole Pitch PO 0.500 (+/- 0.008)<br>Hole Center to First Lead P1 0.150 (+0.009, -0.010)<br>Hole Center to Component Center P2 0.247 (+/- 0.007)<br>Lead Spread F1/F2 0.104 (+/- 0 .010)<br>Lead Thickness d 0.018 (+0.002, -0.003)<br>Cut Lead Length L 0.429 (max)<br>Taped Lead Length L1 0.209 (+0.051, -0.052)<br>Taped Lead Thickness t 0.032 (+/- 0.006)<br>Carrier Tape Thickness t1 0.021 (+/- 0.006)<br>Carrier Tape Width W 0.708 (+0.020, -0.019)<br>TO-92 Reel Hold - down Tape Width WO 0.236 (+/- 0.012)<br>Configuration:  Figure 5.0 Hold - down Tape position W1 0.035 (max)<br>Feed Hole Position W2 0.360 (+/- 0.025)<br>Sprocket Hole Diameter DO 0.157 (+0.008, -0.007)<br>Lead Spring Out S 0.004 (max)<br>Note : All dimensions are in inches.<br>ELECTROSTATIC<br>SEN SITIVE D EVICES<br>D4 D1<br>ITEM DESCRIPTION SYSMBOL MINIMUM MAXIMUM<br>F63TNR Label D2 Reel Diameter D1 13.975 14.025<br>Arbor Hole Diameter (Standard) D2 1.160 1.200<br>Customized Label  (Small Hole) D2 0.650 0.700<br>Core Diameter D3 3.100 3.300<br>Hub Recess Inner Diameter D4 2.700 3.100<br>Hub Recess Depth W1 0.370 0.570<br>Flange to Flange Inner Width W2 1.630 1.690<br>W1 Hub to Hub Center Width W3 2.090<br>W2 W3<br>Note: All dimensions are inches<br>D3<br>**----- End of picture text -----**<br>


July 1999, Rev. A 

## **TO-92 Package Dimensions** 

## TO-92; TO-18 Reverse Lead Form (J35Z Option) (FS PKG Code 92, 94, 96) 

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1:1<br>Scale 1:1 on letter size paper<br>Dimensions shown below are in:<br>inches [millimeters]<br>**----- End of picture text -----**<br>


Part Weight per unit (gram):  0.22 

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TO-92(92,94,96,97 * ,98 * ) ;<br>**----- End of picture text -----**<br>


**Note:** All package 97 or 98 transistors are leadformed to this configuration prior to bulk shipment. Order L34Z option if  in-line leads are preferred on package 97 or 98. 

- Standard Option on 97 & 98 package code 

January 2000, Rev. B 

## **TRADEMARKS** 

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. 

|ACEx™|FASTr™|PowerTrench<br>||SyncFET™|
|---|---|---|---|---|
|Bottomless™|GlobalOptoisolator™|QFET™||TinyLogic™|
|CoolFET™|GTO™|QS™||UHC™|
|_CROSSVOLT_™|HiSeC™|QT Optoelectronics™||VCX™|
|DOME™|ISOPLANAR™|Quiet Series™|||
|E2CMOSTM|MICROWIRE™|SILENT SWITCHER|||
|EnSignaTM|OPTOLOGIC™|SMART START™|||
|FACT™|OPTOPLANAR™|SuperSOT™-3|||
|FACT Quiet Series™|PACMAN™|SuperSOT™-6|||
|<br>FAST|POP™|SuperSOT™-8|||



## **DISCLAIMER** 

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 

## **LIFE SUPPORT POLICY** 

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 

1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. 

## **PRODUCT STATUS DEFINITIONS** 

## **Definition of Terms** 

|**Definition of Terms**|||
|---|---|---|
|**Datasheet Identification**|**Product Status**|**Definition**|
|Advance Information|Formative or<br>In Design|This datasheet contains the design specifications for<br>product development. Specifications may change in<br>any manner without notice.|
|Preliminary|First Production|This datasheet contains preliminary data, and<br>supplementary data will be published at a later date.<br>Fairchild Semiconductor reserves the right to make<br>changes at any time without notice in order to improve<br>design.|
|No Identification Needed|Full Production|This datasheet contains final specifications. Fairchild<br>Semiconductor reserves the right to make changes at<br>any time without notice in order to improve design.|
|Obsolete|Not In Production|This datasheet contains specifications on a product<br>that has been discontinued by Fairchild semiconductor.<br>The datasheet is printed for reference information only.|



Rev. G