BDX53BG

## BDX53B, BDX53C (NPN), BDX54B, BDX54C (PNP) 

## Plastic Medium-Power Complementary Silicon Transistors 

These devices are designed for general−purpose amplifier and low−speed switching applications. 

## **Features** 

- High DC Current Gain − 

   - hFE = 2500 (Typ) @ IC = 4.0 Adc 

- Collector Emitter Sustaining Voltage − @ 100 mAdc VCEO(sus) = 80 Vdc (Min) − BDX53B, 54B VCEO(sus) = 100 Vdc (Min) − BDX53C, 54C 

**www.onsemi.com** 

## **DARLINGTON 8 AMPERE COMPLEMENTARY SILICON POWER TRANSISTORS 80−100 VOLTS, 65 WATTS** 

• Low Collector−Emitter Saturation Voltage − 4 VCE(sat) = 2.0 Vdc (Max) @ IC = 3.0 Adc VCE(sat) = 4.0 Vdc (Max) @ IC = 5.0 Adc • Monolithic Construction with Built−In Base−Emitter Shunt Resistors • These Devices are Pb−Free and are RoHS Compliant* ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ **MAXIMUM RATINGS ÎÎÎÎÎÎÎÎÎÎÎÎ** ÎÎÎÎÎÎÎÎÎ **Î** ÎÎ **Î** ÎÎ 1 2 **Rating Symbol Value Unit** 3 **ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ** ÎÎÎÎÎÎÎÎÎÎÎÎCollector−Emitter VoltageBDX53B, BDX54B ÎÎVCEO **Î** ÎÎ80 **Î** ÎÎVdc **TO−220 CASE 221A** BDX53C, BDX54C 100 **ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ STYLE 1** Collector−Base Voltage VCB Vdc ÎÎÎÎÎÎÎÎÎÎÎÎBDX53B, BDX54B ÎÎ **Î** ÎÎ80 **Î** ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎBDX53C, BDX54C ÎÎ **Î** ÎÎ100 **Î** ÎÎ **MARKING DIAGRAM & PIN ASSIGNMENT** Emitter−Base Voltage VEB 5.0 Vdc ÎÎÎÎÎÎÎÎÎÎÎÎ **ÎÎÎÎÎÎÎÎÎÎÎÎ** ÎÎ **ÎÎÎÎ** ÎÎ **ÎÎÎÎ** ÎÎ **ÎÎ** Collector Current − Continuous IC 8.0 Adc 4 ÎÎÎÎÎÎÎÎÎÎÎÎ− Peak ÎÎ **Î** ÎÎ12 **Î** ÎÎ Collector **ÎÎÎÎÎÎÎÎÎÎÎÎ** Base Current **ÎÎÎ** IB **ÎÎÎ** 0.2 **ÎÎ** Adc **ÎÎÎÎÎÎÎÎÎÎÎÎ** Total Device Dissipation @ TDerate above 25 ° C C = 25 ° C **ÎÎÎ** PD **ÎÎÎ** 0.4865 **ÎÎ** W/W ° C ~~—~~ **ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ** BDX5xyG Operating and Storage Junction TJ, Tstg −65 to +150 ° C ÎÎÎÎÎÎÎÎÎÎÎÎTemperature Range ÎÎ **Î** ÎÎ **Î** ÎÎ AY   WW ~~oe Ny~~ ÎÎÎÎÎÎÎÎÎÎÎÎStresses exceeding those listed in the Maximum Ratings table may damage theÎÎ **Î** ÎÎ **Î** ÎÎ device. If any of these limits are exceeded, device functionality should not be 1 nt 3 assumed, damage may occur and reliability may be affected. Base 2 Emitter Collector ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ **THERMAL CHARACTERISTICS** BDX5xy = Device Code **ÎÎÎÎÎÎÎÎÎÎÎÎ Characteristic** ÎÎ **Symbol** ÎÎÎÎÎÎÎ **Î** ÎÎ **Max Î** ÎÎ **Unit** x = 3 or 4 **ÎÎÎÎÎÎÎÎÎÎÎÎ** Thermal Resistance, Junction−to−Ambient **Î** R JA **ÎÎÎÎ** 70 **ÎÎ** ° C/W A = Assembly Locationy = B or C ÎÎÎÎÎÎÎÎÎÎÎÎ ~~———~~ Thermal Resistance, Junction−to−Case ÎR JC **Î** ÎÎ1.92 **Î** ÎÎ ° C/W Y = Year WW = Work Week G = Pb−Free Package 

- *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

## **ORDERING INFORMATION** 

See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. 

Publication Order Number: **BDX53B/D** 

**1** 

© Semiconductor Components Industries, LLC, 2014 **November, 2014 − Rev. 15** 

## **BDX53B, BDX53C (NPN),  BDX54B, BDX54C (PNP)** 

**==> picture [256 x 181] intentionally omitted <==**

**----- Start of picture text -----**<br>
TA TC<br>4.0 80<br>3.0 60<br>T C<br>2.0 40<br>TA<br>1.0 20<br>0<br>0 20 40 60 80 100 120 140 160<br>T, TEMPERATURE (°C)<br>PD, POWER DISSIPATION (WATTS)<br>**----- End of picture text -----**<br>


**Figure 1. Power Derating** 

## **ELECTRICAL CHARACTERISTICS** (TC = 25 ° C unless otherwise noted) 

|**ELECTRICAL CHARACTERISTICS**(TC= 25°C unless otherwise noted)|||||
|---|---|---|---|---|
|**Characteristic**|**Symbol**|**Min**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**|||||
|Collector−Emitter Sustaining Voltage (Note 1)<br>(IC= 100 mAdc, IB= 0)<br>BDX53B, BDX54B<br>BDX53C, BDX54C|VCEO(sus)|80<br>100|−<br>−|Vdc|
|Collector Cutoff Current<br>(VCE= 40 Vdc, IB= 0)<br>BDX53B, BDX54B<br>(VCE= 50 Vdc, IB= 0)<br>BDX53C, BDX54C|ICEO|−<br>−|0.5<br>0.5|mAdc|
|Collector Cutoff Current<br>(VCB= 80 Vdc, IE= 0)<br>BDX53B, BDX54B<br>(VCB= 100 Vdc, IE= 0)<br>BDX53C, BDX54C|ICBO|−<br>−|0.2<br>0.2|mAdc|
|**ON CHARACTERISTICS**(Note 1)|||||
|DC Current Gain<br>(IC= 3.0 Adc, VCE= 3.0 Vdc)|hFE|750|−|−|
|Collector−Emitter Saturation Voltage<br>(IC= 3.0 Adc, IB= 12 mAdc)|VCE(sat)|−<br>−|2.0<br>4.0|Vdc|
|Base−Emitter Saturation Voltage<br>(IC= 3.0 Adc, IC= 12 mA)|VBE(sat)|−|2.5|Vdc|
|**DYNAMIC CHARACTERISTICS**|||||
|Small−Signal Current Gain<br>(IC= 3.0 Adc, VCE= 4.0 Vdc, f = 1.0 MHz)|hfe|4.0|−|−|
|Output Capacitance<br>(VCB= 10 Vdc, IE= 0, f = 0.1 MHz)<br>BDX53B, 53C<br>BDX54B, 54C|Cob|−<br>−|300<br>200|pF|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 1. Pulse Test: Pulse Width ≤ 300 � s, Duty Cycle ≤ 2%. 

**www.onsemi.com** 

**2** 

**BDX53B, BDX53C (NPN),  BDX54B, BDX54C (PNP)** 

**==> picture [492 x 611] intentionally omitted <==**

**----- Start of picture text -----**<br>
VCC 5.0<br>RB AND RD1C MUST BE FAST RECOVERY TYPES, e.g.: VARIED TO OBTAIN DESIRED CURRENT LEVELS -30 V 3.0 ts<br>�1N5825 USED ABOVE IB � 100 mA 2.0<br>�MSD6100 USED BELOW IB � 100 mA RC SCOPE<br>TUT 1.0 tf<br>V2 RB 0.7<br>APPROX 0.5<br>+8.0 V 51 D1 � 8.0 k � 120 0.3<br>0 tr<br>V1 +4.0 V 0.2 VCC = 30 V<br>APPROX-12 VtDUTY CYCLE = 1.0%r, tf � 10 ns25 �s for tFor NPN test circuit reverse all polaritiesand Vd and t2 = 0r, D1 is disconnected 0.070.050.10.1 IITCB1J/I = 25 = IB = 2500.2B2°C 0.3 0.5 td0.7 @ VBE(off)1.0  = 0 V2.0 3.0 5.0 7.0 10<br>IC, COLLECTOR CURRENT (AMP)<br>Figure 2. Switching Time Test Circuit<br>Figure 3. Switching Times<br>1.0<br>0.7 D = 0.5<br>0.5<br>0.3<br>0.2<br>0.2<br>0.1<br>0.1 0.05 P(pk) R�JC(t) = r(t) R�JC<br>0.07 0.02 R� JC  = 1.92°C/W<br>0.05 D CURVES APPLY FOR POWER<br>t 1 SINGLE PULSE TRAIN SHOWN<br>0.030.02 0.01 SINGLE PULSE DUTY CYCLE, D = t t 2 PULSE1 /t 2 T READ TIME AT t J(pk) - TC = P(pk) 1  R�JC(t)<br>0.010.01 0.02 0.03 0.05 0.1 0.2 0.3 0.5 1.0 2.0 3.0 5.0 10 20 30 50 100 200 300 500 1000<br>t, TIME OR PULSE WIDTH (ms)<br>Figure 4. Thermal Response<br>20 100 �s There are two limitations on the power handling ability of<br>10 500 �s a transistor average junction temperature and second<br>5.0 breakdown. Safe operating area curves indicate IC −VCEC −VCE −VCECE<br>5.0 ms limits of the transistor that must be observed for reliable<br>2.0 TJ = 150°C 1.0 ms dc operation, i.e., the transistor must not be subjected to greater<br>1.0 BONDING WIRE LIMITED dissipation than the curves indicate.<br>0.5 THERMALLY LIMITED @ TC = 25°C The data of Figure 5 is based on TJ(pk) = 150°C; TC isJ(pk) = 150°C; TC is = 150°C; TC is°C; TC isC; TC isC is is<br>�(SINGLE PULSE) variable depending on conditions. Second breakdown pulse<br>0.2 SECOND BREAKDOWN LIMITED limits are valid for duty cycles to 10% provided<br>0.1 CURVES APPLY BELOW RATED VCEO TJ(pk) � 150°C. TJ(pk) may be calculated from the data inJ(pk) � 150°C. TJ(pk) may be calculated from the data in� 150°C. TJ(pk) may be calculated from the data in 150°C. TJ(pk) may be calculated from the data in°C. TJ(pk) may be calculated from the data inC. TJ(pk) may be calculated from the data inJ(pk) may be calculated from the data in may be calculated from the data in<br>0.05 Figure 4. At high case temperatures, thermal limitations will<br>BDX53B, BDX54B<br>BDX53C, BDX54C reduce the power that can be handled to values less than the<br>0.021.0 2.0 3.0 5.0 7.0 10 20 30 50 70 100 limitations imposed by second breakdown.<br>VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)<br>μ<br>t, TIME (��s)<br>r(t) EFFECTIVE TRANSIENT<br>THERMAL RESISTANCE (NORMALIZED)<br>IC, COLLECTOR CURRENT (AMP)<br>**----- End of picture text -----**<br>


There are two limitations on the power handling ability of a transistor average junction temperature and second breakdown. Safe operating area curves indicate IC −VCEC −VCE −VCECE limits of the transistor that must be observed for reliable operation, i.e., the transistor must not be subjected to greater dissipation than the curves indicate. 

The data of Figure 5 is based on TJ(pk) = 150°C; TC isJ(pk) = 150°C; TC is = 150°C; TC is°C; TC isC; TC isC is is variable depending on conditions. Second breakdown pulse limits are valid for duty cycles to 10% provided TJ(pk) � 150°C. TJ(pk) may be calculated from the data inJ(pk) � 150°C. TJ(pk) may be calculated from the data in� 150°C. TJ(pk) may be calculated from the data in 150°C. TJ(pk) may be calculated from the data in°C. TJ(pk) may be calculated from the data inC. TJ(pk) may be calculated from the data inJ(pk) may be calculated from the data in may be calculated from the data in Figure 4. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. 

**Figure 5. Active−Region Safe Operating Area** 

**www.onsemi.com** 

**3** 

## **BDX53B, BDX53C (NPN),  BDX54B, BDX54C (PNP)** 

**==> picture [489 x 630] intentionally omitted <==**

**----- Start of picture text -----**<br>
10,000 300<br>5000 TJ = + 25°C<br>3000 200<br>2000<br>1000<br>500<br>300 TJ = 25°C 100 Cob<br>200<br>100 IVCCE = 3.0 A = 3.0 V 70 Cib<br>50<br>50<br>30 PNP PNP<br>20<br>NPN NPN<br>10 30<br>1.0 2.0 5.0 10 20 50 100 200 500 1000 0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 100<br>f, FREQUENCY (kHz) VR, REVERSE VOLTAGE (VOLTS)<br>Figure 6. Small-Signal Current Gain Figure 7. Capacitance<br>NPN PNP<br>BDX53B, 53C BDX54B, 54C<br>20,000 20,000<br>VCE = 4.0 V VCE = 4.0 V<br>10,000 10,000<br>5000 TJ = 150°C 5000 TJ = 150°C<br>3000 3000<br>2000 25°C 2000 25°C<br>1000 1000<br>-�55°C -�55°C<br>500 500<br>300 300<br>200 200<br>0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10<br>IC, COLLECTOR CURRENT (AMP) IC, COLLECTOR CURRENT (AMP)<br>Figure 8. DC Current Gain<br>3.0 3.0<br>TJ = 25°C TJ = 25°C<br>2.6 2.6<br>IC = 2.0 A 4.0 A 6.0 A IC = 2.0 A 4.0 A 6.0 A<br>2.2 2.2<br>1.8 1.8<br>1.4 1.4<br>1.0 1.0<br>0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 20 30 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 20 30<br>IB, BASE CURRENT (mA) IB, BASE CURRENT (mA)<br>C, CAPACITANCE (pF)<br>hFE, SMALL-SIGNAL CURRENT GAIN<br>hFE, DC CURRENT GAIN hFE, DC CURRENT GAIN<br>VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS) VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)<br>**----- End of picture text -----**<br>


**Figure 9. Collector Saturation Region** 

**www.onsemi.com** 

**4** 

**BDX53B, BDX53C (NPN),  BDX54B, BDX54C (PNP)** 

**==> picture [491 x 634] intentionally omitted <==**

**----- Start of picture text -----**<br>
3.0 3.0<br>TJ = 25°C TJ = 25°C<br>2.5 2.5<br>2.0 2.0<br>1.5 VBE(sat) @ IC/IB = 250 1.5 VBE @ VCE = 4.0 V<br>1.0 VBE @ VCE = 4.0 V 1.0 VBE(sat) @ IC/IB = 250<br>VCE(sat) @ IC/IB = 250<br>VCE(sat) @ IC/IB = 250<br>0.5 0.5<br>0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10<br>IC, COLLECTOR CURRENT (AMP) IC, COLLECTOR CURRENT (AMP)<br>Figure 10. “On” Voltages<br>NPN PNP<br>BDX53B, BDX53C BDX54B, BDX54C<br>+�5.0 +�5.0<br>+�4.0 +�4.0<br>*IC/IB � hFE/3 *IC/IB � hFE/3<br>+�3.0 +�3.0<br>+�2.0 25°C to 150°C +�2.0 25°C to 150°C<br>+�1.0 +�1.0<br>-�55°C to 25°C -�55°C to 25°C<br>0 0<br>-�1.0 *�VC for VCE(sat) -�1.0 *�VC for VCE(sat)<br>-�2.0 -�2.0<br>25°C to 150°C 25°C to 150°C<br>-�3.0-�4.0 �VB for VBE -�55 to 150°C -�3.0-�4.0 �VB for VBE -�55 to 150°C<br>-�5.0 -�5.0<br>0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10<br>IC, COLLECTOR CURRENT (AMP) IC, COLLECTOR CURRENT (AMP)<br>Figure 11. Temperature Coefficients<br>10 [5] 10 [5]<br>REVERSE FORWARD REVERSE FORWARD<br>10 [4] 10 [4]<br>VCE = 30 V V CE  = 30 V<br>10 [3] 10 [3]<br>10 [2] 10 [2]<br>T J  = 150°C T J  = 150°C<br>10 [1] 10 [1]<br>100°C 100°C<br>10 [0] 10 [0] 25°C<br>25°C<br>10 [-�1] 10 [-�1]<br>-�0.6 -�0.4 -�0.2 0 +�0.2 +�0.4 +�0.6 +�0.8 +�1.0 +�1.2 + 1.4 +�0.6 +�0.4 +�0.2 0 -�0.2 -�0.4 -�0.6 -�0.8 -�1.0 -�1.2 -�1.4<br>VBE, BASE‐EMITTER VOLTAGE (VOLTS) VBE, BASE‐EMITTER VOLTAGE (VOLTS)<br>V, VOLTAGE (VOLTS) V, VOLTAGE (VOLTS)<br>C)° C)°<br>V, TEMPERATURE COEFFICIENT (mV/ V, TEMPERATURE COEFFICIENT (mV/<br>θ θ<br>μ μ<br>, COLLECTOR CURRENT (��A) , COLLECTOR CURRENT (��A)<br>IC IC<br>**----- End of picture text -----**<br>


**Figure 12. Collector Cut−Off Region** 

**www.onsemi.com** 

**5** 

## **BDX53B, BDX53C (NPN),  BDX54B, BDX54C (PNP)** 

**==> picture [150 x 138] intentionally omitted <==**

**----- Start of picture text -----**<br>
NPN COLLECTOR<br>BDX53B<br>BDX53C<br>BASE<br>� 8.0 k � 120<br>EMITTER<br>**----- End of picture text -----**<br>


**==> picture [146 x 138] intentionally omitted <==**

**----- Start of picture text -----**<br>
PNP COLLECTOR<br>BDX54B<br>BDX54C<br>BASE<br>� 8.0 k � 120<br>EMITTER<br>**----- End of picture text -----**<br>


**Figure 13. Darlington Schematic** 

## **ORDERING INFORMATION** 

|**ORDERING INFORMATION**|||
|---|---|---|
|**Device**|**Package**|**Shipping**†|
|BDX53BG|TO−220<br>(Pb−Free)|50 Units / Rail|
|BDX53CG|TO−220<br>(Pb−Free)|50 Units / Rail|
|BDX54BG|TO−220<br>(Pb−Free)|50 Units / Rail|
|BDX54CG|TO−220<br>(Pb−Free)|50 Units / Rail|



†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

**www.onsemi.com** 

**6** 

**BDX53B, BDX53C (NPN),  BDX54B, BDX54C (PNP)** 

## **PACKAGE DIMENSIONS** 

**TO−220** CASE 221A−09 ISSUE AH 

**==> picture [233 x 185] intentionally omitted <==**

**----- Start of picture text -----**<br>
SEATING<br>−T− PLANE<br>B F C<br>T S<br>4<br>Q A<br>1 2 3 U<br>H<br>K<br>Z<br>L R<br>THe V J |<br>G<br>D<br>;<br>N<br>**----- End of picture text -----**<br>


- NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 

2. CONTROLLING DIMENSION: INCH. 

3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. 

|**DIM**|**INCHES**|**INCHES**|**MILLIMETERS**|**MILLIMETERS**|
|---|---|---|---|---|
||**MIN**<br>**INCHES**|**MAX**<br>**INCHES**|**MIN**<br>**MILLIMETERS**|**MAX**<br>**MILLIMETERS**|
|**DIM**<br>**A**|**MIN**<br>0.570|**MAX**<br>0.620|**MIN**<br>14.48|**MAX**<br>15.75|
|**B**|0.380|0.415|9.66|10.53|
|**B**<br>**C**|0.380<br>0.160|0.415<br>0.190|9.66<br>4.07|10.53<br>4.83|
|**D**|0.025|0.038|0.64|0.96|
|**F**|0.142|0.161|3.61|4.09|
|**G**|0.095|0.105|2.42|2.66|
|**H**|0.110|0.161|2.80|4.10|
|**J**|0.014|0.024|0.36|0.61|
|**K**|0.500|0.562|12.70|14.27|
|**L**|0.045|0.060|1.15|1.52|
|**N**|0.190|0.210|4.83|5.33|
|**Q**|0.100|0.120|2.54|3.04|
|**Q**<br>**R**<br>SSEEe|0.100<br>0.080<br>SSEEe|0.120<br>0.110<br>SSEEe|2.54<br>2.04<br>SSEEe|3.04<br>2.79<br>SSEEe|
|**S**<br>SSEEe|0.045<br>SSEEe|0.055<br>SSEEe|1.15<br>SSEEe|1.39<br>SSEEe|
|**S**<br>**T**<br>SSEEe|0.045<br>0.235<br>SSEEe|0.055<br>0.255<br>SSEEe|1.15<br>5.97<br>SSEEe|1.39<br>6.47<br>SSEEe|
|**U**<br>SSEEe|0.000<br>SSEEe|0.050<br>SSEEe|0.00<br>SSEEe|1.27<br>SSEEe|
|**V**<br>SSEEe|0.045<br>SSEEe|---<br>SSEEe|1.15<br>SSEEe|---<br>SSEEe|
|**Z**<br>SSEEe|---<br>SSEEe|0.080<br>SSEEe|---<br>SSEEe|2.04<br>SSEEe|



STYLE 1: PIN 1. BASE 2. COLLECTOR 3. EMITTER 4. COLLECTOR 

ON Semiconductor and the         are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf.  SCILLC reserves the right to make changes without further notice to any products herein.  SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time.  All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.  SCILLC does not convey any license under its patent rights nor the rights of others.  SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.  Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.  SCILLC is an Equal Opportunity/Affirmative Action Employer.  This literature is subject to all applicable copyright laws and is not for resale in any manner. 

## **PUBLICATION ORDERING INFORMATION** 

## **LITERATURE FULFILLMENT** : 

Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA **Phone** : 303−675−2175 or 800−344−3860 Toll Free USA/Canada **Fax** : 303−675−2176 or 800−344−3867 Toll Free USA/Canada **Email** : orderlit@onsemi.com 

**N. American Technical Support** : 800−282−9855 Toll Free USA/Canada 

**ON Semiconductor Website** : **www.onsemi.com** 

**Europe, Middle East and Africa Technical Support: Order Literature** : http://www.onsemi.com/orderlit Phone: 421 33 790 2910 **Japan Customer Focus Center** For additional information, please contact your local Phone: 81−3−5817−1050 Sales Representative 

**www.onsemi.com** 

**BDX53B/D** 

**7**