BD180G

## BD180G 

## Plastic Medium-Power Silicon PNP Transistor 

This device is designed for use in 5.0 to 10 Watt audio amplifiers and drivers utilizing complementary or quasi complementary circuits. 

## **http://onsemi.com** 

## **Features** 

- High DC Current Gain 

## **3.0 AMPERES POWER TRANSISTORS PNP SILICON 80 VOLTS, 30 WATTS** 

- BD180 is complementary with BD179 

- These Devices are Pb−Free and are RoHS Compliant* 

## **MAXIMUM RATINGS** 

**==> picture [455 x 200] intentionally omitted <==**

**----- Start of picture text -----**<br>
Rating Symbol Value Unit COLLECTOR<br>Collector−Emitter Voltage VCEO 80 Vdc 2<br>Collector−Base Voltage VCBO 80 Vdc<br>Emitter−Base Voltage VEBO 5.0 Vdc 3<br>Collector Current IC 1.0 Adc BASE<br>Base Current IB 2.0 Adc ,<br>1<br>Total Power Dissipation PD EMITTER<br>@ TC = 25 C 30 W<br>Derate above 25 C 240 mW/ C<br>Operating and Storage Junction  TJ, Tstg –65 to +150 C<br>e e ee<br>Stresses exceeding Maximum Ratings may damage the device. MaximumTemperature Range eee ee ee TO−225<br>Ratings are stress ratings only. Functional operation above the Recommended CASE 77<br>Operating Conditions is not implied. Extended exposure to stresses above the<br>STYLE 1<br>Recommended Operating Conditions may affect device reliability.<br>THERMAL CHARACTERISTICS 1 2 3<br>**----- End of picture text -----**<br>


|**Characteristic**<br>~~;}—______{_{~~|**Symbol**<br>~~—______{_{~~|**Max**<br>~~—______{_{_f~~|**Unit**<br>~~_f~~|
|---|---|---|---|
|Thermal Resistance, Junction−to−Case<br>~~;}—______{_{~~|R JC<br>~~—______{_{~~|4.16<br>~~—______{_{_f~~|C/W<br>~~_f~~|



**==> picture [90 x 8] intentionally omitted <==**

**----- Start of picture text -----**<br>
MARKING DIAGRAM<br>**----- End of picture text -----**<br>


YWW BD180G ~~=~~ i Y = Year WW = Work Week BD180 = Device Code G = Pb−Free Package 

**ORDERING INFORMATION Device Package Shipping** BD180G TO−225 500 Units/Box (Pb−Free) ~~Tr~~ 

- *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

Publication Order Number: 

**1** 

© Semiconductor Components Industries, LLC, 2013 **October, 2013 − Rev. 13** 

**BD180/D** 

**BD180G** 

## **ELECTRICAL CHARACTERISTICS** (TC = 25 � C unless otherwise noted) 

|**Characteristic**|**Symbol**|**Min**|**Max**|**Unit**|
|---|---|---|---|---|
|Collector−Emitter Sustaining Voltage (Note 1)<br>(IC= 0.1 Adc, IB= 0)|V(BR)CEO|80|−|Vdc|
|Collector Cutoff Current<br>(VCB= 80 Vdc, IE= 0)|ICBO|−|1.0|mAdc|
|Emitter Cutoff Current<br>(VBE= 5.0 Vdc, IC= 0)|IEBO|−|1.0|mAdc|
|DC Current Gain<br>(IC= 0.15 A, VCE= 2.0 V)<br>(IC= 1.0 A, VCE= 2.0 V)|hFE|40<br>15|250<br>−|−|
|Collector−Emitter Saturation Voltage (Note 1)<br>(IC= 1.0 Adc, IB= 0.1 Adc)|VCE(sat)|−|0.8|Vdc|
|Base−Emitter On Voltage (Note 1)<br>(IC= 1.0 Adc, VCE= 2.0 Vdc)|VBE(on)|−|1.3|Vdc|
|Current−Gain − Bandwidth Product<br>(IC= 250 mAdc, VCE= 10 Vdc, f = 1.0 MHz)|fT|3.0|−|MHz|



1. Pulse Test: Pulse Width ≤ 300 � s, Duty Cycle ≤ 2.0%. 

**==> picture [482 x 380] intentionally omitted <==**

**----- Start of picture text -----**<br>
10 The Safe Operating Area Curves indicate IC − VCEC − VCE− VCECE limits<br>7.0 100 �s<br>below which the device will not enter secondary breakdown.<br>5.0<br>1.0 ms Collector load lines for specific circuits must fall within the<br>3.0 applicable Safe Area to avoid causing a catastrophic failure. To<br>2.0 5.0 ms<br>insure operation below the maximum TJ, power−temperatureJ, power−temperature, power−temperature<br>1.00.7 TJ = 150°C dc derating must be observed for both steady state and pulsepower conditions.power conditions.<br>0.5 SECONDARY BREAKDOWN LIMITATION<br>THERMAL LIMITATION<br>0.3<br>(BASE‐EMITTER DISSIPATION IS<br>0.2 SIGNIFICANT ABOVE IC = 20 AMP)<br>PULSE DUTY CYCLE < 10% BD180<br>0.1<br>1.0 2.0 3.0 5.0 7.0 10 20 30 50 70 100<br>VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)<br>Figure 1. Active Region Safe Operating Area<br>1.0<br>TJ = 25°C<br>0.8<br>IC = 0.1 A 0.25 A 0.5 A 1.0 A<br>0.6<br>0.4<br>0.2<br>0<br>0.2 0.5 1.0 2.0 5.0 10 20 50 100 200<br>IB, BASE CURRENT (mA)<br>IC, COLLECTOR CURRENT (AMP)<br>VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)<br>**----- End of picture text -----**<br>


The Safe Operating Area Curves indicate IC − VCEC − VCE− VCECE limits below which the device will not enter secondary breakdown. Collector load lines for specific circuits must fall within the applicable Safe Area to avoid causing a catastrophic failure. To insure operation below the maximum TJ, power−temperatureJ, power−temperature, power−temperature derating must be observed for both steady state and pulsepower conditions.power conditions. 

**Figure 2. Collector Saturation Region** 

**http://onsemi.com** 

**2** 

**BD180G** 

**==> picture [491 x 167] intentionally omitted <==**

**----- Start of picture text -----**<br>
1000 1.5<br>700<br>500 V CE  = 2.0 V 1.2 TJ = 25°C<br>300<br>200 T J  = + 150°C<br>0.9<br>100 TJ = + 25 ° C VBE(sat) @ IC/IB = 10<br>70 0.6<br>50 TJ = - 55°C VBE @ VCE = 2.0 V<br>30<br>0.3<br>20<br>VCE(sat) @ IC/IB = 10<br>10 0<br>2.0 3.0 5.0 10 20 30 50 100 200 300 500 1000 2000 2.0 3.0 5.0 10 20 30 50 100 200 300 500 1000 2000<br>IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)<br>VOLTAGE (VOLTS)<br>hFE, DC CURRENT GAIN (NORMALIZED)<br>**----- End of picture text -----**<br>


**Figure 3. Current Gain** 

**Figure 4. “On” Voltages** 

**==> picture [494 x 167] intentionally omitted <==**

**----- Start of picture text -----**<br>
1.0<br>0.7 D = 0.5<br>0.5<br>0.3 D = 0.2<br>0.2 D = 0.1<br>SINGLE PULSE<br>0.1 D = 0.05 � � JC JC (t) = r(t)   = 4.16°C/W MAX �JC P(pk)<br>0.07 D = 0.01 �JC = 3.5°C/W TYP<br>0.05 D CURVES APPLY FOR POWER<br>PULSE TRAIN SHOWN t 1<br>0.03 t 2<br>0.02 READ TIME AT t 1<br>T J(pk) - T C  = P (pk) � JC (t) DUTY CYCLE, D = t 1 /t 2<br>0.010.01 0.02 0.03 0.05 0.1 0.2 0.3 0.5 1.0 2.0 3.0 5.0 10 20 30 50 100 200 300 500 1000<br>t, TIME or PULSE WIDTH (ms)<br>THERMAL RESISTANCE<br>r(t), NORMALIZED EFFECTIVE TRANSIENT<br>**----- End of picture text -----**<br>


**Figure 5. Thermal Response** 

**http://onsemi.com** 

**3** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

**==> picture [472 x 503] intentionally omitted <==**

**----- Start of picture text -----**<br>
TO−225<br>CASE 77−09<br>4 ISSUE AD<br>DATE 25 MAR 2015<br>1 3<br>2 3 2 1<br>FRONT VIEW BACK VIEW<br>SCALE 1:1<br>E NOTES:<br>1. DIMENSIONING AND TOLERANCING PER<br>A1 ASME Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETERS.<br>Q A 3. NUMBER AND SHAPE OF LUGS OPTIONAL.<br>a<br>PIN 4 MILLIMETERS<br>BACKSIDE TAB DIM MIN MAX<br>A 2.40 3.00<br>A1 1.00 1.50<br>b 0.60 0.90<br>D b2 0.51 0.88<br>P c 0.39 0.63<br>D 10.60 11.10<br>E 7.40 7.80<br>1 2 3<br>a t e 2.04 2.54<br>L 14.50 16.63<br>Jt L1 1.27 2.54<br>P 2.90 3.30<br>L1 Q 3.80 4.20<br>GENERIC<br>L<br>MARKING DIAGRAM*<br>YWW<br>XX<br>XXXXXG<br>2X b2 Y = Year<br>WW = Work Week<br>2X e XXXXX = Device Code<br>b c G = Pb−Free Package<br>*This information is generic. Please refer to<br>FRONT VIEW SIDE VIEW<br>device data sheet for actual part marking.<br>Pb−Free indicator, “G” or microdot “ ”,<br>may or may not be present.<br>STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5:<br>PIN 1. EMITTER PIN 1. CATHODE PIN 1. BASE PIN 1. ANODE 1 PIN 1. MT 1<br>2., 4. COLLECTOR 2., 4. ANODE 2., 4. COLLECTOR 2., 4. ANODE 2 2., 4. MT 2<br>3. BASE 3. GATE 3. EMITTER 3. GATE 3. GATE<br>STYLE 6: STYLE 7: STYLE 8: STYLE 9: STYLE 10:<br>PIN 1. CATHODE PIN 1. MT 1 PIN 1. SOURCE PIN 1. GATE PIN 1. SOURCE<br>2., 4. GATE 2., 4. GATE 2., 4. GATE 2., 4. DRAIN 2., 4. DRAIN<br>3. ANODE 3. MT 2 3. DRAIN 3. SOURCE 3. GATE<br>**----- End of picture text -----**<br>


DATE 25 MAR 2015 

Electronic versions are uncontrolled except when accessed directly from the Document Repository. **DOCUMENT NUMBER: 98ASB42049B** Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. **DESCRIPTION: TO−225 PAGE 1 OF 1** ~~re~~ ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 

www.onsemi.com 

© Semiconductor Components Industries, LLC, 2019 

**onsemi** , , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “ **onsemi** ” or its affiliates and/or subsidiaries in the United States and/or other countries. **onsemi** owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of **onsemi** ’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. **onsemi** reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as−is” and **onsemi** makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does **onsemi** assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using **onsemi** products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by **onsemi** . “Typical” parameters which may be provided in **onsemi** data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. **onsemi** does not convey any license under any of its intellectual property rights nor the rights of others. **onsemi** products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use **onsemi** products for any such unintended or unauthorized application, Buyer shall indemnify and hold **onsemi** and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that **onsemi** was negligent regarding the design or manufacture of the part. **onsemi** is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

## **PUBLICATION ORDERING INFORMATION** 

**LITERATURE FULFILLMENT** : **TECHNICAL SUPPORT Email Requests to:** orderlit@onsemi.com **North American Technical Support: Europe, Middle East and Africa Technical Support:** Voice Mail: 1 800−282−9855 Toll Free USA/Canada Phone: 00421 33 790 2910 **onsemi Website:** www.onsemi.com Phone: 011 421 33 790 2910 For additional information, please contact your local Sales Representative 

◊ 

**==> picture [232 x 43] intentionally omitted <==**