AUIRLR3636
Power MOSFET, N Channel, 60 V, 50 A, 0.0054 ohm, TO-252AA, Surface Mount
- Manufacturer: INFINEON
- Product type: Single MOSFETs
- No. of Pins: 3Pins
- Channel Type: N Channel
- Power Dissipation: 143W
- Transistor Mounting: Surface Mount
- Transistor Polarity: N Channel
- Power Dissipation Pd: 143W
- Rds(on) Test Voltage: 10V
- On Resistance Rds(on): 0.0054ohm
- Transistor Case Style: TO-252AA
- Drain Source Voltage Vds: 60V
- Operating Temperature Max: 175°C
- Continuous Drain Current Id: 50A
- Drain Source On State Resistance: 0.0054ohm
- Gate Source Threshold Voltage Max: 1V
| Delivery and price | |
|---|---|
| Units per pack | 10 |
| Price | 0.771 € |
| Current stock | 10+ |
| Lead time | 30 days |
## ~~Cinfin eon~~
> **AUTOMOTIVE GRADE** AUIRLR3636 ~~Cinfin eon —~~ **Features** HEXFET[® ] Power MOSFET Advanced Process Technology **VDSS 60V** Ultra Low On-Resistance **RDS(on) typ. 5.4m** Logic Level Gate Drive **max. 6.8m** 175°C Operating Temperature Fast Switching **ID (Silicon Limited) 99A** Repetitive Avalanche Allowed up to Tjmax ~~——~~ **ID (Package Limited) 50A** Lead-Free, RoHS Compliant Automotive Qualified * D **Description** S Specifically designed for Automotive applications, this HEXFET® G Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional D-Pak AUIRLR3636 features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient **G D S** and reliable device for use in Automotive applications and a wide Gate Drain Source
> variety of other applications. ~~-——}——_ + —_~~ **Standard Pack Base part number Package Type Orderable Part Number Form Quantity** Tube 75 AUIRLR3636 AUIRLR3636 D-Pak ~~el ———~~ Tape and Reel Left 3000 AUIRLR3636TRL **Absolute Maximum Ratings** Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified.
|**Symbol**|**Parameter**|**Max.**|**Units**|
|---|---|---|---|
|ID@ TC= 25°C<br>~~———_——~~|Continuous Drain Current, VGS@ 10V (Silicon Limited)<br>~~———_——~~|99<br>~~———_——~~|A<br>~~———_——~~|
|ID @TC= 100°C<br>~~———_——~~|Continuous Drain Current,VGS @10V(Silicon Limited)<br>~~———_——~~|70<br>~~———_——~~||
|ID @TC= 25°C<br>~~———_——~~|Continuous Drain Current, VGS @10V(Package Limited)<br>~~———_——~~|50<br>~~———_——~~||
|IDM<br>~~———_——~~|Pulsed Drain Current<br>~~———_——~~|396<br>~~———_——~~||
|PD@TC= 25°C<br>~~———_——~~|Maximum Power Dissipation<br>~~———_——~~|143<br>~~———_——~~|W<br>~~———_——~~|
||Linear Derating Factor|0.95|W/°C|
|VGS<br>~~——————~~|Gate-to-SourceVoltage<br>~~——————~~|± 16<br>~~——————~~|V<br>~~——————~~|
|EAS<br>~~——————~~|Single Pulse Avalanche Energy (ThermallyLimited) <br>~~——————~~|170<br>~~——————~~|mJ<br>~~——————~~|
|IAR<br>~~——————~~|Avalanche Current<br>~~——————~~|See Fig. 14, 15, 22a, 22b<br>~~——————~~|A<br>~~——————~~|
|EAR<br>~~——————~~|Repetitive Avalanche Energy <br>~~——————~~||mJ<br>~~——————~~|
|dv/dt<br>~~——————~~|Peak Diode Recovery <br>~~——————~~|22<br>~~——————~~|V/ns<br>~~——————~~|
|TJ<br>TSTG<br>~~a~~|Operating Junction and<br>Storage Temperature Range<br>~~a~~|-55 to + 175<br>~~a~~|°C<br>~~a~~|
|~~a~~|SolderingTemperature,for 10 seconds(1.6mm from case)<br>~~a~~|300<br>~~a~~||
1
2015-11-4
~~Cinfin eon~~
AUIRLR3636 ~~LLL~~
## **Static @ TJ = 25°C (unless otherwise specified)**
|Qg<br>~~ae~~|Total Gate Charge<br>~~es~~|–––<br>~~es~~|33<br>~~es~~|49<br>~~es~~|nC|ID= 50A<br>VDS= 30V<br>VGS= 4.5V|
|---|---|---|---|---|---|---|
|g<br>Qgs<br>~~ae~~|Gate-to-Source Charge<br>~~es~~|–––<br>~~es~~|11<br>~~es~~|–––<br>~~es~~|||
|Qgd<br>~~a ~~<br>~~ee~~|Gate-to-Drain Charge<br> ~~ee~~<br>~~es~~|–––<br>~~ee~~<br>~~es~~|15<br>~~ee~~<br>~~es~~|–––<br>~~ee~~<br>~~es~~|||
|gd<br>Qsync<br>~~ee~~<br>~~ee~~|Total Gate Charge Sync. (Qg -Qgd)<br>~~es~~<br>~~ee~~|–––<br>~~es~~<br>~~ee~~|18<br>~~es~~<br>~~ee~~|–––<br>~~es~~<br>~~ee~~|||
|sync<br>td(on)<br>~~ee~~<br>~~ee~~<br>~~es~~|ggd<br>Turn-On Delay Time<br>~~es~~<br>~~ee~~<br>~~ee~~|–––<br>~~es~~<br>~~ee~~<br>~~ee~~|45<br>~~es~~<br>~~ee~~<br>~~ee~~|–––<br>~~es~~<br>~~ee~~<br>~~ee~~|ns|VDD= 39V<br>ID= 50A<br>RG= 7.5<br>VGS= 4.5V|
|d(on)<br>tr<br>~~ee~~<br>~~es~~|RiseTime<br>~~ee~~<br>~~ee~~|–––<br>~~ee~~<br>~~ee~~|216<br>~~ee~~<br>~~ee~~|–––<br>~~ee~~<br>~~ee~~|||
|td(off)<br>~~es~~<br>~~es~~|Turn-Off DelayTime<br>~~ee~~<br>~~es~~|–––<br>~~ee~~<br>~~es~~|43<br>~~ee~~<br>~~es~~|–––<br>~~ee~~<br>~~es~~|||
|d(off)<br>tf<br>~~es~~|Fall Time<br>~~es~~|–––<br>~~es~~|69<br>~~es~~|–––<br>~~es~~|||
|Ciss<br>~~es~~<br>~~a ~~|Input Capacitance<br>~~es~~<br> ~~es~~|–––<br>~~es~~<br>~~es~~|3779<br>~~es~~<br>~~es~~|–––<br>~~es~~<br>~~es~~|pF|VGS= 0V<br>VDS= 50V<br>ƒ= 1.0MHz<br>~~PO~~|
|Coss<br>~~ae~~<br>~~ae~~|OutputCapacitance<br>~~ee~~<br>|–––<br>~~ee~~<br>~~es~~|332<br>~~ee~~|–––<br>~~ee~~|||
|Crss<br>~~ae~~<br>~~ae~~<br>~~es~~|Reverse Transfer Capacitance<br>~~ee~~<br>~~es~~<br>|–––<br>~~ee~~<br>~~es~~|163<br>~~ee~~|–––<br>~~ee~~|||
|Coss eff.(ER)<br>~~ae~~<br>~~ae~~<br>~~es~~|Effective Output Capacitance (EnergyRelated)<br>~~ee~~<br>~~es~~<br>|–––<br>~~ee~~<br>~~es~~|437<br>~~ee~~|–––<br>~~ee~~||VGS=0V,VDS=0Vto48V<br>~~PO~~|
|Coss eff.(TR)<br>~~ae ~~<br>~~es~~|Effective Output Capacitance (TimeRelated)<br> ~~es~~<br>~~a~~|–––<br>~~es~~|636|–––||VGS=0V,VDS=0Vto48V<br>~~PO~~<br>~~ee~~|
|**Diode Characteristics**<br> ~~es~~<br>~~PO~~<br>~~es~~|||||||
|~~pf~~<br>~~fff)~~|**Parameter **<br>~~pf~~<br>~~fff)~~|**Min.**<br>~~pf~~<br>~~fff)~~|**Typ. M**<br>~~pf~~<br>~~fff)~~|**. Max.**<br>~~pf~~<br>~~fff)~~|**Units**<br>~~pf~~<br>~~fff)~~|**Conditions**<br>~~pf~~<br>~~fff)~~<br>~~ee~~|
|IS<br>~~pf~~<br>~~fff)~~|Continuous Source Current<br>(Body Diode)<br>~~pf~~<br>~~fff)~~|–––<br>~~pf~~<br>~~fff)~~|–––<br>~~pf~~<br>~~fff)~~|99<br>~~pf~~<br>~~fff)~~|A<br>~~pf~~<br>~~fff)~~<br>~~rs~~|MOSFET symbol<br>showing the<br>integral reverse<br>p-n junction diode.<br>~~pf~~<br>~~fff)~~<br>~~ee~~<br>~~rs~~|
|ISM<br>~~fff)~~<br>~~es~~|Pulsed Source Current<br>(Body Diode)<br>~~fff)~~<br>~~rs~~|–––<br>~~fff)~~<br>~~rs~~|–––<br>~~fff)~~<br>~~rs~~<br>~~ts~~|396<br>~~fff)~~<br>~~rs~~<br>~~ts~~|||
|VSD<br>~~fff)~~<br>~~es~~|Diode Forward Voltage<br>~~fff)~~<br>~~rs~~|–––<br>~~fff)~~<br>~~rs~~|–––<br>~~fff)~~<br>~~rs~~<br>~~ts~~|1.3<br>~~fff)~~<br>~~rs~~<br>~~ts~~|V<br>~~fff)~~<br>~~rs~~|TJ= 25°C,IS= 50A,VGS= 0V<br>~~fff)~~<br>~~ee~~<br>~~rs~~|
|trr<br>~~es~~<br>~~e~~|Reverse Recovery Time<br>~~rs~~<br>~~ee~~|–––<br>~~rs~~<br>~~e~~|27<br>~~rs~~<br>~~ts ~~<br>~~e~~|–––<br>~~rs~~<br> ~~ts~~<br>~~e~~|ns<br>~~rs~~<br>~~e~~|TJ =25°C<br>~~V = 51V,~~<br>~~rs~~|
|||–––<br>~~e~~|32<br>~~e~~|–––<br>~~e~~||TJ= 125°C<br>~~V~~R~~= 51V,~~<br>~~I = 50A~~|
|Qrr<br>~~e~~<br>~~Sf~~<br>~~es~~|Reverse Recovery Charge<br>~~ee~~<br>~~Sf~~<br>~~es~~|–––<br>~~e~~<br>~~Sf~~|31<br>~~e~~<br>~~Sf~~|–––<br>~~e~~<br>~~Sf~~|nC <br>~~e~~<br>~~Sf~~<br>~~es~~|TJ= 25°C<br>~~I~~F~~= 50A~~<br>~~di/dt = 100A/µs~~|
|||–––<br>~~Sf~~<br>~~es~~|43<br>~~Sf~~<br>~~es~~|–––<br>~~Sf~~<br>~~es~~||TJ= 125°C<br>~~di/dt = 100A/µs~~|
|~~es~~|~~es~~|–––<br>~~es~~|2.1<br>~~es~~|–––<br>~~es~~|A<br>~~es~~|TJ= 25°C|
|ton<br>~~es~~|Forward Turn-On Time<br>~~es~~|Intrinsic turn-on time is negligible(turn-on is dominated byLS+LD)<br>~~es~~|||||
## **Notes:**
- Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 50A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements.
- Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11)
- Limited by TJmax , starting TJ = 25°C, L = 0.136mH, RG = 25, IAS = 50A, VGS =10V. Part not recommended for use above this value.
- ISD 50A, di/dt 1109A/µs, VDD V(BR)DSS, TJ 175°C.
- Pulse width 400µs; duty cycle 2%.
- Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
- Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
- When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994
- R is measured at TJ approximately 90°C.
2
2015-11-4
AUIRLR3636 ~~LLL~~
## ~~Cinfineon~~
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1000 1000<br>VGS VGS<br>TOP 15V TOP 15V<br>10V 10V<br>4.5V 4.5V<br>4.0V 4.0V<br>100 3.5V 3.5V<br>3.3V 3.3V<br>3.0V 100 3.0V<br>BOTTOM 2.7V BOTTOM 2.7V<br>Z<br>10<br>2.7V<br>10<br>1 aa 2.7V<br>60µs PULSE WIDTH<br>60µs PULSE WIDTH<br>Tj = 175°C<br>Tj = 25°C<br>0.1 1<br>0.1 1 10 100 0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)<br>Fig. 1 Typical Output Characteristics Fig. 2 Typical Output Characteristics<br>1000 2.5<br>ID = 50A<br>VGS = 10V<br>100 | eer 2.0 CHUL<br>TJ = 175°C<br>TJ = 25 ° C<br>10 1.5<br>ee<br>1<br>1.0<br>cae VDS = 25V LUTE<br>60µs PULSE WIDTH<br>0.1<br>0.5<br>1 Fife 2 3 4 5 6 7 -60 aC -40 -20 0 20 40 60 80 LL 100 120 140160 180<br>VGS, Gate-to-Source Voltage (V) TJ , Junction Temperature (°C)<br>RDS(on) , Drain-to-Source On Resistance (Normalized)<br>ID, Drain-to-Source Current (A)<br>ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>
**Fig. 2** Typical Output Characteristics
**Fig. 3** Typical Transfer Characteristics
**Fig. 4** Normalized On-Resistance vs. Temperature
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100000 5.0<br>VGS = 0V, f = 1 MHZ<br>Ciss = C gs + Cgd, C ds SHORTED 4.5 I D = 50A V DS = 48V<br>C Crss oss = C = Cds gd + Cgd 4.0 VDS= 30V V DS = 12V<br>a 3.5 LL<br>10000<br>3.0<br>Corl Ciss HEE<br>2.5<br>2.0<br>1000 Coss 1.5<br>Siig Crss i n 1.0<br>0.5<br>100 MSS 0.0 foctacefj i} |tty<br>1 10 100 0 5 10 15 20 25 30 35 40<br>a = REEEEEFE<br>VDS, Drain-to-Source Voltage (V) QG, Total Gate Charge (nC)<br>C, Capacitance (pF)<br>VGS, Gate-to-Source Voltage (V)<br>**----- End of picture text -----**<br>
**Fig 5.** Typical Capacitance vs. Drain-to-Source Voltage
**Fig 6.** Typical Gate Charge vs. Gate-to-Source Voltage
3 ~~=—~~
2015-11-4
AUIRLR3636 ~~_~~
## ~~Cinfineon~~
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1000<br>TJ = 175°C<br>100<br>oe<br>10 EV/4aee TJ = 25°C<br>1 ffi<br>V GS = 0V<br>0.1 fe<br>0.1 0.4 0.7 1 1.3 1.6 1.9<br>VSD, Source-to-Drain Voltage (V)<br>ISD, Reverse Drain Current (A)<br>**----- End of picture text -----**<br>
**Fig. 7** Typical Source-to-Drain Diode Forward Voltage
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110<br>100 Limited By Package<br>90<br>Reo<br>80<br>70 pA<br>60<br>7 oe<br>50<br>40 SEE =<br>+++<br>30<br>20 en<br>10<br>SSSI<br>0<br>25 50 75 100 125 150 175<br> TC , Case Temperature (°C)<br>Fig. 9 Maximum Drain Current vs. Case Temperature<br>0.8<br>0.6<br>0.4<br>0.2<br>0.0<br>0 5 10 15 20 25 30 35 40 45 50 55 60 65<br>VDS, Drain-to-Source Voltage (V)<br>Energy (µJ)<br>ID, Drain Current (A)<br>**----- End of picture text -----**<br>
**Fig. 9** Maximum Drain Current vs. Case Temperature
**Fig. 11** Typical COSS Stored Energy
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1000<br>OPERATION IN THIS AREA LIMITED BY RDS(on)<br>100 1 0 0µsec<br>iat neti Sail<br>LIMITED BY PACKAGE i<br>10<br>1msec<br>10msec<br>1 HAL<br>Tc = 25°C DC<br>Tj = 175°C<br>Single Pulse<br>AY<br>0.1<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 8. Maximum Safe Operating Area<br>80<br>Id = 5mA<br>75<br>LTTE<br>70<br>BEORREDZ Cann<br>65 aTPA<br>60<br>a<br>55 EEE<br>50 EEE<br>-60 -40 -20 0 20 40 60 80 100 120 140160 180<br>TJ , Temperature ( °C )<br>Fig 10. Drain-to-Source Breakdown Voltage<br>800<br>ID<br>700<br>TOP 5.69A<br>10.64A<br>\<br>600<br>BOTTOM 50A<br>cot KEELE<br>500<br>400 PINEEEE EEL E<br>300<br>NENT TT TT<br>200<br>ee<br>1000 Pit | | CSA<br>25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>EAS , Single Pulse Avalanche Energy (mJ)<br>V(BR)DSS, Drain-to-Source Breakdown Voltage (V)<br>ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>
**Fig 8.** Maximum Safe Operating Area
**Fig 10.** Drain-to-Source Breakdown Voltage
**Fig 12.** Maximum Avalanche Energy vs. Drain Current
2015-11-4
4
~~Cinfineon~~
AUIRLR3636 ~~LLL~~
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10<br>1<br>D = 0.50<br>Ri (°C/W) i (sec)<br>0.1 a 0.100.200.05 J J R1 R1 R2 R2 R3 R3 R4R4 CC 0.02028 0.29406 0.000011 0.000158<br>0.020.01 1 1 2 2 3 3 4 4 0.49179 0.001393<br>Ci= iRi<br>0.01 ere) Ci= iRi 2 0.24336 0.00725<br>SINGLE PULSE Notes:<br>( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2<br>2. Peak Tj = P dm x Zthjc + Tc<br>vail |<br>0.001<br>Tel int ml<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case<br>1000<br>Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming Tj = 150°C and<br>Tstart =25°C (Single Pulse)<br>100 Bienen es|——————E——<br>0.01<br>10 CPSU 0.05 | TTT<br>0.10<br>1 BA 4 SRAoSmae<br>| Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25°C and<br>Tstart = 150°C.<br>a<br>0.1<br>en<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Fig 14. Typical Avalanche Current Vs. Pulse width<br>200<br>TOP Single Pulse Notes on Repetitive Avalanche Curves , Figures 14, 15:<br>BOTTOM 1.0% Duty Cycle (For further info, see AN-1005 at www.infineon.com)<br>ID = 50A 1. Avalanche failures assumption:<br>150 Purely a thermal phenomenon and failure occurs at a temperature far in<br>excess of Tjmax. This is validated for every part type. jmax. This is validated for every part type. . This is validated for every part type.<br>a<br>2. Safe operation in Avalanche is allowed as long as Tjmaxjmax is not exceeded.<br>3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.<br>100<br>4. PD (ave) = Average power dissipation per single avalanche pulse.<br>5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase<br>SUT<br>during avalanche).<br>6. Iav = Allowable avalanche current.<br>50<br>7. T = Allowable rise in junction temperature, not to exceedT = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax jmax (assumed as<br>HINT 25°C in Figure 13, 14).<br>tav = Average time in avalanche.<br>ANS<br>0 D = Duty cycle in avalanche = tav ·f<br>25 50 75 100 125 150 175 ZthJC(D, tav) = Transient thermal resistance, see Figures 13)<br>Starting TJ , Junction Temperature (°C)<br>EAR , Avalanche Energy (mJ)<br>Avalanche Current (A)<br>Thermal Response ( Z thJC ) °C/W<br>**----- End of picture text -----**<br>
- Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. jmax. This is validated for every part type. . This is validated for every part type.
2. Safe operation in Avalanche is allowed as long as Tjmaxjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche).
7. T = Allowable rise in junction temperature, not to exceedT = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax jmax (assumed as 25°C in Figure 13, 14).
**PD (ave) = 1/2 ( 1.3·BV·Iav) =** **T/ ZthJC Iav = 2** **T/ [1.3·BV·Zth]**
**Fig 15.** Maximum Avalanche Energy Vs. Temperature
**EAS (AR) = PD (ave)·tav**
2015-11-4
5
AUIRLR3636
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3.0<br>2.5<br>Pees<br>2.0 Ra ek<br>PLEPSSS<br>1.5<br>ID = 100µA eaaNSNn<br>1.0 ID = 250µA<br>ID = 1.0mA<br>ID = 1.0A<br>ESR<br>0.5<br>0.0 TL ELLErt TELELL<br>-75 -50 -25 0 25 50 75 100 125 150 175<br>TJ , Temperature ( °C )<br>VGS(th), Gate threshold Voltage (V)<br>**----- End of picture text -----**<br>
**Fig 16.** Threshold Voltage vs. Temperature
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16<br>IF = 30A<br>14 Ff |<br>VR = 51V<br>12 T J = 25°C<br>TJ = 125°C<br>10 |meeLe |<br>Am<br>8<br>6<br>—¢-| |<br>4<br>2 pt}ef | | | |<br>0 Ff | ft<br>0 200 400 600 800 1000<br>diF /dt (A/µs)<br>IRRM (A)<br>**----- End of picture text -----**<br>
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14<br>IF = 20A<br>12 V R = 51V<br>TJ = 25°C ae<br>10<br>TJ = 125°C<br>aRevA<br>8<br>A<br>6<br>| eer<br>4<br>a<br>2<br>0 aFt[| [ [i<br>0 200 400 600 800 1000<br>diF /dt (A/µs)<br>Fig. 17 - Typical Recovery Current vs. dif/dt<br>350<br>IF = 20A<br>300 V R = 51V | ||<br>TJ = 25°C<br>250 TJ = 125°C<br>200 | |ry<br>7<br>150 Tt LT<br>100 ft LA<br>50 hetow—<br>0<br>PT | | ft<br>0 200 400 600 800 1000<br>diF /dt (A/µs)<br>IRRM (A)<br>QRR (nC)<br>**----- End of picture text -----**<br>
**Fig. 18** - Typical Recovery Current vs. dif/dt
**Fig. 19** - Typical Stored Charge vs. dif/dt
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350<br>IF = 30A<br>1<br>300 V R = 51V<br>TJ = 25°C<br>250 TJ = 125°C Ttae _e7<br>200<br>150<br>a<br>100<br>a<br>ee<br>50<br>AT<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/µs)<br>Fig. 20 - Typical Stored Charge vs. dif/dt<br>6 2015-11-4<br>a<br>QRR (nC)<br>**----- End of picture text -----**<br>
~~Cinfi~~
## AUIRLR3636 ~~_~~
**Fig 21.** Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
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15V<br>L DRIVER<br>VDS<br>RG D.U.T +<br>- [V][DD]<br>JL IAS<br>20V<br>a tp ie Y 0.01<br>**----- End of picture text -----**<br>
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V(BR)DSS<br>< tp ><br>IAS<br>**----- End of picture text -----**<br>
**Fig 22a.** Unclamped Inductive Test Circuit
**Fig 22b.** Unclamped Inductive Waveforms
**Fig 23a.** Switching Time Test Circuit
**Fig 23b.** Switching Time Waveforms
**==> picture [172 x 117] intentionally omitted <==**
**----- Start of picture text -----**<br>
Id<br>Vds<br>Vgs<br>Vgs(th)<br>{<br>fi !! ff Hi '<br>Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>
**Fig 24a.** Gate Charge Test Circuit
**Fig 24b.** Gate Charge Waveform
2015-11-4
7
AUIRLR3636 ~~LLL~~
## ~~Cinfin eon~~
**D-Pak (TO-252AA) Package Outline** (Dimensions are shown in millimeters (inches))
## **D-Pak (TO-252AA) Part Marking Information**
**==> picture [330 x 148] intentionally omitted <==**
**----- Start of picture text -----**<br>
Part Number AULR3636<br>Date Code<br>IR Logo T éaR YWWA Y= Year<br>WW= Work Week<br><br>XX XX<br>[|sd<br>Lot Code<br>**----- End of picture text -----**<br>
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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AUIRLR3636 ~~LLL~~
## ~~Cinfineon~~
**D-Pak (TO-252AA) Tape & Reel Information** (Dimensions are shown in millimeters (inches))
**==> picture [429 x 370] intentionally omitted <==**
**----- Start of picture text -----**<br>
TR TRR TRL<br>16.3 ( .641 ) 16.3 ( .641 )<br>15.7 ( .619 ) 15.7 ( .619 )<br>12.1 ( .476 ) FEED DIRECTION 8.1 ( .318 ) FEED DIRECTION<br>11.9 ( .469 ) 7.9 ( .312 )<br>NOTES :<br>1. CONTROLLING DIMENSION : MILLIMETER.<br>2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).<br>3. OUTLINE CONFORMS TO EIA-481 & EIA-541.<br> 13 INCH<br>16 mm<br>**----- End of picture text -----**<br>
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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|**Qualification Information**|**Qualification Information**|||
|---|---|---|---|
|**Qualification Level**||Automotive<br>(per AEC-Q101)||
|||Comments: This part number(s) passed Automotive qualification. Infineon’s<br>Industrial and Consumer qualification level is granted by extension of the higher<br>Automotive level.||
|**Moisture Sensitivity Level**||D-Pak|MSL1|
|**ESD**|Machine Model|Class M4 (+/- 600V)† <br>AEC-Q101-002||
||Human Body Model|Class H1C (+/- 2000V)† <br>AEC-Q101-001||
||Charged Device Model|Class C5 (+/- 2000V)† <br>AEC-Q101-005||
|**RoHS Compliant**||Yes||
† Highest passing voltage.
## **Revision History**
|**Date**|**Comments**|
|---|---|
|3/18/2014|<br>Added "Logic Level Gate Drive" bullet in the features section on page 1<br><br>Updated data sheet with new IR corporate template|
|4/9/2014|<br>Updated package outline on page 8.<br><br>Updated typo on the fig.19 and fig.20,unit ofy-axis from "A" to "nC" onpage 6.|
|11/4/2015|<br>Updated datasheet with corporate template<br><br>Corrected orderingtable onpage 1.|
## **Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2015 All Rights Reserved.**
## **IMPORTANT NOTICE**
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com).
## **WARNINGS**
Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office.
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
10
2015-11-4
Updated at February 9, 2023
Infineon Technologies is a globally recognized leader in semiconductor solutions, renowned for driving innovation in power management, energy efficiency, and modern mobility. With a strong legacy of engineering excellence, the company provides highly reliable components designed to meet the rigorous demands of industrial, automotive, and advanced commercial applications. The core of our Infineon portfolio is centered on their industry-leading discrete semiconductors. We offer an extensive selection of single and dual MOSFETs, alongside a robust range of single IGBTs and advanced IGBT modules. These flagship power transistors are essential for high-efficiency power conversion and motor control, providing engineers with superior thermal performance and minimized switching losses. Beyond advanced field-effect transistors, the selection includes a comprehensive array of diodes and rectifiers, heavily featuring Schottky diodes, as well as fast-recovery and RF/PIN diodes. This power foundation is further supported by bipolar transistors, intelligent power modules, and thyristor SCR modules, delivering the critical building blocks required for complex power system designs. To support broader system integration, the portfolio also encompasses specialized solutions such as solid-state relays, AC/DC LED driver ICs, and Bluetooth communications modules. From high-power industrial rectifiers to wireless connectivity adapters, Infineon equips designers with the precision components needed to build efficient, scalable, and fully connected electronic systems.
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