AUIRFS4410Z

## **AUTOMOTIVE GRADE** 

## **Features** 

Advanced Process Technology Ultra Low On-Resistance 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free, RoHS Compliant Automotive Qualified * 

## **Description** 

Specifically designed for Automotive applications, this HEXFET[®] Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area.  Additional features of this design  are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. 

## AUIRFS4410Z AUIRFSL4410Z 

HEXFET ® Power MOSFET 

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D VDSS 100V<br>RDS(on)   typ. 7.2m Ω<br>G               max. 9.0m Ω<br>ID  97A<br>S<br>D<br>D<br>D S D S<br>G G<br>D [2] Pak TO-262<br>AUIRFS4410Z AUIRFSL4410Z<br>G D S<br>Gate Drain Source<br>**----- End of picture text -----**<br>


## **Absolute Maximum Ratings** 

unctional operation of the device at these or any other condition beyond those indicated in the specifications 

is not implied. 

||**Parameter**<br>~~ee~~|**Max.**<br>~~ee~~|**Units**<br>~~ee~~|
|---|---|---|---|
|ID @ TC = 25°C<br>|Continuous Drain Current,VGS@ 10V<br>~~ee~~|97<br>~~ee~~|A<br>~~ee~~|
|ID @ TC = 100°C<br>|Continuous Drain Current,VGS @ 10V<br>~~ee~~|69<br>~~ee~~||
|IDM<br>|Pulsed Drain Current<br>~~ee~~|390<br>~~ee~~||
|PD @TC = 25°C<br>|Maximum Power Dissipation<br>~~ee~~|230<br>~~ee~~|W<br>~~ee~~|
||Linear DeratingFactor|1.5|W/°C|
|VGS<br>~~a~~|Gate-to-Source Voltage<br>~~a~~|± 20<br>|V<br>|
|dv/dt<br>~~a~~|Peak Diode Recovery<br>~~a~~|16<br>|V/ns<br>|
|EAS(Thermallylimited)<br>~~a~~|Single Pulse Avalanche Energy<br>~~aeG~~|242<br>~~eG~~|mJ<br>~~eG~~|
|IAR|Avalanche Current|See Fig. 14, 15, 22a, 22b,|A|
|EAR|Repetitive Avalanche Energy<br>~~a~~||mJ|
|TJ<br>TSTG|Operating Junction and<br>Storage Temperature Range|-55  to + 175|°C|
||Soldering Temperature, for 10 seconds<br>(1.6mm from case)|300||



HEXFET[®] is a registered trademark of International Rectifier. 

- Qualification standards can be found at http://www.irf.com/ 

www.irf.com 

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10/4/11 

**Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)** 

|**Parameter**<br>**Min. Typ. Max. Units**<br>**Conditions**<br>~~Po~~|
|---|
|V(BR)DSS<br>Drain-to-Source Breakdown Voltage<br>100<br>–––<br>–––<br>V<br>ΔV(BR)DSS/ΔTJBreakdown Voltage Temp. Coefficient<br>–––<br>0.12<br>–––<br>V/°C<br>VGS= 0V, ID= 250μA<br>Reference to 25°C, ID= 5mA<br>~~a~~<br>~~NN PN~~<br>~~a~~<br>~~QQ~~|
|RDS(on)<br>Static Drain-to-Source On-Resistance<br>–––<br>7.2<br>9.0<br>mΩ<br>VGS= 10V, ID= 58A<br>~~a©~~|
|VGS(th)<br>Gate Threshold Voltage<br>2.0<br>–––<br>4.0<br>V<br>gfs<br>Forward Transconductance<br>140<br>–––<br>–––<br>S<br>IDSS<br>Drain-to-Source Leakage Current<br>–––<br>–––<br>20<br>–––<br>–––<br>250<br>IGSS<br>Gate-to-Source Forward Leakage<br>–––<br>–––<br>100<br>Gate-to-Source Reverse Leakage<br>–––<br>–––<br>-100<br>μA<br>nA<br>VDS= 10V, ID= 58A<br>VGS= 20V<br>VGS= -20V<br>VDS= VGS, ID= 150μA<br>VDS= 100V, VGS= 0V<br>VDS= 80V, VGS= 0V, TJ= 125°C<br>~~a~~<br>~~Gn QO~~<br>~~QO~~<br>~~es~~<br>~~DNDN_~~<br>~~fT~~<br>~~rq~~<br>~~a~~|
|RG<br>Internal Gate Resistance<br>–––<br>0.70<br>–––<br>Ω<br>**Dynamic  Electrical Characteristics @ TJ = 25°C (unless otherwise specified)**<br>~~a~~<br>~~GO~~<br>~~QO~~|
|**Parameter**<br>**Min. Typ. Max. Units**<br>**Conditions**|
|Qg<br>Total Gate Charge<br>–––<br>83<br>120<br>ID= 58A<br>~~ee~~|
|Qgs<br>Gate-to-Source Charge<br>–––<br>19<br>–––<br>Qgd<br>Gate-to-Drain("Miller")Charge<br>–––<br>27<br>Qsync<br>Total Gate Charge Sync. (Qg- Qgd)<br>–––<br>56<br>–––<br>td(on)<br>Turn-On DelayTime<br>–––<br>16<br>–––<br>nC<br>VDS=50V<br>VGS= 10V<br>VDD= 65V<br>ID= 58A, VDS=0V, VGS= 10V<br>~~ee~~<br>~~ee~~<br>~~@~~<br>~~ee~~<br>~~@~~<br>~~ee~~|
|tr<br>Rise Time<br>–––<br>52<br>–––<br>td(off)<br>Turn-Off DelayTime<br>–––<br>43<br>–––<br>ns<br>ID= 58A<br>RG=2.7Ω<br>~~es~~<br>~~a~~|
|tf<br>Fall Time<br>–––<br>57<br>–––<br>Ciss<br>Input Capacitance<br>–––<br>4820<br>–––<br>VGS= 10V<br>VGS= 0V<br>~~ee~~<br>~~@~~<br>~~a~~|
|Coss<br>Output Capacitance<br>–––<br>340<br>–––<br>VDS= 50V<br>~~a~~|
|Crss<br>Reverse Transfer Capacitance<br>–––<br>170<br>–––<br>pF<br>ƒ= 1.0MHz,  See Fig.5<br>~~a~~|
|Coss eff.(ER)<br>Effective Output Capacitance(EnergyRelated) –––<br>420<br>–––<br>Coss eff.(TR)<br>Effective Output Capacitance(Time Related)<br>–––<br>690<br>–––<br>**Diode Characteristics**<br>VGS= 0V, VDS= 0V to 80V<br>See Fig.11<br>VGS= 0V, VDS= 0V to 80V<br>~~a~~<br>©<br>~~es~~<br>~~®~~|
|**Parameter**<br>**Min. Typ. Max. Units**<br>**Conditions**<br>~~Pe~~|
|S<br>D<br>G<br>IS<br>Continuous Source Current<br>(BodyDiode)<br>ISM<br>Pulsed Source Current<br>(BodyDiode)<br>VSD<br>Diode Forward Voltage<br>–––<br>–––<br>1.3<br>V<br>trr<br>Reverse Recovery Time<br>–––<br>38<br>57<br>TJ = 25°C<br>VR= 85V,<br>–––<br>46<br>69<br>TJ = 125°C<br>IF= 58A<br>Qrr<br>Reverse Recovery Charge<br>–––<br>53<br>80<br>TJ = 25°C<br>di/dt = 100A/μs<br>–––<br>82<br>120<br>TJ= 125°C<br>IRRM<br>Reverse RecoveryCurrent<br>–––<br>2.5<br>–––<br>A<br>TJ= 25°C<br>ns<br>nC<br>A<br>–––<br>–––<br>–––<br>–––<br>97<br>390<br>MOSFET symbol<br>showing  the<br>TJ= 25°C, IS= 58A, VGS= 0V<br>integral reverse<br>p-njunction diode.<br>~~ooo~~<br>~~|~~<br>~~a~~<br>~~GD QO~~<br>~~QO~~<br>~~a~~<br>~~fT~~<br>~~ee~~<br>~~**|**~~<br>~~a~~|
|ton<br>Forward Turn-On Time<br>Intrinsic turn-on time is negligible(turn-on is dominated byLS+LD)<br>~~a~~|
|Notes:|
|Repetitive rating;  pulse width limited by max. junction<br>temperature.<br>Cosseff. (TR) is a fixed capacitance that gives the same charging time<br>as Cosswhile VDSis rising from 0 to 80% VDSS.<br>a)<br>fe)|
|Limited by TJmax, starting TJ= 25°C, L = 0.143mH<br>Cosseff. (ER) is a fixed capacitance that gives the same energy as<br>@©|
|RG= 25Ω, IAS= 58A, VGS=10V. Part not recommended for use<br>Cosswhile VDSis rising from 0 to 80% VDSS.|
|above this value.<br>When mounted on 1" square PCB (FR-4 or G-10 Material).  For<br>@|
|ISD≤58A, di/dt≤610A/μs, VDD≤V(BR)DSS, TJ≤175°C.<br>recommended footprint and soldering techniques refer to application<br>®|
|Pulse width≤400μs; duty cycle≤2%.<br>note #AN-994.<br>®|



@ Limited by TJmax, starting TJ = 25°C, L = 0.143mH © Coss eff. (ER) is a fixed capacitance that gives the same energy as RG = 25 Ω , IAS = 58A, VGS =10V. Part not recommended for use 

- ® ISD ≤ 58A, di/dt ≤ 610A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. ® Pulse width ≤ 400μs; duty cycle ≤ 2%. 

θ 

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## **Qualification Information[†]** 

|**Qualification Information[†]**|**Qualification Information[†]**|||
|---|---|---|---|
|**Qualification Level**||Automotive<br>(per AEC-Q101)††||
|||Comments:<br>This<br>part<br>number(s)<br>passed<br>Automotive<br>qualification.<br>IR’s<br>Industrial<br>and<br>Consumer<br>qualification<br>level<br>is<br>granted<br>by<br>extension of the higher Automotive level.||
|**Moisture Sensitivity Level**||3L-D2 PAK|MSL1|
|||3L-TO-262|3L-TO-262<br>N/A|
|**ESD**|Machine Model|Class M4(+/- 800V )†††<br>AEC-Q101-002||
||Human Body Model|Class H2(+/- 3000V )†††<br>AEC-Q101-001||
||Charged Device Model|Class C5(+/- 2000V )†††<br>AEC-Q101-005||
|**RoHS Compliant**||Yes||



† Qualification standards can be found at International Rectifier’s web site:  http//www.irf.com/ 

†† Exceptions (if any) to AEC-Q101 requirements are noted in the qualification report. 

†††    Highest passing voltage 

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1000 1000<br>VGS VGS<br>TOP           15V TOP           15V<br>10V 10V<br>8.0V 8.0V<br>6.0V 6.0V<br>5.5V 5.5V<br>5.0V Jo 5.0V meieee<br>100 4.8V 100 4.8V<br>BOTTOM 4.5V BOTTOM 4.5V<br>4.5V<br>> Zamna ae pf<br>4.5V<br>10 J a 10 ga<br>≤ 60μs PULSE WIDTH ≤ 60μs PULSE WIDTH<br>Tj = 25°C Tj = 175°C<br>1 iepeelmill 1 pfllill ypHl<br>0.1 1 10 100 0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)<br>Fig 1.   Typical Output Characteristics Fig 2.   Typical Output Characteristics<br>1000 2.5<br>VDS = 50V ID = 58A<br>≤ 60μs PULSE WIDTH V GS  = 10V<br>100 2.0<br>ao {ittt yt<br>T = 25°C<br>10 J  1.5<br>PP Af PLEA<br>T = 175°C<br>J<br>1 1.0<br>no a<br>A a -4Geeeeeeeee<br>0.1 0.5<br>2 3 4 5 6 7 -60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Junction Temperature (°C)<br>VGS, Gate-to-Source Voltage (V)<br>Fig 4.   Normalized On-Resistance vs. Temperature<br>Fig 3.   Typical Transfer Characteristics<br>100000 12.0<br>VGS   = 0V,       f = 1 MHZ ID= 58A<br>= C C iss rss    = C  = C gs gd + Cgd,  C ds SHORTED 10.0 V DS = 80V<br>— Coss   = Cds + Cgd VDS= 40V<br>VDS= 20V<br>10000 Sean 8.0 ies a<br>Sf!<br>C<br>iss<br>6.0<br>C oss<br>1000 aae eell 4.0 |p(—a<br>Crss<br>2.0<br>100 P| 0.0<br>1 10 100 0 20 40 60 80 100<br>VDS, Drain-to-Source Voltage (V)  QG,  Total Gate Charge (nC)<br>VGS, Gate-to-Source Voltage (V)<br>ID, Drain-to-Source Current (A)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>C, Capacitance (pF)<br>ID, Drain-to-Source Current (A)<br>ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 4.** Normalized On-Resistance vs. Temperature 

**Fig 5.** Typical Capacitance vs. Drain-to-Source Voltage 

**Fig 6.** Typical Gate Charge vs. Gate-to-Source Voltage 

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1000 1000<br>OPERATION IN THIS AREA<br>LIMITED BY R DS(on)<br>100 T = 175°C 100μsec<br>J<br>100 1msec<br>:_7ee== n=, SO<br>10 2 eit 10msec<br>= TJ = 25°C eee DC il el<br>Pf =e = StH aS<br>fe 10 CAMEVE |<br>1<br>Tc = 25 ° C<br>VGS = 0V Tj = 175Single Pulse°C<br>0.1 aPp 1 | ERi R T<br>0.0 0.5 1.0 1.5 2.0 2.5 0 1 10 100<br>VSD, Source-to-Drain Voltage (V) VDS, Drain-to-Source Voltage (V)<br>Fig 7.   Typical Source-Drain Diode Fig 8.   Maximum Safe Operating Area<br>Forward Voltage<br>100 125<br>Id = 5mA<br>120<br>80<br>SELL ee TEEENED<br>115<br>aon LEE er<br>60<br>110<br>40 Pf | FN\ 105 ATPELE LALLA<br>100<br>Saaew YALL<br>20<br>95<br>TIT VALLE ELL LL<br>0 90 PEELE EEL LEE<br>25 50 75 100 125 150 -60 -40 -20 0 20 40 60 80 100120140160180<br> TC , Case Temperature (°C) TJ , Temperature ( °C )<br>Fig 9.   Maximum Drain Current vs. Fig 10.   Drain-to-Source Breakdown Voltage<br>Case Temperature<br>2.0 1000<br>1.8 TTLLLLLLIL dee 900 TLLLLLL ID<br>TOP         6.4A<br>1.6 PPP eT eT err yy 800 Na 9.4A<br>1.4 PCEELEEC J 700 ACCEL BOTTOM 58A<br>1.2 SaSSeGee)) onn 600 CNEL<br>1.00.80.6 PCELEELPCEELLPLLCPCEELLPLLCPLLC LALLLAELLLALLALLLAELLLALLAELLLALLLALLLL 500400300 TOAPNCNCEELELLEKCNCLEELELLE CEEELLLL<br>0.4 200<br>0.2 CCEACEAA CEE 100 PRS<br>0.0 eT ECC ECC 0 CCCEPEPaS SSE<br>-10 0 10 20 30 40 50 60 70 80 90 100 25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>ISD, Reverse Drain Current (A) ID,  Drain-to-Source Current (A)<br>ID,  Drain Current (A)<br>V(BR)DSS, Drain-to-Source Breakdown Voltage (V)<br>Energy (μJ)<br>EAS , Single Pulse Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


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2.0<br>1.8 TTLLLLLLIL dee<br>1.6 PPP eT eT err yy<br>1.4 PCEELEEC J<br>1.2<br>SaSSeGee)) onn<br>0.60.80.61.00.80.6 PCELEELPCEELLPLLCPCEELLPLLCPLLC LALLLAELLLALLALLLAELLLALLAELLLALLLALLLL<br>0.4<br>0.2 CCEACEAA CEE<br>0.0 eT ECC ECC<br>-10 0 10 20 30 40 50 60 70 80 90 100<br>VDS, Drain-to-Source Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 11.** Typical COSS Stored Energy 

**Fig 12.** Maximum Avalanche Energy vs. DrainCurrent 

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1<br>PT D = 0.50 errr ri a<br>0.20<br>0.1<br>0.10<br>a 0.05 ee ee ee R 1 R1 R 2 R2 ee Ri (°C/W)  eee  τ i (sec)<br>SA τ J τ J em τ C τ 0.237      0.000178<br>ee 0.02 τ 1 τ 1 τ 2 τ 2 0.413      0.003772<br>0.01 —see 0.01 aa Ci=  |, τ i / Ri -———_lil<br>Ci i / Ri<br>rT dL A SINGLE PULSE ee ee ee eee Notes: nt ee ee ee<br>( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2<br>2. Peak Tj = P dm x Zthjc + Tc<br>0.001 ri“anti i mainTEP pp HEll<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Fig 13.   Maximum Effective Transient Thermal Impedance, Junction-to-Case<br>100<br>Allowed avalanche Current vs avalanche<br>Duty Cycle = Single Pulse °<br>pulsewidth, tav, assuming  Δ Tj = 150 C and<br>a eS eee ee ll eee Tstart =25°C (Single Pulse) al<br>0.01<br>10 HT 0.05 BSI ao ool<br>| IS|||<br>0.10<br>PoPETATE ETT 7 AASNR=ee<br>7 TTSTTT<br>1<br>| Allowed avalanche Current vs avalanche  a ee ee eee<br>pulsewidth, tav, assuming  ΔΤ j = 25°C and<br>Tstart = 150°C.<br>0.1 P ETESeEE ERT<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Fig 14.   Typical Avalanche Current vs.Pulsewidth<br>150 Notes on Repetitive Avalanche Curves , Figures 14, 15:<br>TOP          Single Pulse                 (For further info, see AN-1005 at www.irf.com)<br>BOTTOM   1.0% Duty Cycle 1. Avalanche failures assumption:<br>I D  = 58A Purely a thermal phenomenon and failure occurs at a temperature far in<br>excess of Tjmax. This is validated for every part type.jmax. This is validated for every part type.. This is validated for every part type.<br>100 Kl 2. Safe operation in Avalanche is allowed as long asTjmaxjmax is not exceeded.<br>3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.<br>SON PTT TTT TT 4. PD (ave) = Average power dissipation per single avalanche pulse.D (ave) = Average power dissipation per single avalanche pulse.= Average power dissipation per single avalanche pulse.<br>5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase<br>during avalanche).<br>ASU 6. Iav = Allowable avalanche current.<br>50 7.  Δ T = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax jmax (assumed as<br>HANNE 25°C in Figure 14, 15).<br>tav = Average time in avalanche.<br>D = Duty cycle in avalanche =  tav ·f<br>HLL ZthJC(D, tav) = Transient thermal resistance, see Figures 13)<br>PEELLLLENNG<br>0<br>PD (ave) = 1/2 ( 1.3·BV·Iav) =D (ave) = 1/2 ( 1.3·BV·Iav) = = 1/2 ( 1.3·BV·Iav) =av) =) = A T/ ZthJCthJC<br>25 50 75 100 125 150 175<br>Iav =av == 2 A T/ [1.3·BV·Zth]th]]<br>Starting TJ , Junction Temperature (°C) EAS (AR) = PD (ave)·tavAS (AR) = PD (ave)·tav = PD (ave)·tavD (ave)·tav·tavav<br>EAR , Avalanche Energy (mJ)<br>Avalanche Current (A)<br>Thermal Response ( Z thJC ) °C/W<br>**----- End of picture text -----**<br>


- Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type.jmax. This is validated for every part type.. This is validated for every part type. 

2. Safe operation in Avalanche is allowed as long asTjmaxjmax is not exceeded. 

3. Equation below based on circuit and waveforms shown in Figures 22a, 22b. 

4. PD (ave) = Average power dissipation per single avalanche pulse.D (ave) = Average power dissipation per single avalanche pulse.= Average power dissipation per single avalanche pulse. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

7. Δ T = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax jmax (assumed as 25°C in Figure 14, 15). 

**PD (ave) = 1/2 ( 1.3·BV·Iav) =D (ave) = 1/2 ( 1.3·BV·Iav) = = 1/2 ( 1.3·BV·Iav) =av) =) =** A **T/ ZthJCthJC Iav =av == 2** A **T/ [1.3·BV·Zth]th]] EAS (AR) = PD (ave)·tavAS (AR) = PD (ave)·tav = PD (ave)·tavD (ave)·tav·tavav** 

**Fig 15.** Maximum Avalanche Energy vs. Temperature 

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4.5 Pt tT | | tT tT tt tT<br>4.0 eaeFERRE<br>3.5 Pay | | PAS TT<br>PSSA EEN<br>3.0<br>CESSES<br>Pt oT | RN Le<br>2.5<br>HS<br>2.0 I D = 150μA 4441 NAH<br>I D = 250μA A/1_|_<br>1.5 I D = 1.0mA  | AWN<br>AEE ANE<br>I D  = 1.0A<br>1.0 PF tt | |Ty<br>PEPE<br>-75 -50 -25 0 25 50 75 100 125 150 175 200<br>TJ , Temperature ( °C )<br>VGS(th), Gate threshold Voltage (V)<br>**----- End of picture text -----**<br>


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20<br>IF = 39A<br>Pf]<br>VR = 85V<br>TJ = 25°C   _____<br>15 TJ = 125°C ---------- | |e 7<br>et<br>Pee<br>10<br>27 1A<br>eae<br>5 Poe<br>| |<br>wre<br>eT | | | ft<br>0 Py<br>PP<br>100 200 300 400 500 600 700<br>dif/dt (A/μs)<br>IRRM (A)<br>**----- End of picture text -----**<br>


**Fig 16.** Threshold Voltage vs. Temperature 

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20<br>IF = 58A<br>VR = 85V<br>TJ = 25°C   _____<br>15 TJ = 125°C ----------<br>| pea2 ¢ [i]<br>°<br>a<br>10<br>po] tetL7 —||<br>|<br>5 e i ae<br>0 pt | | |<br>100 200 300 400 500 600 700<br>dif/dt (A/μs)<br>IRRM (A)<br>**----- End of picture text -----**<br>


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400<br>IF = 39A<br>350 VR = 85V<br>TJ = 25°C   _____<br>300 TJ = 125°C ----------<br>¢<br>250 Amice<br>200 Tr<br>150<br>pt aeyy -OL L—|=<br>100 ¢ |<br>at | [le]  — | |<br>50<br>0<br>pt | | |<br>100 200 300 400 500 600 700<br>dif/dt (A/μs)<br>Qrr (nC)<br>**----- End of picture text -----**<br>


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450<br>IF = 58A<br>400 V R  = 85V<br>TJ = 25°C   _____ are<br>350<br>TJ = 125°C<br>----------<br>aia<br>300<br>¢<br>250<br>200 P| | |et<br>150 re eae<br>100<br>a ||<br>50<br>0 Fp | | tT |<br>100 200 300 400 500 600 700<br>dif/dt (A/μs)<br>Qrr (nC)<br>**----- End of picture text -----**<br>


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Driver Gate Drive<br>P.W.<br>D.U.T + {¢$ — P.W. ————— Period — + D = —— Period<br>) [©)] Circuit    •  Low LayoutStray ConsiderationsInduct | V t t GS=10<br> •<br>- •   CurrentLow LeakageTransformerInductance @ D.U.T. ISD Waveform<br>+<br>® = ReverseRecovery Body Diode Forward \<br>- a - ® + Current r Current di/dt /<br>® D.U.T. VDS Waveform Diode Recoverydv/dt ‘<br>o) 00 > VDD<br>ma<br>•  Re-Applied<br>•   Driver same type as D.U.T. + Voltage Body Diode  Forward Drop<br>Re (A •   vidt controlled by Rg Vp p -<br>•<br>D.U.T. - Device Under Test SO O<br>Ripple  ≤ 5% ISD<br>on Isp controlled by Duty Factor "D" @\<br>* Vs = 5V for Logic Level Devices<br>Fig 21.  Peak Diode Recovery dv/dt Test Circuit for N-Channel<br>HEXFET ® Power MOSFETs<br>V(BR)DSS<br>15V << tp ><br>VDS L DRIVER<br>RG D.U.T +<br>| IAS - [V][DD] A y |<br>20V<br>ys dk tp 0.01 Ω IAS |<br>Fig 22a.   Unclamped Inductive Test Circuit Fig 22b.   Unclamped Inductive Waveforms<br>LD<br>VDS V<br>DS<br>90%<br>+<br>VDD -<br>D.U.T 10%<br>\ A<br>VGS V<br>GS<br>Second Pulse Width < 1μs  IN on<br>Duty Factor < 0.1%<br>td(on) tr td(off) tf<br>Fig 23a.   Switching Time Test Circuit Fig 23b.   Switching Time Waveforms<br>Id<br>Vds<br>Vgs<br>L<br>VCC<br>DUT<br>0<br>S Vgs(th)<br>20K1K<br>a: H Qgodr t Qgd Qgs2 ' ‘ge Qgs1 !<br>Fig 24a.   Gate Charge Test Circuit Fig 24b.    Gate Charge Waveform<br>**----- End of picture text -----**<br>


**Fig 22b.** Unclamped Inductive Waveforms 

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## TO-262 Package Outline Dimensions are shown in millimeters (inches) 

## TO-262 Part Marking Information 

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## Dimensions are shown in millimeters (inches) 

**==> picture [404 x 429] intentionally omitted <==**

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TRR<br>1.60 (.063)<br>1.50 (.059)<br>1.60 (.063)<br>4.10 (.161)<br>1.50 (.059)<br>3.90 (.153) 0.368 (.0145)<br>0.342 (.0135)<br>|O 0O0° 0| L_ Ly ~T<br>o______ Oooo SEY & -<br>FEED DIRECTION 1.85 (.073) 11.60 (.457)<br>1.65 (.065) 11.40 (.449) 24.30 (.957)<br>15.42 (.609)<br>23.90 (.941)<br>15.22 (.601)<br>TRL<br>1.75 (.069)<br>10.90 (.429) 1.25 (.049)<br>10.70 (.421) 4.72 (.136)<br>E 16.10 (.634) | Te 4.52 (.178)<br>15.90 (.626)<br>ja LN<br>FEED DIRECTION<br>13.50 (.532) 27.40 (1.079)<br>12.80 (.504) 23.90 (.941) a<br>4<br>330.00 60.00 (2.362)<br>(14.173)       MIN.<br>  MAX.<br>| OO |<br>30.40 (1.197)<br>NOTES :       MAX.<br>1.   COMFORMS TO EIA-418.<br>2.   CONTROLLING DIMENSION: MILLIMETER. 26.40 (1.03924.40 (.961) I ) E 4<br>3.   DIMENSION MEASURED @ HUB.<br>3<br>**----- End of picture text -----**<br>


4.   INCLUDES FLANGE DISTORTION @ OUTER EDGE. 

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## **Ordering Information** 

|**Base part**|**Package Type**|**Standard Pack**|**Standard Pack**|**Complete Part Number**|
|---|---|---|---|---|
|||**Form**|**Quantity**||
|AUIRFSL4410Z|TO-262|Tube|50|AUIRFSL4410Z|
|AUIRFS4410Z|D2Pak|Tube|50|AUIRFS4410Z|
|||Tape and Reel Left|800|AUIRFS4410ZTRL|
|||Tape and Reel Right|800|AUIRFS4410ZTRR|



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Tel: (310) 252-7105 

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