AUIRFR540ZTRL

AUIRFR540Z AUIRFU540Z ~~po~~ 

**AUTOMOTIVE GRADE** 

## ~~Cinfineon~~ 

HEXFET[® ] Power MOSFET 

**Application VDSS 100V**  Automatic Voltage Regulator (AVR)  Solenoid Injection **RDS(on)            typ. 22.5m**   Body Control **max. 28.5m**   Low Power Automotive Applications **ID 35A** ~~=~~ D D **Description** Specifically designed for Automotive applications, this HEXFET® S Power MOSFET utilizes the latest processing techniques to S G achieve extremely low on-resistance per silicon area.  Additional G D features of this design  are a 175°C junction operating temperature, D-Pak I-Pak fast switching speed and improved repetitive avalanche rating . AUIRFR540Z AUIRFU540Z These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide **G D S** variety of other applications. Gate Drain Source ~~es~~ 

|**Base part number**|**Package Type**|**Standard Pack**|**Standard Pack**|**Orderable Part Number**|
|---|---|---|---|---|
|||**Form**|**Quantity**||
|AUIRFU540Z|I-Pak|Tube|75|AUIRFU540Z|
|AUIRFR540Z|D-Pak|Tube|75|AUIRFR540Z|
|||Tape and Reel Left|3000|AUIRFR540ZTRL|



## **Absolute Maximum Ratings** 

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.   These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless 

|**Symbol**|**Parameter**|**Max.**|**Units**|
|---|---|---|---|
|ID@ TC= 25°C|Continuous Drain Current, VGS@ 10V (Silicon Limited)|35|A|
|ID@ TC= 100°C|Continuous Drain Current, VGS@ 10V (Silicon Limited)|25||
|IDM|Pulsed Drain Current|140||
|PD@TC= 25°C|Maximum Power Dissipation|91|W|
||Linear Derating Factor|0.61<br>~~a~~|W/°C|
|VGS<br>~~a~~|Gate-to-SourceVoltage<br>~~a~~|± 20<br>~~a~~<br>~~a~~|V<br>~~a~~|
|EAS<br>~~a~~|Single Pulse Avalanche Energy (ThermallyLimited) <br>~~a~~|39<br>~~a~~<br>~~a~~|mJ<br>~~a~~|
|EAS(Tested)<br>~~a~~|Single Pulse Avalanche EnergyTested Value<br>~~a~~|75<br>~~a~~<br>~~a~~||
|IAR<br>~~a~~|Avalanche Current<br>~~a~~|See Fig.15,16, 12a, 12b<br>~~a~~<br>~~a~~|A<br>~~a~~|
|EAR<br>~~a~~<br>~~pf~~|Repetitive Avalanche Energy <br>~~a~~<br>~~pf~~||mJ<br>~~a~~|
|TJ<br>TSTG<br>~~pf~~|Operating Junction and<br>Storage Temperature Range<br>~~pf~~|-55  to + 175|°C|
|~~pf~~|SolderingTemperature,for 10 seconds(1.6mm from case)<br>~~pf~~|300||



## **Thermal Resistance** 

|**Thermal Resistance**|||||
|---|---|---|---|---|
|**Symbol**|**Parameter**|**Typ.**|**Max.**|**Units**|
|RJC|Junction-to-Case|–––|1.64|°C/W|
|RJA|Junction-to-Ambient(PCB Mount) |–––|50||
|RJA|Junction-to-Ambient|–––|110||



HEXFET® is a registered trademark of Infineon. 

***** Qualification standards can be found at www.infineon.com 

1 

2017-10-03 

Cinfin eon 

AUIRFR/U540Z 

## **Static @ TJ = 25°C (unless otherwise specified)** 

|~~es~~|||||||
|---|---|---|---|---|---|---|
|Qg<br>~~es~~|Total Gate Charge|–––|39|59|nC|ID= 21A<br>VDS= 50V<br>VGS= 10V|
|g<br>Qgs<br>~~es~~<br>~~Rs~~|Gate-to-Source Charge|–––|11|–––|||
|Qgd<br>~~Rs~~|Gate-to-Drain Charge|–––|12|–––|||
|gd<br>td(on)<br>~~Rs~~<br>~~——————~~|Turn-On Delay Time<br>~~——————~~|–––<br>~~——————~~|14<br>~~——————~~|–––<br>~~——————~~|ns<br>~~+++},~~<br>~~>~~|VDD= 50V<br>ID= 21A<br>RG= 13<br>VGS= 10V|
|d(on)<br>tr<br>~~——————~~<br>~~es~~|Rise Time<br>~~——————~~|–––<br>~~——————~~|42<br>~~——————~~|–––<br>~~——————~~|||
|td(off)<br>~~es~~<br>~~es~~|Turn-Off DelayTime|–––|43|–––|||
|d(off)<br>tf<br>~~es~~<br>~~es~~<br>~~+++},~~|Fall Time<br>~~+++},~~|–––<br>~~+++},~~|34<br>~~+++},~~|–––<br>~~+++},~~|||
|LD<br>~~es~~<br>~~+++},~~|Internal Drain Inductance<br>~~+++},~~|–––<br>~~+++},~~|4.5<br>~~+++},~~|–––<br>~~+++},~~|nH<br>~~+++},~~<br>~~>~~|Between lead,<br>6mm (0.25in.)<br>from package<br>and centerofdie contact<br>~~ee~~|
|LS<br>~~+++},~~<br>~~es~~|Internal Source Inductance<br>~~+++},~~|–––<br>~~+++},~~|7.5<br>~~+++},~~|–––<br>~~+++},~~|||
|Ciss<br>~~+++},~~<br>~~es~~<br>~~es~~<br>~~**e**~~|Input Capacitance<br>~~+++},~~<br>~~nn~~<br>~~**e**ee~~|–––<br>~~+++},~~<br>~~nn~~<br>~~ee~~|1690<br>~~+++},~~<br>~~nn~~<br>~~ee~~|–––<br>~~+++},~~<br>~~nn~~<br>~~ee~~|pF<br>~~+++},~~<br>~~>~~<br>~~ee~~|VGS= 0V<br>VDS= 25V<br>ƒ= 1.0MHz<br>~~ee~~<br>~~PO~~|
|Coss<br>~~es~~<br>~~es~~<br>~~**e**~~|Output Capacitance<br>~~nn~~<br>~~**e**ee~~|–––<br>~~nn~~<br>~~ee~~|180<br>~~nn~~<br>~~ee~~|–––<br>~~nn~~<br>~~ee~~|||
|Crss<br>~~es~~<br>~~es~~<br>~~**e**~~<br>~~es~~|ReverseTransferCapacitance<br>~~nn~~<br>~~**e**ee~~<br>~~ee~~|–––<br>~~nn~~<br>~~ee~~|100<br>~~nn~~<br>~~ee~~|–––<br>~~nn~~<br>~~ee~~|||
|Coss<br>~~es~~<br>~~**e**~~<br>~~es~~<br>~~es~~|Output Capacitance<br>~~**e**ee~~<br>~~ee~~<br>~~es~~|–––<br>~~ee~~|720<br>~~ee~~|–––<br>~~ee~~||VGS=0V,VDS= 1.0Vƒ= 1.0MHz<br>~~ee~~<br>~~PO~~<br>~~PO~~|
|Coss<br>~~**e**~~<br>~~es ~~<br>~~es~~<br>~~s~~|Output Capacitance<br>~~**e**ee~~<br> ~~ee~~<br>~~es~~|–––<br>~~ee~~|110<br>~~ee~~|–––<br>~~ee~~||VGS =0V, VDS =80V ƒ=1.0MHz<br>~~PO~~<br>~~PO~~<br>~~Po~~|
|Coss eff.<br>~~**e**~~<br>~~es ~~<br>~~s~~|Effective Output Capacitance<br>~~**e**ee~~<br> ~~es~~|–––<br>~~ee~~|190<br>~~ee~~|–––<br>~~ee~~||VGS=0V,VDS=0Vto 80V<br>~~PO~~<br>~~Po~~|
|**Diode Characteristics**<br>~~s~~<br>~~Po~~|||||||
|~~a~~<br>~~4,~~|**Parameter **<br>~~I~~<br>~~4,~~|**Min.**<br>~~I~~<br>~~4,~~|**Typ. M**<br>~~I~~<br>~~4,~~|**. Max.**<br>~~I~~<br>~~4,~~|**Units**<br>~~(~~<br>~~),~~|**Conditions**<br>~~(~~<br>~~),&~~|
|IS<br>~~a~~<br>~~4,~~|Continuous Source Current<br>(Body Diode)<br>~~I~~<br>~~4,~~|–––<br>~~I~~<br>~~4,~~|–––<br>~~I~~<br>~~4,~~|35<br>~~I ~~<br>~~4,~~|A<br> ~~(~~<br>~~),~~<br>~~(D~~|MOSFET symbol<br>showing  the<br>integral reverse<br>p-n junction diode.<br>~~(~~<br>~~),&~~|
|ISM<br>~~4,~~<br>~~a~~|Pulsed Source Current<br>(Body Diode)<br>~~4,~~<br>~~I~~|–––<br>~~4,~~<br>~~ID~~|–––<br>~~4,~~<br>~~I~~|140<br>~~4,~~<br>~~I~~|||
|VSD<br>~~4,~~<br>~~a~~|Diode Forward Voltage<br>~~4,~~<br>~~I~~|–––<br>~~4,~~<br>~~ID~~|–––<br>~~4,~~<br>~~I~~|1.3<br>~~4, ~~<br>~~I~~|V<br> ~~),~~<br>~~(D~~|TJ= 25°C,IS= 21A,VGS= 0V<br>~~), &~~|
|trr<br>~~a~~<br>~~9~~<br>~~[$y~~|Reverse Recovery Time<br>~~I ~~<br>~~9~~<br>~~[$y~~<br>~~Ht~~|–––<br> ~~ID ~~<br>~~Ht~~|32<br> ~~I ~~<br>~~Httt~~|48<br> ~~I ~~<br>~~tt~~|ns<br> ~~(D~~<br>~~ttdt~~|TJ= 25°C ,IF= 21A, VDD= 50V<br>nC   di/dt = 100A/µs<br>~~dt~~<br>~~_§~~|
|Qrr<br>~~[$y~~|Reverse RecoveryCharge<br>~~[$y~~<br>~~Ht~~|–––<br>~~Ht~~|40<br>~~Httt~~|60<br>~~tt~~|nC   di/dt = 100A/<br>~~ttdt~~||
|ton<br>~~[$y~~|Forward Turn-On Time<br>~~[$y~~<br>~~Ht~~|Intrinsic turn-on time is negligible(turn-on is dominated byLS+LD)<br>~~Htttdt~~<br>~~_§~~|||||



**Notes:** 

>  Repetitive rating;  pulse width limited by max. junction temperature. (See fig. 11) 

>  Limited by TJmax , starting  TJ = 25°C, L = 0.17mH, RG = 25, IAS = 21A, VGS =10V. Part not recommended for use above this value.  Pulse width 1.0ms; duty cycle  2%. 

- Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS 

- Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. 

- This value determined from sample failure population, 100% tested to this value in production. 

-  When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994 

- R is measured at TJ approximately 90°C. 

2 

2017-10-03 

~~Cinfineon~~ 

AUIRFR/U540Z ~~LLL~~ 

**==> picture [496 x 585] intentionally omitted <==**

**----- Start of picture text -----**<br>
1000 1000<br>TOP           V15V10VGS Tj = 25°C60µs PULSE WIDTH TOP           V15V10VGS<br>8.0V 8.0V<br>7.0V 7.0V<br>6.0V 6.0V<br>5.5V 5.5V<br>100 5.0V 100 5.0V<br>BOTTOM 4.5V BOTTOM 4.5V<br>10 10 4.5V<br>60µs PULSE WIDTH<br>4.5V Tj = 175°C<br>1 1 AA<br>0.1 1 10 100 0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)<br>Fig. 1  Typical Output Characteristics  Fig. 2  Typical Output Characteristics<br>70<br>1000<br>TJ = 25°C<br>60<br>To<br>100 50<br>40<br>10 T J  = 175°C TJ = 175°C<br>30<br>1 T J  = 25°C 20<br>10 VDS = 10V<br>VDS = 25V 380µs PULSE WIDTH<br>al 60µs PULSE WIDTH 0 fo<br>0.1<br>2 3 4 5 6 7 8 0 10 20 30 40 50<br>ID,Drain-to-Source Current (A)<br>VGS, Gate-to-Source Voltage (V)<br>Gfs, Forward Transconductance (S)<br>ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A)<br>)<br>ID, Drain-to-Source Current<br>**----- End of picture text -----**<br>


**Fig. 2** Typical Output Characteristics 

**Fig. 3** Typical Transfer Characteristics 

**Fig. 4** Typical Forward Trans conductance Vs. Drain Current 

3 

2017-10-03 

~~Cinfineon~~ 

AUIRFR/U540Z ~~a~~ 

**==> picture [493 x 197] intentionally omitted <==**

**----- Start of picture text -----**<br>
3000 VGS   = 0V,       f = 1 MHZ 20 I = 21A<br>Ciss    = Cgs + Cgd,  Cds SHORTED D<br>2500 Crss   = Cgd  VDS= 80V<br>Coss  = Cds + Cgd 16 VDS= 50V<br>VDS= 20V<br>2000<br>qf Ciss 12 py<br>1500<br>CT | A<br>8<br>1000<br>a al fr<br>4<br>500 Coss<br>Crss<br>0 Pee rs  |ss 0 Annai<br>1 10 100 0 10 20 30 40 50 60<br>VDS, Drain-to-Source Voltage (V)  QG  Total Gate Charge (nC)<br>C, Capacitance(pF)<br>VGS, Gate-to-Source Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 5.** Typical Capacitance vs. Drain-to-Source Voltage 

**Fig 6.** Typical Gate Charge vs. Gate-to-Source Voltage 

**==> picture [499 x 221] intentionally omitted <==**

**----- Start of picture text -----**<br>
1000.0 1000<br>OPERATION IN THIS AREA<br>LIMITED BY R DS(on)<br>100.0 100<br>100µsec<br>TJ = 175°C T] | fd 1m sec<br>10.0 10<br>TJ = 25 ° C<br>10msec<br>1.0 1<br>Tc = 25°C<br>Tj = 175°C DC<br>V GS  = 0V Single Pulse<br>0.1 0.1<br>0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 1 10 100 1000<br>VSD, Source-to-Drain Voltage (V) VDS  , Drain-toSource Voltage (V)<br>ISD, Reverse Drain Current (A) ID,  Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig. 7** Typical Source-to-Drain Diode Forward Voltage 

**Fig 8.** Maximum Safe Operating Area 

2017-10-03 

4 

AUIRFR/U540Z 

**==> picture [212 x 196] intentionally omitted <==**

**----- Start of picture text -----**<br>
40<br>30 PEELEine<br>20 PSN<br>oN.<br>10<br>0 ELENHUTA<br>25 50 75 100 125 150 175<br>TC , CaseTemperature (°C)<br>ID  , Drain Current (A)<br>**----- End of picture text -----**<br>


**==> picture [217 x 195] intentionally omitted <==**

**----- Start of picture text -----**<br>
2.5<br>ID = 21A<br>V GS  = 10V<br>2.0 ALLY/<br>/<br>1.5<br>|<br>1.0<br>vali<br>0.5<br>-60 -40 -20 0 20 40 60 80 100 120 140 160 180<br>TJ , Junction Temperature (°C)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>**----- End of picture text -----**<br>


**Fig 9.** Maximum Drain Current Vs. Case Temperature 

**Fig 10.** Normalized On-Resistance Vs. Temperature 

**==> picture [423 x 196] intentionally omitted <==**

**----- Start of picture text -----**<br>
10<br>1<br>D = 0.50<br>0.20<br>ee<br>0.10 R1 R1 R2 R2 R3R3 Ri (°C/W)  i (sec)<br>0.1 0.050.02 A J  reek J1  1  2  2  3  3 CC | 0.6611 2.626  0.000052 0.001297<br>0.01 eae Ci Ci=  = Lol i  Ri iRi iod rTeT 0.7154  0.01832<br>0.01 or<br>By SINGLE PULSE Notes: OUTs«d<br>( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2<br>2. Peak Tj = P dm x Zthjc + Tc<br>0.001<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Thermal Response ( Z thJC )<br>**----- End of picture text -----**<br>


**Fig 11.** Maximum Effective Transient Thermal Impedance, Junction-to-Case 

5 2017-10-03 ~~SO~~ 

~~Cinfin eon~~ 

AUIRFR/U540Z ~~a~~ 

**==> picture [211 x 290] intentionally omitted <==**

**----- Start of picture text -----**<br>
15V<br>L DRIVER<br>VDS<br>R G D.U.T +<br>- [V][DD]<br>IAS<br>20V<br>tp 0.01<br>\ /\ /- |<br>Fig 12a.   Unclamped Inductive Test Circuit<br>V(BR)DSS<br>tp<br>.<br>**----- End of picture text -----**<br>


**==> picture [20 x 10] intentionally omitted <==**

**----- Start of picture text -----**<br>
IAS<br>**----- End of picture text -----**<br>


**Fig 12b.** Unclamped Inductive Waveforms 

**==> picture [172 x 118] intentionally omitted <==**

**----- Start of picture text -----**<br>
Id<br>Vds<br>Vgs<br>Vgs(th)<br>A \<br>Qgs1 i Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


**Fig 13a.** Gate Charge Waveform 

**==> picture [212 x 495] intentionally omitted <==**

**----- Start of picture text -----**<br>
160<br>                 I D<br>TOP          6.5A<br>                9.4A<br>120 BOTTOM   21A<br>80<br>NE<br>40<br>0<br>25 50 75 100 125 150 175<br>Starting TJ, Junction Temperature (°C)<br>Fig 12c.  Maximum Avalanche Energy<br> vs. Drain Current<br>Nee<br>4.5<br>ID = 1.0mA<br>4.0 ID = 250µA<br>ID = 50µA<br>3.5 BUUUREERES<br>ESSSGEE<br>3.0<br>2.5<br>POEE SSS<br>2.0<br>ttt<br>1.5 Pt [tT] LTT E NNSINSL<br>1.0<br>-75 -50 -25 0 25 50 75 100 125 150 175<br>TJ , Temperature ( °C )<br>EAS, Single Pulse Avalanche Energy (mJ)<br>VGS(th) Gate threshold Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 14.** Threshold Voltage Vs. Temperature 

**Fig 13b.** Gate Charge Test Circuit 

6 ~~=~~ 

2017-10-03 ~~—————~~ 

2017-10-03 

~~Cinfineon~~ 

AUIRFR/U540Z ~~LLL~~ 

**==> picture [432 x 198] intentionally omitted <==**

**----- Start of picture text -----**<br>
100<br>Duty Cycle = Single Pulse<br>Allowed avalanche Current vs<br>10 avalanche  pulsewidth,  tav<br>0.01 assuming  Tj = 25°C due to<br>avalanche losses<br>Se 0.05 at<br>0.10<br>1 SN oral<br>TTT<br>TINEHTTP<br>0.1<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 sr 1.0E-02 te 1.0E-01<br>tav (sec)<br>Avalanche Current (A)<br>**----- End of picture text -----**<br>


**Fig 15.** Typical Avalanche Current Vs. Pulse width 

## **Notes on Repetitive Avalanche Curves , Figures 15, 16:** 

## **(For further info, see AN-1005 at www.infineon.com)** 

**==> picture [212 x 196] intentionally omitted <==**

**----- Start of picture text -----**<br>
40<br>TOP          Single Pulse<br>BOTTOM   1% Duty Cycle<br>ID = 21A<br>30 NE<br>20<br>NNT<br>10<br>NU<br>LLNS<br>0<br>25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>EAR , Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


## **Fig 16.** Maximum Avalanche Energy Vs. Temperature 

1. Avalanche failures assumption: 

   - Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 

2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded. 

3.  Equation below based on circuit and waveforms shown in Figures 12a, 12b. 

4.  PD (ave) = Average power dissipation per single avalanche pulse. 

5.  BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

6.  Iav = Allowable avalanche current. 

7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 15, 16). 

   - tav = Average time in avalanche. 

   - D = Duty cycle in avalanche =  tav ·f 

   - ZthJC(D, tav) = Transient thermal resistance, see Figures 13) 

## **PD (ave) = 1/2 ( 1.3·BV·Iav) =**  **T/ ZthJC Iav = 2**  **T/ [1.3·BV·Zth]** 

**==> picture [68 x 9] intentionally omitted <==**

2017-10-03 

7 

~~——__—————~~ 

AUIRFR/U540Z ~~ll~~ 

**Fig 17.** Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs 

**Fig 18a.** Switching Time Test Circuit 

**Fig 18b.** Switching Time Waveforms 

8 

2017-10-03 

AUIRFR/U540Z ~~LLL~~ 

## ~~Cinfin eon~~ 

**D-Pak (TO-252AA) Package Outline** (Dimensions are shown in millimeters (inches)) 

## **D-Pak (TO-252AA) Part Marking Information** 

**==> picture [330 x 148] intentionally omitted <==**

**----- Start of picture text -----**<br>
Part Number  AUIRFR540Z<br>Date Code<br>IR Logo  T éaR YWWA  Y= Year<br>WW= Work Week<br><br>XX         XX<br>[|sd<br>Lot Code<br>**----- End of picture text -----**<br>


9 

2017-10-03 

AUIRFR/U540Z ~~LLL~~ 

**I-Pak (TO-251AA)  Package Outline** (Dimensions are shown in millimeters (inches) 

## ~~Cinfineon~~ 

## **I-Pak (TO-251AA)  Part Marking Information** 

**==> picture [331 x 148] intentionally omitted <==**

**----- Start of picture text -----**<br>
Part Number  AUIRFU540Z<br>Date Code<br>IR Logo  T é4R YWWA  Y= Year<br>WW= Work Week<br><br>XX         XX<br>[|<br>Lot Code<br>**----- End of picture text -----**<br>


10 

2017-10-03 

~~Cinfineon~~ 

AUIRFR/U540Z ~~LLL~~ 

## **D-Pak (TO-252AA) Tape & Reel Information** (Dimensions are shown in millimeters (inches)) 

**==> picture [429 x 370] intentionally omitted <==**

**----- Start of picture text -----**<br>
TR TRR TRL<br>16.3 ( .641 ) 16.3 ( .641 )<br>15.7 ( .619 ) 15.7 ( .619 )<br>12.1 ( .476 ) FEED DIRECTION 8.1 ( .318 ) FEED DIRECTION<br>11.9 ( .469 ) 7.9 ( .312 )<br>NOTES :<br>1.  CONTROLLING DIMENSION : MILLIMETER.<br>2.  ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).<br>3.  OUTLINE CONFORMS TO EIA-481 & EIA-541.<br>  13 INCH<br>16 mm<br>**----- End of picture text -----**<br>


NOTES : 

1.  CONTROLLING DIMENSION : MILLIMETER. 

2.  ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 

3.  OUTLINE CONFORMS TO EIA-481 & EIA-541. 

NOTES : 

1. OUTLINE CONFORMS TO EIA-481. 

11 

2017-10-03 

~~ie~~ 

AUIRFR/U540Z ~~&&»«=$§» ed~~ 

## **Qualification Information** 

|**Qualification Level**|**Qualification Level**|Automotive<br>(per AEC-Q101)|Automotive<br>(per AEC-Q101)|
|---|---|---|---|
|||Comments: This part number(s) passed Automotive qualification. Infineon’s<br>Industrial and Consumer qualification level is granted by extension of the higher<br>Automotive level.||
|**Moisture Sensitivity Level**||D-Pak|MSL1|
|||I-Pak||
|**ESD**|Machine Model|Class M2 (+/-200V)† <br>AEC-Q101-002||
||Human Body Model|Class H1B (+/-1000V)† <br>AEC-Q101-001||
||Charged Device Model|Class C5 (+/-2000V)† <br>AEC-Q101-005||
|**RoHS Compliant**||Yes||



†  Highest passing voltage. 

## **Revision History** 

|**Date**|**Comments**|
|---|---|
|06/06/2014|<br>Updated part number by the pictures of the parts to AU nomenclature on page 1.|
|12/02/2015|<br>Updated datasheet with corporate template<br><br>Corrected ordering table on page 1.<br><br>Corrected typo RthJA(PCB Mount)from “40°C/W” to “50°C/W” onpage 1|
|10/03/2017|<br>Corrected typo error on package outline and part marking on page 9 and 10.|



## **Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2015 All Rights Reserved.** 

## **IMPORTANT NOTICE** 

The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. 

In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. 

The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. 

For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). 

## **WARNINGS** 

Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. 

Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 

12 

2017-10-03