AUIRFR2905Z

AUIRFR2905Z ~~—~~ 

**AUTOMOTIVE GRADE** 

## ~~Cinfin eon~~ 

## **Features** 

|**VDSS**<br>**55V**<br>**RDS(on)            typ.**<br>**11.1m**<br>**ID (Silicon Limited)**<br>**59A**<br>**max.**<br>**14.5m**<br>**ID (Package Limited)**<br>**42A**<br>**Features**<br>Advanced Process Technology<br>Ultra Low On-Resistance<br>175°C Operating Temperature<br>Fast Switching<br>Repetitive Avalanche Allowed up to Tjmax<br>Lead-Free, RoHS Compliant<br>Automotive Qualified *<br>**Description**<br>Specifically designed for Automotive applications, this HEXFET®<br>Power MOSFET utilizes the latest processing techniques to<br>achieve extremely low on-resistance per silicon area.  Additional<br>features of this design  are a 175°C junction operating temperature,<br>fast switching speed and improved repetitive avalanche rating .<br>These features combine to make this design an extremely efficient<br>and reliable device for use in Automotive applications and a wide<br>D-Pak<br>AUIRFR2905Z<br>**G**<br>**D**<br>**S**<br>Gate<br>Drain<br>Source<br>S<br>G<br>D<br>~~==~~<br>~~a~~|**VDSS**<br>**55V**<br>**RDS(on)            typ.**<br>**11.1m**<br>**ID (Silicon Limited)**<br>**59A**<br>**max.**<br>**14.5m**<br>**ID (Package Limited)**<br>**42A**<br>**Features**<br>Advanced Process Technology<br>Ultra Low On-Resistance<br>175°C Operating Temperature<br>Fast Switching<br>Repetitive Avalanche Allowed up to Tjmax<br>Lead-Free, RoHS Compliant<br>Automotive Qualified *<br>**Description**<br>Specifically designed for Automotive applications, this HEXFET®<br>Power MOSFET utilizes the latest processing techniques to<br>achieve extremely low on-resistance per silicon area.  Additional<br>features of this design  are a 175°C junction operating temperature,<br>fast switching speed and improved repetitive avalanche rating .<br>These features combine to make this design an extremely efficient<br>and reliable device for use in Automotive applications and a wide<br>D-Pak<br>AUIRFR2905Z<br>**G**<br>**D**<br>**S**<br>Gate<br>Drain<br>Source<br>S<br>G<br>D<br>~~==~~<br>~~a~~|
|---|---|
|variety of other applications.||
|**Base part number**<br>**Package Type**<br>**Standard Pack**<br>**Orderable Part Number**<br>**Form**<br>**Quantity**<br>AUIRFR2905Z<br>D-Pak<br>Tube<br>75<br>AUIRFR2905Z<br>Tape andReel Left<br>3000<br>AUIRFR2905ZTRL<br>~~ee~~<br>~~—————~~||
|**Absolute Maximum Ratings**||
|Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.   These are stress||
|ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not||
|implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance||
|and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless||
|otherwise specified.||
|**Symbol**<br>**Parameter**<br>**Max.**<br>**Units**||
|ID@ TC= 25°C<br>Continuous Drain Current, VGS@ 10V (Silicon Limited)<br>59<br>A<br>ID@ TC= 100°C<br>Continuous Drain Current, VGS@ 10V (Silicon Limited)<br>42<br>IDM<br>Pulsed Drain Current<br>240<br>PD@TC= 25°C<br>Maximum Power Dissipation<br>110<br>W<br>ID @TC= 25°C<br>Continuous Drain Current, VGS @10V(Package Limited)<br>42<br>~~——=—=_—~~||
|Linear Derating Factor<br>0.72<br>W/°C||
|VGS<br>Gate-to-SourceVoltage<br>± 20<br>V<br>EAS<br>Single Pulse Avalanche Energy (ThermallyLimited) <br>55<br>EAS(Tested)<br>Single Pulse Avalanche EnergyTested Value<br>82<br>IAR<br>Avalanche Current<br>See Fig.15,16, 12a, 12b<br>A<br>EAR<br>Repetitive Avalanche Energy <br>mJ<br>TJ<br>Operating Junction and<br>-55  to + 175<br>TSTG<br>Storage Temperature Range<br>°C<br>SolderingTemperature,for 10 seconds(1.6mm from case)<br>300<br>mJ<br>~~———~~<br>~~a~~||
|**Thermal Resistance**||
|**Symbol**<br>**Parameter**<br>**Typ.**<br>**Max.**<br>**Units**<br>RJC<br>Junction-to-Case<br>–––<br>1.38<br>°C/W<br>RJA<br>Junction-to-Ambient(PCB Mount) <br>–––<br>50<br>RJA<br>Junction-to-Ambient<br>–––<br>110<br>~~—~~<br>~~ae~~||
|HEXFET® is a registered trademark of Infineon.||
|*****Qualification standards can be found atwww.infineon.com||



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~~Cinfin eon~~ 

AUIRFR2905Z ~~LLL~~ 

## **Static @ TJ = 25°C (unless otherwise specified)** 

|Qg<br>~~es~~|Total Gate Charge<br>~~en~~|–––<br>~~en~~|29<br>~~en~~|44<br>~~en~~|nC|ID= 36A<br>VDS= 44V<br>VGS= 10V|
|---|---|---|---|---|---|---|
|g<br>Qgs<br>~~es~~<br>~~es~~|Gate-to-Source Charge<br>~~en~~|–––<br>~~en~~|7.7<br>~~en~~|–––<br>~~en~~|||
|Qgd<br>~~es~~<br>~~es~~|Gate-to-Drain Charge|–––|12|–––|||
|gd<br>td(on)<br>~~es~~<br>~~es~~|Turn-On Delay Time|–––|14|–––|ns|VDD= 28V<br>ID= 36A<br>RG= 15<br>VGS= 10V|
|d(on)<br>tr<br>~~es~~<br>~~es~~|RiseTime<br>~~I~~|–––<br>~~I~~|66<br>~~I~~|–––<br>~~I~~|||
|td(off)<br>~~es~~<br>~~es~~|Turn-Off DelayTime<br>~~I~~<br>~~nn~~|–––<br>~~I~~|31<br>~~I~~|–––<br>~~I~~|||
|d(off)<br>tf<br>~~es~~<br>~~es~~|Fall Time<br>~~I~~<br>~~nn~~|–––<br>~~I~~|35<br>~~I~~|–––<br>~~I~~|||
|LD<br>~~es~~<br>~~fp~~|Internal Drain Inductance<br>~~nn~~<br>~~fp~~|–––<br>~~fp~~|4.5<br>~~fp~~|–––<br>~~fp~~|nH<br>~~fp~~|Between lead,<br>6mm (0.25in.)<br>from package<br>and center of die contact<br>~~ee~~|
|LS<br>~~fp~~<br>~~es~~|Internal Source Inductance<br>~~fp~~<br>~~nn~~|–––<br>~~fp~~<br>~~I~~|7.5<br>~~fp~~|–––<br>~~fp~~|||
|Ciss<br>~~es~~<br>~~es~~~~**e**~~|Input Capacitance<br>~~nn~~<br>~~**e**ee~~|–––<br>~~I~~<br>~~ee~~|1380<br>~~ee~~|–––<br>~~ee~~|pF<br>~~ee~~|VGS= 0V<br>VDS= 25V<br>ƒ= 1.0MHz<br>~~ee~~<br>~~Po~~|
|Coss<br>~~es~~<br>~~es~~~~**e**~~|OutputCapacitance<br>~~nn~~<br>~~**e**ee~~|–––<br>~~I~~<br>~~ee~~|240<br>~~ee~~|–––<br>~~ee~~|||
|Crss<br>~~es~~<br>~~es~~~~**e**~~<br>~~es~~|ReverseTransferCapacitance<br>~~nn~~<br>~~**e**ee~~|–––<br>~~I~~<br>~~ee~~|120<br>~~ee~~|–––<br>~~ee~~|||
|Coss<br>~~es~~<br>~~**e**~~<br>~~es~~<br>~~es~~|Output Capacitance<br>~~nn~~<br>~~**e**ee~~|–––<br>~~I~~<br>~~ee~~|820<br>~~ee~~|–––<br>~~ee~~||VGS=0V,VDS= 1.0Vƒ= 1.0MHz<br>~~ee~~<br>~~Po~~<br>~~Po~~|
|Coss<br>~~**e**~~<br>~~es~~<br>~~es~~<br>~~s~~|Output Capacitance<br>~~**e**ee~~<br>~~es~~|–––<br>~~ee~~|190<br>~~ee~~|–––<br>~~ee~~||VGS =0V, VDS =44V ƒ=1.0MHz<br>~~Po~~<br>~~Po~~<br>~~PO~~|
|Coss eff.<br>~~**e**~~<br>~~es~~<br>~~s~~|Effective Output Capacitance<br>~~**e**ee~~<br>~~es~~|–––<br>~~ee~~|300<br>~~ee~~|–––<br>~~ee~~||VGS=0V,VDS=0Vto44V<br>~~Po~~<br>~~PO~~|
|**Diode Characteristics**<br>~~**e**ee~~<br>~~s es~~<br>~~PO~~<br>~~po~~|||||||
|~~po~~|**Parameter **<br>~~po~~|**Min.**<br>~~po~~|**Typ. M**<br>~~po~~|**. Max.**<br>~~po~~|**Units**<br>~~po~~|**Conditions**<br>~~po~~|
|IS<br>~~po~~|Continuous Source Current<br>(Body Diode)<br>~~po~~|–––<br>~~po~~|–––<br>~~po~~|42<br>~~po~~|A<br>~~po~~<br>~~eS~~<br>~~(OO~~|MOSFET symbol<br>showing  the<br>integral reverse<br>p-n junction diode.<br>~~po~~<br>~~eS~~|
|ISM<br>~~es~~|Pulsed Source Current<br>(Body Diode)<br>~~eS~~|–––<br>~~eS~~<br>~~I~~|–––<br>~~eS~~|240<br>~~eS~~<br>~~(OO~~|||
|VSD<br>~~es~~|Diode Forward Voltage<br>~~eS~~|–––<br>~~eS~~<br>~~I~~|–––<br>~~eS~~|1.3<br>~~eS~~<br>~~(OO~~|V<br>~~eS~~<br>~~(OO~~|TJ =25°C,IS=36A,VGS =0V<br>~~eS~~|
|trr<br>~~es~~<br>~~eee~~|Reverse Recovery Time<br>~~eS~~<br>~~eee~~|–––<br>~~eS~~<br>~~I~~<br>~~eee~~|23<br>~~eS~~<br>~~eee~~|35<br>~~eS~~<br>~~(OO~~<br>~~eee~~|ns<br>~~eS~~<br>~~(OO~~<br>~~eee~~|TJ= 25°C ,IF= 36A, VDD= 28V<br>nC   di/dt = 100A/µs<br>~~eS~~<br>~~eee~~<br>~~Df~~|
|Qrr<br>~~eee~~<br>~~es~~|Reverse RecoveryCharge<br>~~eee~~<br>~~Df~~|–––<br>~~eee~~<br>~~Df~~|16<br>~~eee~~<br>~~Df~~|24<br>~~eee~~<br>~~Df~~|nC   di/dt = 100A/<br>~~eee~~<br>~~Df~~||
|ton<br>~~es~~|Forward Turn-On Time<br>~~Df~~|Intrinsic turn-on time is negligible(turn-on is dominated byLS+LD)<br>~~Df~~|||||



**Notes:** 

 Repetitive rating;  pulse width limited by max. junction temperature. (See fig. 11) 

 Limited by TJmax , starting  TJ = 25°C, L = 0.08mH, RG = 25, IAS = 36A, VGS =10V. Part not recommended for use above this value. 

 Pulse width 1.0ms; duty cycle  2%. 

Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS 

Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. 

This value determined from sample failure population. 100% tested to this value in production. 

 When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994 

- R is measured at TJ approximately 90°C 

Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 42A. 

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1000 1000<br>VGS VGS<br>TOP           15V TOP           15V<br>10V 10V<br>8.0V 8.0V<br>100 7. 6.0V 0V 7.0V 6.0V<br>5.5V5.0V pa) 100 5.5V 5.0V Nn<br>BOTTOM 4.5V BOTTOM 4.5V<br>10<br>pec TT ie<br>10 4.5V<br>1 4.5V<br>iii atl Sl<br> 60µs PULSE WIDTH  60µs PULSE WIDTH 60µs PULSE WIDTH<br>Tj = 25°C<br>Tj = 175°C<br>0.1 A EA 1 aii<br>0.1 1 10 100 0.100 111 101010<br>VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)<br>Fig. 1  Typical Output Characteristics  Fig. 2  Typical Output Characteristics<br>50<br>1000.0<br>TJ = 175°C<br>40<br>100.0 Eaapee {| | fe<br>30<br>TJ = 175°C TJ = 25°C<br>20<br>10.0 foil TJ = 25 ° C |x<br>10<br>V DS  = 25V VDS = 15V<br>380µs PULSE WIDTH<br>1.0 ri  60µs PULSE WIDTH 0 APVann<br>0 10 20 30 40 50<br>4.0 5.0 6.0 7.0 8.0 9.0 10.0<br>ID, Drain-to-Source Current (A)<br>VGS, Gate-to-Source Voltage (V)<br>Gfs, Forward Transconductance (S)<br>ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A)<br>)<br>ID, Drain-to-Source Current<br>**----- End of picture text -----**<br>


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1000<br>VGS<br>TOP           15V<br>10V<br>8.0V<br>7.0V<br>6.0V<br>100 5.5V Nn<br>5.0V<br>BOTTOM 4.5V<br>ie<br>10 4.5V<br>Sl<br> 60µs PULSE WIDTH 60µs PULSE WIDTH<br>Tj = 175°C<br>1 aii LA<br>0.100 111 101010 100100<br>VDS, Drain-to-Source Voltage (V)<br>ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig. 2** Typical Output Characteristics 

**Fig. 3** Typical Transfer Characteristics 

**Fig. 4** Typical Forward Transconductance Vs. Drain Current 

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2400 VCGS  iss    = C = 0V,       f = 1 MHZgs  + Cgd,  C ds SHORTED 20 ID= 36A<br>2000 Crss    = Cgd  VDS= 44V<br>Coss   = Cds  + Cgd 16 VDS= 28V<br>VDS= 11V<br>1600<br>TJ Ciss 12 P<<br>1200<br>man eH | fh<br>8<br>800<br>CCCI OT 4<br>4<br>400 Coss<br>FOR TEST CIRCUIT<br>Crss<br>SEE FIGURE 13<br>0 Petteae 0 vtAnna | |<br>1 10 100 0 10 20 30 40 50<br>VDS, Drain-to-Source Voltage (V)  QG  Total Gate Charge (nC)<br>Fig 5.  Typical Capacitance vs.   Fig 6.  Typical Gate Charge vs.<br>      Drain-to-Source Voltage       Gate-to-Source Voltage<br>1000.0 1000<br>OPERATION IN THIS AREA<br>LIMITED BY R DS(on)<br>Ue<br>100.0 100<br>TJ = 175°C<br>Va wySys sae<br>10.0 10 100µsec<br>TJ = 25°C<br>1msec<br>1.0 1<br>10msec<br>Tc = 25°C<br>VGS = 0V Tj = 175°C<br>Single Pulse<br>0.1 0.1<br>0.2 0.6 1.0 1.4 1.8 2.2 1 10 100 1000<br>VSD, Source-toDrain Voltage (V) VDS  , Drain-toSource Voltage (V)<br>ISD, Reverse Drain Current (A) ID,  Drain-to-Source Current (A)<br>VGS, Gate-to-Source Voltage (V)<br>C, Capacitance (pF)<br>**----- End of picture text -----**<br>


**Fig. 7** Typical Source-to-Drain Diode Forward Voltage 

**Fig 8.** Maximum Safe Operating Area 

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70<br>LIMITED BY PACKAGE<br>60<br>50 A<br>40<br>a<br>30<br>chen<br>20<br>Po IN I<br>10<br>PN<br>0 PE ET IN<br>25 50 75 100 125 150 175<br> TC , Case Temperature (°C)<br>ID , Drain Current (A)<br>**----- End of picture text -----**<br>


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2.0<br>ID = 36A<br>V GS  = 10V<br>1.5 W yy<br>1.0 LLL<br>7<br>MELLEL<br>0.5<br>q<br>-60 -40 -20 0 20 40 60 80 100 120 140 160 180<br>TJ , Junction Temperature (°C)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>**----- End of picture text -----**<br>


**Fig 9.** Maximum Drain Current Vs. Case Temperature 

**Fig 10.** Normalized On-Resistance Vs. Temperature 

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10<br>1<br>D = 0.50<br>0.20<br>0.10<br>0.1 0.050.020.01 J J 1 1 R 1R1 2  R2 2R2 R3 3R 3 3  C  C Ri (0.3962  0.5693  °C/W)  0.00012  0.00045  i (sec)<br>0.01 = Ci= re iRi eees<br>SINGLE PULSE Ci= iRi Notes:0.4129  0.0015<br>( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2<br>2. Peak Tj = P dm x Zthjc + Tc<br>0.001<br>est Lirementt |<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Thermal Response ( Z  thJC )<br>**----- End of picture text -----**<br>


**Fig 11.** Maximum Effective Transient Thermal Impedance, Junction-to-Case 

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AUIRFR2905Z<br>Geole<br>15V<br>240<br>VDS L DRIVER                  ID<br>TOP   36A<br>200<br>                8.6A<br>BOTTOM   4.8A<br>R G D.U.T +<br>- [V][DD] 160<br>IAS A<br>a n Ni<br>20V<br>f eep tp t 0.01 ie  ] 120 CTPY\ LL I<br>80 RINE ELL<br>Fig 12a.   Unclamped Inductive Test Circuit<br>V(BR)DSS 40<br>tp PES<br>0<br>25 50 75 100 125 150 175<br>Starting TJ, Junction Temperature (°C)<br>Fig 12c.  Maximum Avalanche Energy<br> vs. Drain Current<br>IAS i P ANU<br>Fig 12b.   Unclamped Inductive Waveforms<br>4.5<br>Id<br>Vds<br>Vgs 4.0<br>3.5<br>ID = 250µA<br>Vgs(th)<br>3.0<br>p aoei ERRSUEPNT<br>Ao TTT PNG LE<br>Qgs1 Qgs2 Qgd Qgodr | 2.5 EET EA.<br>Fig 13a.    Gate Charge Waveform<br>TLLELEELK<br>2.0<br>-75 -50 -25 0 25 50 75 100 125 150 175<br>TJ , Temperature ( °C )<br>VGS(th) Gate threshold Voltage (V)<br>EAS, Single Pulse Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


**Fig 14.** Threshold Voltage Vs. Temperature 

**Fig 13b.** Gate Charge Test Circuit 

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1000<br>Duty Cycle = Single Pulse<br>100 Allowed avalanche Current vs<br>avalanche  pulsewidth,  tav<br>assuming  Tj = 25°C due to<br>0.01 avalanche losses. Note: In no<br>10 mai Ol OB case should Tj be allowed to  i<br>0.05<br>exceed Tjmax<br>0.10<br>1 = sg<br>PLL Tries TTT TTT<br>0.1 BL SG | i<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Avalanche Current (A)<br>**----- End of picture text -----**<br>


**Fig 15.** Typical Avalanche Current Vs. Pulse width 

## **Notes on Repetitive Avalanche Curves , Figures 15, 16:** 

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60<br>TOP          Single Pulse<br>BOTTOM   1% Duty Cycle<br>50 I D  = 36A<br>qq<br>40<br>NACE<br>30<br>PNNET<br>20<br>BERRSNNGEEEE<br>10<br>ALLEL ESN<br>BERR RRRERNSS<br>0<br>25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>EAR , Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


## **(For further info, see AN-1005 at www.infineon.com)** 

1. Avalanche failures assumption: 

   - Purely a thermal phenomenon and failure occurs at a temperature far in 

   - excess of Tjmax. This is validated for every part type. 

2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded. 

3.  Equation below based on circuit and waveforms shown in Figures 12a, 12b. 

4.  PD (ave) = Average power dissipation per single avalanche pulse. 

5.  BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

6.  Iav = Allowable avalanche current. 

7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 15, 16). 

   - tav = Average time in avalanche. 

   - D = Duty cycle in avalanche =  tav ·f 

   - ZthJC(D, tav) = Transient thermal resistance, see Figures 13) 

## **PD (ave) = 1/2 ( 1.3·BV·Iav) =**  **T/ ZthJC Iav = 2**  **T/ [1.3·BV·Zth]** 

**Fig 16.** Maximum Avalanche Energy Vs. Temperature 

**EAS (AR) = PD (ave)·tav** 

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**Fig 17.** Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs 

**Fig 18a.** Switching Time Test Circuit 

**Fig 18b.** Switching Time Waveforms 

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AUIRFR2905Z ~~LLL~~ 

## ~~Cinfin eon~~ 

**D-Pak (TO-252AA) Package Outline** (Dimensions are shown in millimeters (inches)) 

## **D-Pak (TO-252AA) Part Marking Information** 

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Part Number  AUFR2905Z<br>Date Code<br>IR Logo  T éaR YWWA  Y= Year<br>WW= Work Week<br><br>XX         XX<br>[|sd<br>Lot Code<br>**----- End of picture text -----**<br>


Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 

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**D-Pak (TO-252AA) Tape & Reel Information** (Dimensions are shown in millimeters (inches)) 

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TR TRR TRL<br>16.3 ( .641 ) 16.3 ( .641 )<br>15.7 ( .619 ) 15.7 ( .619 )<br>12.1 ( .476 ) FEED DIRECTION 8.1 ( .318 ) FEED DIRECTION<br>11.9 ( .469 ) 7.9 ( .312 )<br>NOTES :<br>1.  CONTROLLING DIMENSION : MILLIMETER.<br>2.  ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).<br>3.  OUTLINE CONFORMS TO EIA-481 & EIA-541.<br>  13 INCH<br>16 mm<br>**----- End of picture text -----**<br>


NOTES : 

1.  CONTROLLING DIMENSION : MILLIMETER. 

2.  ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 

3.  OUTLINE CONFORMS TO EIA-481 & EIA-541. 

NOTES : 

1. OUTLINE CONFORMS TO EIA-481. 

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 

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## **Qualification Information** 

|**Qualification Information**|**Qualification Information**|||
|---|---|---|---|
|**Qualification Level**||Automotive<br>(per AEC-Q101)||
|||Comments: This part number(s) passed Automotive qualification. Infineon’s<br>Industrial and Consumer qualification level is granted by extension of the higher<br>Automotive level.||
|**Moisture Sensitivity Level**||D-Pak|MSL1|
|**ESD**|Machine Model|Class M3 (+/- 400V)† <br>AEC-Q101-002||
||Human Body Model|Class H1A (+/- 500V)† <br>AEC-Q101-001||
||Charged Device Model|Class C5 (+/- 1125V)† <br>AEC-Q101-005||
|**RoHS Compliant**||Yes||



- Highest passing voltage. 

## **Revision History** 

|**Date**|||**Comments**|
|---|---|---|---|
|10/12/2015||Updated datasheet with corporate template||
|||Corrected orderingtable onpage 1.||



**Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2015 All Rights Reserved.** 

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In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. 

The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. 

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## **WARNINGS** 

Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. 

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11 

2015-10-12