AUIRFB8405
Power MOSFET, N Channel, 40 V, 120 A, 2500 µohm, TO-220AB, Through Hole
- Manufacturer: INFINEON
- Product type: Single MOSFETs
- Transistor Polarity:N Channel; Continuous Drain Current Id:120A; Drain Source Voltage Vds:40V; On Resistance Rds(on):0.0021ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:3V; P
- MSL: -
- SVHC: No SVHC (23-Jan-2024)
- No. of Pins: 3Pins
- Channel Type: N Channel
- Product Range: -
- Qualification: AEC-Q101
- Power Dissipation: 163W
- Transistor Mounting: Through Hole
- Rds(on) Test Voltage: 10V
- Transistor Case Style: TO-220AB
- Drain Source Voltage Vds: 40V
- Operating Temperature Max: 175°C
- Continuous Drain Current Id: 120A
- Drain Source On State Resistance: 2500µohm
- Gate Source Threshold Voltage Max: 3V
| Delivery and price | |
|---|---|
| Units per pack | 1000 |
| Price | 2.18 € |
| Current stock | 500+ |
| Lead time | 7 days |
**AUTOMOTIVE GRADE**
## **AUIRFB8405** ~~|~~
## **Features**
- Advanced Process Technology
- New Ultra Low On-Resistance
- 175°C Operating Temperature
- Fast Switching
- Repetitive Avalanche Allowed up to Tjmax
- Lead-Free, RoHS Compliant
- Automotive Qualified *
## **Description**
Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and wide variety of other applications.
## **Applications**
- Electric Power Steering (EPS)
- Battery Switch
- Start/Stop Micro Hybrid
## HEXFET[®] Power MOSFET
|||D||**VDSS**<br>**RDS(on) typ.**<br>**max.**|**typ.**<br>**max.**|**40V**<br>**2.1m**Ω<br>**2.5m**Ω|
|---|---|---|---|---|---|---|
|G||||**ID (Silicon Limit**|**n Limited)**|**185A**|
||||||||
|||S||**ID (Package Limited)**||**120A**|
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D<br>S<br>D<br>G<br>TO-220AB<br>AUIRFB8405<br>G D S<br>Gate Drain Source<br>**----- End of picture text -----**<br>
- Heavy Loads
- DC-DC Applications
|**Base part number**|**Package Type**|**Standard Pack**|**Standard Pack**|**Orderable Part Number**|
|---|---|---|---|---|
|||**Form**|**Quantity**||
|AUIRFB8405|TO-220|Tube|50|AUIRFB8405|
## **Absolute Maximum Ratings**
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolutemaximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified.
|**Symbol**|**Parameter**|**Max.**|**Units**|
|---|---|---|---|
|ID@ TC= 25°C|Continuous Drain Current,VGS@ 10V(Silicon Limited)|185|A|
|ID@ TC= 100°C|Continuous Drain Current,VGS@ 10V(Silicon Limited)|131||
|ID@ TC= 25°C|Continuous Drain Current,VGS@ 10V(Package Limited)|120||
|IDM|Pulsed Drain Current|904||
|PD@TC= 25°C|Maximum Power Dissipation|163|W|
||Linear DeratingFactor|1.1|W/°C|
|VGS|Gate-to-Source Voltage|± 20|V|
|TJ<br>TSTG|Operating Junction and<br>Storage Temperature Range|-55 to + 175|°C|
||SolderingTemperature,for 10 seconds(1.6mm from case)|300||
||Mountingtorque,6-32 or M3 screw|10lbfin(1.1Nm)||
HEXFET[®] is a registered trademark of International Rectifier.
***** Qualification standards can be found at http://www.irf.com/
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AUIRFB8405
## **Avalanche Characteristics**
|EAS (Thermally limited)|Single Pulse Avalanche Energy |181|181|mJ|
|---|---|---|---|---|
|EAS (tested)|Single Pulse Avalanche EnergyTested Value|247|||
|<br>IAR|Avalanche Current|See Fig. 14, 15, 24a, 24b||A|
|EAR|Repetitive Avalanche Energy |||mJ|
|**Thermal Resistance**|||||
|**Symbol**|**Parameter**|**Typ.**|**Max.**|**Units**|
|RθJC|Junction-to-Case|–––|0.92|°C/W|
|RθCS|Case-to-Sink,Flat,Greased Surface|0.50|–––||
|RθJA|Junction-to-Ambient|–––|62||
## **Static @ TJ = 25°C (unless otherwise specified)**
|**Symbol**|**Parameter**|**Min.**|**Typ.**|**Max. **|**Units**|**Conditions**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-to-Source Breakdown Voltage|40|–––|–––|V|VGS= 0V,ID= 250μA|
|ΔV(BR)DSS/ΔTJ|Breakdown Voltage Temp. Coefficient|–––|0.026|–––|V/°C|Reference to 25°C,ID= 1.0mA|
|RDS(on)|Static Drain-to-Source On-Resistance|–––|2.1|2.5|mΩ|VGS= 10V,ID= 100A|
|VGS(th)|Gate Threshold Voltage|2.2|3.0|3.9|V|VDS= VGS,ID= 100μA|
|IDSS|Drain-to-Source Leakage Current|–––|–––|1.0|μA|VDS= 40V,VGS= 0V|
|||–––|–––|150||VDS= 40V,VGS= 0V,TJ= 125°C|
|IGSS|Gate-to-Source Forward Leakage|–––|–––|100|nA|VGS= 20V|
||Gate-to-Source Reverse Leakage|–––|–––|-100||VGS= -20V|
|RG|Internal Gate Resistance|–––|2.3|–––|Ω||
|**Dynamic@ TJ = 25°C(unless otherwise specified)**|||||||
|**Symbol**|**Parameter**|**Min.**|**Typ.**|**Max. **|**Units**|**Conditions**|
|gfs|Forward Transconductance|100|–––|–––|S|VDS= 10V,ID= 100A|
|Qg|Total Gate Charge|–––|107|161|nC|VDS=20V<br>VGS= 10V<br>ID= 100A|
|Qgs|Gate-to-Source Charge|–––|29|–––|||
|Qgd|Gate-to-Drain("Miller")Charge|–––|39|–––|||
|Qsync|Total Gate Charge Sync.(Qg- Qgd)|–––|68|–––||ID= 100A,VDS=0V,VGS= 10V|
|td(on)|Turn-On DelayTime|–––|14|–––|ns|VDD= 26V<br>VGS= 10V<br>ID= 100A<br>RG= 2.7Ω|
|tr|Rise Time|–––|128|–––|||
|td(off)|Turn-Off DelayTime|–––|55|–––|||
|tf|Fall Time|–––|77|–––|||
|Ciss|Input Capacitance|–––|5193|–––|pF|VGS= 0V<br>VDS= 25V<br>ƒ= 1.0 MHz,See Fig. 5|
|Coss|Output Capacitance|–––|754|–––|||
|Crss|Reverse Transfer Capacitance|–––|519|–––|||
|Cosseff.(ER)|Effective Output Capacitance(EnergyRelated)|–––|878|–––||VGS= 0V,VDS= 0V to 32V,See Fig. 11|
|Cosseff.(TR)|Effective Output Capacitance(Time Related)|–––|1225|–––||VGS= 0V,VDS= 0V to 32V|
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## **Diode Characteristics**
|**Symbol**|**Parameter**|**Min.**|**Typ.**|**Max. **|**Units**|**Conditions**|
|---|---|---|---|---|---|---|
|IS|Continuous Source Current<br>(Body Diode)|–––|–––|185|A|S<br>D<br>G<br>integral reverse<br>p-n junction diode.<br>MOSFET symbol<br>showing the|
|ISM|Pulsed Source Current<br>(Body Diode)|–––|–––|904|||
|VSD|Diode Forward Voltage|–––|0.9|1.3|V|TJ= 25°C,IS= 100A,VGS= 0V|
|dv/dt|Peak Diode Recovery |–––|1.7|–––|V/ns|TJ= 175°C,IS= 100A,VDS= 40V|
|trr|Reverse Recovery Time|–––|44|–––|ns|TJ= 25°C<br>VR= 34V,<br>TJ= 125°C<br>IF= 100A<br>TJ= 25°C<br>di/dt = 100A/μs<br>TJ= 125°C<br>TJ= 25°C|
|||–––|45|–––|||
|Qrr|Reverse Recovery Charge|–––|44|–––|nC||
|||–––|46|–––|||
|IRRM|Reverse RecoveryCurrent|–––|1.9|–––|A||
|ton|Forward Turn-On Time|Intrinsic turn-on time is negligible(turn-on is dominated byLS+LD)|||||
## **Notes:**
- Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 120A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-1140)
- Repetitive rating; pulse width limited by max. junction temperature.
- Limited by TJmax, starting TJ = 25°C, L = 0.036mH, RG = 50 Ω , IAS = 100A, VGS =10V. Part not recommended for use above this value.
- Pulse width ≤ 400μs; duty cycle ≤ 2%.
- Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
- Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
- R θ is measured at TJ approximately 90°C.
- R θ JC value shown is at time zero.
- ISD ≤ 100A, di/dt ≤ 1295A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
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1000<br>VGS<br>TOP 15V<br>10V<br>8.0V<br>7.0V<br>6.0V<br>5.5V<br>100 5.0V<br>BOTTOM 4.5V<br>10<br>4.5V<br>≤ 60μs PULSE WIDTH<br>Tj = 25°C<br>1<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 1. Typical Output Characteristics<br>1000<br>100<br>TJ = 175°C<br>TJ = 25°C<br>10<br>VDS = 10V<br>≤ 60μs PULSE WIDTH<br>1.0<br>2 3 4 5 6 7 8 9<br>VGS, Gate-to-Source Voltage (V)<br>ID, Drain-to-Source Current (A)<br>ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>
**Fig 3.** Typical Transfer Characteristics
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100000<br>VGS = 0V, f = 1 MHZ<br>Ciss = C gs + Cgd, C ds SHORTED<br>C = C<br>rss gd<br>C = C + C<br>oss ds gd<br>10000<br>Ciss<br>C<br>oss<br>Crss<br>1000<br>100<br>1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>C, Capacitance (pF)<br>**----- End of picture text -----**<br>
**Fig 5.** Typical Capacitance vs. Drain-to-Source Voltage
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1000<br>VGS<br>TOP 15V<br>10V<br>8.0V<br>7.0V<br>6.0V<br>5.5V<br>5.0V<br>BOTTOM 4.5V<br>100<br>4.5V<br>≤ 60μs PULSE WIDTH<br>Tj = 175°C<br>10<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 2. Typical Output Characteristics<br>2.0<br>ID = 100A<br>1.8 VGS = 10V<br>1.6<br>1.4<br>1.2<br>1.0<br>0.8<br>0.6<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Junction Temperature (°C)<br>ID, Drain-to-Source Current (A)<br>RDS(on) , Drain-to-Source On Resistance (Normalized)<br>**----- End of picture text -----**<br>
**Fig 4.** Normalized On-Resistance vs. Temperature
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14.0<br>ID= 100A<br>12.0 V DS = 32V<br>VDS= 20V<br>10.0<br>8.0<br>6.0<br>4.0<br>2.0<br>0.0<br>0 20 40 60 80 100 120 140<br> QG, Total Gate Charge (nC)<br>VGS, Gate-to-Source Voltage (V)<br>**----- End of picture text -----**<br>
**Fig 6.** Typical Gate Charge vs. Gate-to-Source Voltage
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1000<br>T = 175°C<br>J<br>100<br>TJ = 25°C<br>10<br>V GS = 0V<br>1.0<br>0.2 0.6 1.0 1.4 1.8 2.2<br>VSD, Source-to-Drain Voltage (V)<br>Fig 7. Typical Source-Drain Diode<br>Forward Voltage<br>ISD, Reverse Drain Current (A)<br>**----- End of picture text -----**<br>
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200<br>Limited By Package<br>150<br>100<br>50<br>0<br>25 50 75 100 125 150 175<br> TC , Case Temperature (°C)<br>Fig 9. Maximum Drain Current vs.<br>Case Temperature<br>0.9<br>0.8<br>0.7<br>0.6<br>0.5<br>0.4<br>0.3<br>0.2<br>0.1<br>0.0<br>-5 0 5 10 15 20 25 30 35 40 45<br>VDS, Drain-to-Source Voltage (V)<br>Energy (μJ)<br>ID, Drain Current (A)<br>**----- End of picture text -----**<br>
**Fig 11.** Typical COSS Stored Energy
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10000<br>OPERATION IN THIS AREA<br>LIMITED BY R DS(on)<br>1000<br>100μsec<br>1m sec<br>100<br>Limited by package<br>10<br>10msec<br>1 Tc = 25°C DC<br>Tj = 175°C<br>Single Pulse<br>0.1<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 8. Maximum Safe Operating Area<br>50<br>Id = 1.0mA<br>48<br>46<br>44<br>42<br>40<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Temperature ( °C )<br>Fig 10. Drain-to-Source Breakdown Voltage<br>ID, Drain-to-Source Current (A)<br>V(BR)DSS, Drain-to-Source Breakdown Voltage (V)<br>**----- End of picture text -----**<br>
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800<br>ID<br>700<br>TOP 17A<br>36A<br>600<br>BOTTOM 100A<br>500<br>400<br>300<br>200<br>100<br>0<br>25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>EAS , Single Pulse Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>
**Fig 12.** Maximum Avalanche Energy vs. DrainCurrent
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10<br>1<br>D = 0.50<br>0.20<br>0.1 0.10<br>0.05<br>0.02<br>0.01<br>0.01<br>SINGLE PULSE Notes:<br>( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2<br>2. Peak Tj = P dm x Zthjc + Tc<br>0.001<br>1E-006 1E-005 0.0001 0.001 0.01 0.1 1<br>t1 , Rectangular Pulse Duration (sec)<br>Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case<br>1000<br>Allowed avalanche Current vs avalanche<br>Duty Cycle = Single Pulse pulsewidth, tav, assuming Δ Tj = 150°C and<br>Tstart =25°C (Single Pulse)<br>100<br>0.01<br>0.05<br>10 0.10<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming ΔΤ j = 25°C and<br>Tstart = 150°C.<br>1<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Avalanche Current (A)<br>Thermal Response ( Z thJC ) °C/W<br>**----- End of picture text -----**<br>
**Fig 14.** Typical Avalanche Current vs.Pulsewidth
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200<br>TOP Single Pulse<br>180 BOTTOM 1.0% Duty Cycle<br>160 I D = 100A<br>140<br>120<br>100<br>80<br>60<br>40<br>20<br>0<br>25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>EAR , Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>
**Notes on Repetitive Avalanche Curves , Figures 14, 15 (For further info, see AN-1005 at www.irf.com)**
1. Avalanche failures assumption:
- Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 24a, 24b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. Δ T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15).
- tav = Average time in avalanche.
- D = Duty cycle in avalanche = tav ·f
- ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
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PD (ave) = 1/2 ( 1.3·BV·Iav) = Δ T/ ZthJC<br>Iav = 2 Δ T/ [1.3·BV·Zth]<br>EAS (AR) = PD (ave)·tav<br>**----- End of picture text -----**<br>
**Fig 15.** Maximum Avalanche Energy vs. Temperature
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8.0<br>ID = 100A<br>6.0<br>4.0<br>T = 125°C<br>J<br>2.0<br>TJ = 25°C<br>0.0<br>4 6 8 10 12 14 16 18 20<br>VGS, Gate -to -Source Voltage (V)<br>Fig 16. On-Resistance vs. Gate Voltage<br>10<br>IF = 60A<br>VR = 34V<br>8<br>TJ = 25°C<br>TJ = 125°C<br>6<br>4<br>2<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>) Ω<br>RDS(on), Drain-to -Source On Resistance (m<br>IRRM (A)<br>**----- End of picture text -----**<br>
**Fig. 18** - Typical Recovery Current vs. dif/dt
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12<br>IF = 100A<br>10 V R = 34V<br>TJ = 25°C<br>8 T J = 125°C<br>6<br>4<br>2<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>IRRM (A)<br>**----- End of picture text -----**<br>
**Fig. 20** - Typical Recovery Current vs. dif/dt
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4.5<br>4.0<br>3.5<br>3.0<br>ID = 100μA<br>2.5<br>ID = 1.0mA<br>ID = 1.0A<br>2.0<br>1.5<br>1.0<br>-75 -50 -25 0 25 50 75 100 125 150 175<br>TJ , Temperature ( °C )<br>VGS(th), Gate threshold Voltage (V)<br>**----- End of picture text -----**<br>
**Fig 17.** Threshold Voltage vs. Temperature
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200<br>IF = 60A<br>VR = 34V<br>T = 25°C<br>150 J<br>TJ = 125°C<br>100<br>50<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>QRR (nC)<br>**----- End of picture text -----**<br>
**Fig. 19** - Typical Stored Charge vs. dif/dt
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200<br>IF = 100A<br>VR = 34V<br>T = 25°C<br>150 J<br>TJ = 125°C<br>100<br>50<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>QRR (nC)<br>**----- End of picture text -----**<br>
**Fig. 21** - Typical Stored Charge vs. dif/dt
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60<br>VGS = 5.5V<br>50 V GS = 6.0V<br>VGS = 7.0V<br>40 V GS = 8.0V<br>VGS =10V<br>30<br>20<br>10<br>0<br>0 100 200 300 400 500<br>ID, Drain Current (A)<br>) Ω<br>RDS(on), Drain-to -Source On Resistance ( m<br>**----- End of picture text -----**<br>
**Fig 22.** Typical On-Resistance vs. Drain Current
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Driver Gate Drive<br>P.W.<br>D.U.T + P.W. Period D = Period<br>*<br> Circuit Layout Considerations VGS=10V<br> • Low Stray Inductance<br> • Ground Plane<br>- Current Transformer • Low Leakage Inductance D.U.T. ISD Waveform<br>+<br>- - + ReverseRecoveryCurrent Body Diode ForwardCurrent di/dt<br>D.U.T. VDS Waveform Diode Recovery<br> dv/dt VDD<br>RG • • dv/dt controlled by RDriver same type as D.U.T.G VDD + Re-AppliedVoltage Body Diode Forward Drop<br>• ISD controlled by Duty Factor "D" - Inductor CurrentInductor Curent<br>• D.U.T. - Device Under Test<br>Ripple ≤ 5% ISD<br>* VGS = 5V for Logic Level Devices<br>Fig 23. Peak Diode Recovery dv/dt Test Circuit for N-Channel<br>HEXFET [®] Power MOSFETs<br>V(BR)DSS(BR)DSS<br>15V tp<br>VDS L DRIVER<br>RG D.U.T +<br>- [V][DD]<br>IAS A<br>2V0VGS<br>tp 0.01 Ω IASAS<br>Fig 24a. Unclamped Inductive Test Circuit Fig 24b. Unclamped Inductive Waveforms<br>RDD<br>VDSDS VDSDS<br>90%<br>VGSGS<br>D.U.T.<br>RGG<br>+<br>- [[V][DD]][[DD]]<br>V10VGS10VGSGS 10%<br>Pulse Width ≤ 1 μs VGSGS<br>Duty Factor ≤ 0.1 %<br>td(on)d(on) trr td(off)d(off)<br>Fig 25a. Switching Time Test Circuit Fig 25b. Switching Time Waveforms<br>Current Regulator Id<br>Same Type as D.U.T. Vds<br>50K Ω Vgs<br>12V .2 μ F<br>.3 μ F<br>+<br>D.U.T. -VDSVDSDS<br>Vgs(th)<br>VGSGS<br>3mA<br>IGG IDD<br>Current Resistors Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>
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V(BR)DSS(BR)DSS<br>tp<br>IASAS<br>Fig 24b. Unclamped Inductive Waveforms<br>VDSDS<br>90%<br>10%<br>VGSGS<br>td(on)d(on) trr td(off)d(off) tf<br>**----- End of picture text -----**<br>
**Fig 24a.** Unclamped Inductive Test Circuit
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RDD<br>VDSDS<br>VGSGS<br>D.U.T.<br>RGG<br>+<br>- [[V][DD]][[DD]]<br>V10VGS10VGSGS<br>Pulse Width ≤ 1 μs<br>Duty Factor ≤ 0.1 %<br> Switching Time Test Circuit<br>Current Regulator<br>Same Type as D.U.T.<br>50K Ω<br>12V .2 μ F<br>.3 μ F<br>+<br>D.U.T. -VDSVDSDS<br>VGSGS<br>3mA<br>IGG IDD<br>Current Sampling Resistors<br>**----- End of picture text -----**<br>
**Fig 26a.** Gate Charge Test Circuit
**Fig 26b.** Gate Charge Waveform
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## TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
## TO-220AB Part Marking Information
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Part Number AUIRFB8405<br>Date Code<br>Y= Year<br>IR Logo YWWA WW= Work Week<br>A= Automotive, Lead Free<br>XX or XX<br>Lot Code<br>**----- End of picture text -----**<br>
TO-220AB packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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## **†**
## **Qualification Information**
|**Qualification Information**<br>**†**|**Qualification Information**<br>**†**|||
|---|---|---|---|
|**Qualification Level**||Automotive<br>(per AEC-Q101)||
|||Comments:<br>This<br>part<br>number(s)<br>passed<br>Automotive<br>qualification.<br>IR’s<br>Industrial and Consumer qualification level is granted by extension of the higher<br>Automotive level.||
|||TO-220|N/A|
|**ESD**|Machine Model|Class M3 (+/- 400V)††<br>AEC-Q101-002||
||Human Body Model|Class H1C (+/- 2000V)††<br>AEC-Q101-001||
||Charged Device Model|Class C5 (+/- 2000V)††<br>AEC-Q101-005||
|**RoHS Compliant**||Yes||
† Qualification standards can be found at International Rectifier’s web site: http//www.irf.com/
†† Highest passing voltage.
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## **IMPORTANT NOTICE**
Unless specifically designated for the automotive market, International Rectifier Corporation and its subsidiaries (IR) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or services without notice. Part numbers designated with the “AU” prefix follow automotive industry and / or customer specific requirements with regards to product discontinuance and process change notification. All products are sold subject to IR’s terms and conditions of sale supplied at the time of order acknowledgment.
IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with IR’s standard warranty. Testing and other quality control techniques are used to the extent IR deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed.
IR assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using IR components. To minimize the risks with customer products and applications, customers should provide adequate design and operating safeguards.
Reproduction of IR information in IR data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alterations is an unfair and deceptive business practice. IR is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions.
Resale of IR products or serviced with statements different from or beyond the parameters stated by IR for that product or service voids all express and any implied warranties for the associated IR product or service and is an unfair and deceptive business practice. IR is not responsible or liable for any such statements.
IR products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of the IR product could create a situation where personal injury or death may occur. Should Buyer purchase or use IR products for any such unintended or unauthorized application, Buyer shall indemnify and hold International Rectifier and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that IR was negligent regarding the design or manufacture of the product.
Only products certified as military grade by the Defense Logistics Agency (DLA) of the US Department of Defense, are designed and manufactured to meet DLA military specifications required by certain military, aerospace or other applications. Buyers acknowledge and agree that any use of IR products not certified by DLA as military-grade, in applications requiring military grade products, is solely at the Buyer’s own risk and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
IR products are neither designed nor intended for use in automotive applications or environments unless the specific IR products are designated by IR as compliant with ISO/TS 16949 requirements and bear a part number including the designation “AU”. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, IR will not be responsible for any failure to meet such requirements.
For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
## **WORLD HEADQUARTERS:**
101 N. Sepulveda Blvd., El Segundo, California 90245
Tel: (310) 252-7105
www.irf.com © 2013 International Rectifier April 30, 2013
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Updated at March 10, 2026
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