ACST210-8B

**ACST2** 

Datasheet 

## 2 A - 800 V overvoltage protected AC switch 

## **Features** 

**==> picture [140 x 182] intentionally omitted <==**

**----- Start of picture text -----**<br>
OUT<br>COM G<br>SN OUT<br>G COM<br>DPAK TO-220FPAB<br>OUT<br>G<br>COM<br>**----- End of picture text -----**<br>


- Triac with overvoltage crowbar technology 

- High noise immunity: static dV/dt > 500 V/μs 

- TO-220FPAB insulated package: 

   - complies with UL standards (File ref : E81734) 

   - insulation voltage: 2000 VRMS 

- Benefits: 

   - Enables equipment to meet IEC 61000-4-5 

   - High off-state reliability with planar technology 

   - Needs no external overvoltage protection 

   - Reduces the power passive component count 

   - Interfaces directly with the micro-controller 

      - High immunity against fast transients described in IEC 61000-4-4 standards 

   - 

## **Applications** 

- AC mains static switching in appliance and industrial control systems 

- Driving low power highly inductive loads like solenoid, pump, fan, and micromotor 

## **Description** 

|**Product status link**<br>~~LEE~~|
|---|
|ACST2|
||
|**Product summary**<br>~~EEE~~|
|**IT(RMS)**<br>2 A|
|**VDRM/VRRM**<br>800 V|
|**IGT**<br>10 mA|



The ACST2 series belongs to the ACS / ACST power switch family. This high performance device is suited to home appliances or industrial systems and drives loads up to 2 A. 

This ACST2 switch embeds a Triac structure with a high voltage clamping device to absorb the inductive turn-off energy and withstand line transients such as those described in the IEC 61000-4-5 standards. The component needs a low gate current to be activated (IGT < 10 mA) and still shows a high electrical noise immunity complying with IEC standards such as IEC 61000-4-4 (fast transient burst test). 

**DS5161** - **Rev 6** - **December 2019** For further information contact your local STMicroelectronics sales office. 

www.st.com 

**ACST2 Characteristics** 

**1** 

## **Characteristics** 

**Table 1. Absolute ratings (limiting values)** 

|**Symbol**|**Parameter**|||**Value**|**Unit**|
|---|---|---|---|---|---|
|IT(RMS)|On-state rms current (full sine wave)|TO-220FPAB|Tc= 105 °C|2|A|
|||DPAK|Tc= 110 °C|||
|ITSM|Non repetitive surge peak on-state current<br>Tjinitial = 25 °C, (full cycle sine wave)|f = 50 Hz|tp= 20 ms|8.0|A|
|||f = 60 Hz|tp= 16.7 ms|8.4||
|I2t|I2t for fuse selection||tp= 10 ms|0.5|A2s|
|dI/dt|Critical rate of rise on-state current IG= 2 x IGT, tr ≤ 100 ns|f = 120 Hz|Tj= 125 °C|50|A/μs|
|VPP(1)|Non repetitive line peak pulse voltage(1)||Tj= 25 °C|2|kV|
|PG(AV)|Average gate power dissipation||Tj= 125 °C|0.1|W|
|PGM|Peak gate power dissipation (tp= 20 μs)||Tj= 125 °C|10|W|
|IGM|Peak gate current (tp= 20 μs)||Tj= 125 °C|1.6|A|
|Tstg|Storage temperature range|||-40 to +150|°C|
|Tj|Operating junction temperature range|||-40 to +125|°C|
|TL|Lead temperature for soldering during 10 s (at 3 mm from plastic case)|||260|°C|
|Vins|Insulation rms voltage (60 seconds)|||2000|V|



_1. according to test described by standard IEC 61000-4-5, see Figure 16 for conditions_ 

**Table 2. Electrical characteristics (Tj = 25 °C, unless otherwise specified)** 

|**Symbol**|**Test conditions**|**Quadrant**||**Value**|**Unit**|
|---|---|---|---|---|---|
|IGT (1)|VOUT= 12 V, RL= 33 Ω|I - II - III|Max.|10|mA|
|VGT|||Max.|1.1|V|
|VGD|VOUT= VDRM, RL= 3.3 kΩ, Tj= 125 °C|I - II - III|Min.|0.2|V|
|IH(2)|IOUT= 100 mA||Max.|10|mA|
|IL|IG= 1.2 x IGT|I - III|Max.|25|mA|
|||II|Max.|35||
|dV/dt(2)|VOUT= 67% VDRM, gate open, Tj= 125 °C||Min.|500|V/μs|
|(dI/dt)c(2)|(dV/dt)c = 15 V/μs, Tj= 125 °C||Min.|0.5|A/ms|
|VCL|ICL= 0.1 mA, tp= 1 ms||Min.|850|V|



_1. Minimum IGT is guaranteed at 5% of IGT max_ 

_2. For both polarities of OUT pin referenced to COM pin_ 

**DS5161** - **Rev 6** 

**page 2/15** 

**ACST2 Characteristics** 

## **Table 3. Static characteristics** 

|**Symbol**|**Test conditions**|**Test conditions**|**Test conditions**|**Value**|**Unit**|
|---|---|---|---|---|---|
|VTM (1)|IOUT= 2.8 A, tp= 500 μs|Tj= 25 °C|Max.|2|V|
|VT0(1)|Threshold voltage|Tj= 125 °C|Max.|0.9|V|
|RD(1)|Dynamic resistance|Tj= 125 °C|Max.|250|mΩ|
|IDRM<br>IRRM|VOUT= VDRM/ VRRM|Tj= 25 °C|Max.|10|µA|
|||Tj= 125 °C||0.5|mA|



_1. For both polarities of OUT pin referenced to COM pin_ 

## **Table 4. Thermal characteristics** 

|**Symbol**|**Parameter**||**Value**|**Unit**|
|---|---|---|---|---|
|Rth(j-c)|Junction to case for full cycle sine wave conduction|DPAK|4.5|°C/W|
|||TO-220FPAB|7||
|Rth(j-a)|Junction to ambient|TO-220FPAB|60||
||Junction to ambient, SCU(1)= 0.5 cm²|DPAK|70||



_1. SCU = copper surface under tab_ 

**DS5161** - **Rev 6** 

**page 3/15** 

**ACST2 Characteristics (curves)** 

## **1.1 Characteristics (curves)** 

**==> picture [513 x 191] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 1. Maximum power dissipation versus on-state<br>Figure 2. On-state RMS current versus case temperature<br>RMS current (full cycle)<br>P(W) IT(RMS)(A)<br>2.4<br>2.8<br>2.2<br>α=180 ° DPAK<br>2.4 2.0<br>1.8<br>2.0 1.6 TO-220FPAB<br>1.4<br>1.6 1.2<br>1.0<br>1.2<br>0.8<br>0.6<br>0.8<br>180° 0.4 α=180 °<br>0.4 0.2 TC(°C)<br>IT(RMS)(A) 0.0<br>0.0 0 25 50 75 100 125<br>0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0<br>**----- End of picture text -----**<br>


**==> picture [513 x 191] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 3. On-state RMS current versus ambient Figure 4. Relative variation of thermal impedance junction<br>temperature to case versus pulse duration (TO-220FPAB)<br>IT(RMS)(A) K=[Zth/Rth]<br>1.8 1.00<br>1.6 Printed circuit board FR4α=180 ° Zth(j-c)<br>Natural convection<br>1.4 SCU=0.5 cm²<br>1.2<br>1.0 Zth(j-a)<br>0.10<br>0.8<br>0.6<br>0.4<br>0.2<br>0.0 Tamb(°C) 0.01 t P(s) TO-220FPAB<br>0 25 50 75 100 125 1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 1.0E+03<br>**----- End of picture text -----**<br>


**==> picture [513 x 202] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 6. Relative variation of gate trigger, holding and<br>Figure 5. Relative variation of thermal impedance junction<br>latching current versus junction temperature (typical<br>to case versus pulse duration (DPAK)<br>value)<br>K=[Zth/Rth]<br>1.0E+00 IGT, I H, I L [T J] / IGT, I H, I L [T j=25 °C]<br>2.8<br>2.6<br>Zth(j-c) 2.4 IGT<br>2.2<br>2.0<br>1.8<br>1.0E-01 Zth(j-a) 1.6 IL & IH<br>1.4<br>1.2<br>1.0<br>0.8<br>0.6<br>DPAK 0.4<br>1.0E-021.0E-04 1.0E-03 1.0E-02 1.0E-01t P(s)1.0E+00 1.0E+01 1.0E+02 1.0E+03 0.20.0 Tj(°C)<br>-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130<br>**----- End of picture text -----**<br>


**DS5161** - **Rev 6** 

**page 4/15** 

**ACST2 Characteristics (curves)** 

**Figure 7. Relative variation of static dV/dt versus junction temperature** 

**Figure 8. Relative variation of critical rate of decrease of main current versus reapplied dV/dt (typical values)** 

**==> picture [222 x 139] intentionally omitted <==**

**----- Start of picture text -----**<br>
dV/dt [ T j] / dV/dt [ T j=125 °C]<br>100<br>VOUT=540 V<br>10<br>Above test equipment capability<br>Tj(°C)<br>1<br>25 50 75 100 125<br>**----- End of picture text -----**<br>


**==> picture [222 x 138] intentionally omitted <==**

**----- Start of picture text -----**<br>
(dI/dt)c [ ( dV/dt) c ] / Specified (dI/dt)c<br>2.0<br>1.8<br>1.6<br>1.4<br>1.2<br>1.0<br>0.8<br>0.6<br>0.4<br>0.2<br>(dV/dt) c(V/µs)<br>0.0<br>0.1 1.0 10.0 100.0<br>**----- End of picture text -----**<br>


**==> picture [513 x 192] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 9. Relative variation of critical rate of decrease of Figure 10. Surge peak on-state current versus number of<br>main current versus junction temperature cycles<br>(dI/dt)c [T j] / (dI/dt)c [T j=125 °C] I TSM(A)<br>20 9<br>18 8<br>16 7 t=20ms<br>14 6 Non repetitive One cycle<br>12 Tj initial=25 °C<br>5<br>10<br>4<br>8<br>6 3 TRepetitiveC=110 °C<br>4 2<br>2 Tj(°C) 1 DPAK<br>0 0 Number of cycles<br>25 50 75 100 125<br>1 1 0 100 1000<br>**----- End of picture text -----**<br>


**Figure 11. Non repetitive surge peak on-state current for a sinusoidal pulse with width tp < 10 ms and corresponding Figure 12. On-state characteristics (maximum values) value** 

**==> picture [480 x 149] intentionally omitted <==**

**----- Start of picture text -----**<br>
ITM(A)<br>1.E+01<br>ITSM(A), I²t ( A²s)<br>100.0<br>Tj initial=25 °C<br>ITSM 1.E+00 Tj=125 °C Tj=25 °C<br>10.0<br>1.E-01<br>1.0<br>TJ max. :<br>VTO= 0.90 V<br>VTM(V) RD= 250 mΩ<br>sinusoidal pulse 1.E-02<br>0.1 with width t P< 10 ms tP(ms) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0<br>0.01 0.10 1.00 10.00<br>**----- End of picture text -----**<br>


**DS5161** - **Rev 6** 

**page 5/15** 

**ACST2 Characteristics (curves)** 

**==> picture [513 x 193] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 13. Thermal resistance junction to ambient versus Figure 14. Relative variation of clamping voltage VCL<br>copper surface under tab (typical values) versus junction temperature<br>100 Rth(j-a) (°C/W) 1.20 VCL [T j] / VCL [T j=25 °C]<br>DPAK<br>90 Epoxy printed circuit board, copper thickness: 35 µm 1.15<br>80<br>70 1.10<br>60 1.05<br>50<br>40 1.00<br>30 0.95<br>20<br>10 0.90<br>0 S Cu (cm²) 0.85 Tj(°C)<br>0 5 10 15 20 25 30 35 40<br>-40 -20 0 20 40 60 80 100 120 140<br>**----- End of picture text -----**<br>


**DS5161** - **Rev 6** 

**page 6/15** 

**ACST2 Application information** 

## **2 Application information** 

## **2.1 Typical application descriptions** 

The ACST2 device has been designed to switch on and off highly inductive or resistive loads such as pump, valve, fan, or bulb lamp. Thanks to its high sensitivity (IGT max = 10 mA), the ACST2 can be driven directly by logic level circuits through a resistor as shown on the typical application diagram. Thanks to its thermal and turnoff commutation performances, the ACST2 switch can drive, without any additional snubber, an inductive load up to 2 A. 

**Figure 15. AC induction motor control – typical diagram** 

**==> picture [228 x 229] intentionally omitted <==**

**----- Start of picture text -----**<br>
Line<br>L<br>AC LOAD<br>AC Mains R<br>ACST2<br>Rg<br>MCU<br>Power supply<br>**----- End of picture text -----**<br>


**DS5161** - **Rev 6** 

**page 7/15** 

**ACST2** 

**AC line transient voltage ruggedness** 

## **2.2 AC line transient voltage ruggedness** 

In comparison with standard Triacs, which are not robust against surge voltage, the ACST2 is self-protected against over-voltage, specified by the new parameter VCL. In addition, the ACST2 is a sensitive device (IGT = 10 mA), but provides a high noise immunity level against fast transients. The ACST2 switch can safely withstand AC line transient voltages either by clamping the low energy spikes, such as inductive spikes at switch off, or by switching to the on state (for less than 10 ms) to dissipate higher energy shocks through the load. This safety feature works even with high turn-on current ramp up. 

The test circuit of Figure 16 represents the ACST2 application, and is used to stress the ACST switch according to the IEC 61000-4-5 standard conditions. With the additional effect of the load which is limiting the current, the ACST switch withstands the voltage spikes up to 2 kV on top of the peak line voltage. The protection is based on an overvoltage crowbar technology. The ACST2 folds back safely to the on state as shown in Figure 17. The ACST2 recovers its blocking voltage capability after the surge and the next zero current crossing. Such a non repetitive test can be done at least 10 times on each AC line voltage polarity. 

## **Figure 16. Overvoltage ruggedness test circuit for resistive and inductive loads for IEC 61000-4-5 standards** 

**==> picture [347 x 183] intentionally omitted <==**

**----- Start of picture text -----**<br>
R = 20 Ω, L = 10 µH, VPP = 2 kV<br>Surge generator<br>2kV surge<br>Rgene<br>Model of the load<br>Filtering unit<br>R L<br>ACST210-8x<br>AC Mains<br>Rg<br>**----- End of picture text -----**<br>


**Figure 17. Typical voltage and current waveforms across the ACST4 during IEC 61000-4-5 standard test** 

**==> picture [164 x 133] intentionally omitted <==**

**----- Start of picture text -----**<br>
Vpeak= VCL<br>1.2/50 µs voltage surge<br>V<br>0<br>Ipeak = 90 A 8/20 µs current surge<br>I<br>0<br>dI/dt = 130 A/µs<br>**----- End of picture text -----**<br>


**DS5161** - **Rev 6** 

**page 8/15** 

**ACST2 Package information** 

**3 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 

## **3.1 TO-220FPAB package information** 

- Epoxy meets UL94, V0 

- Recommended torque: 0.4 to 0.6 N·m 

**Figure 18. TO-220FPAB package outline** 

**DS5161** - **Rev 6** 

**page 9/15** 

**ACST2** 

**TO-220FPAB package information** 

**Table 5. TO-220FPAB package mechanical data** 

||**Dimensions**|**Dimensions**|**Dimensions**|**Dimensions**|
|---|---|---|---|---|
|**Ref.**|**Millimeters**||**Inches**||
||**Min.**|**Max.**|**Min.**|**Max.**|
|A|4.40|4.60|0.1739|0.1818|
|B|2.5|2.7|0.0988|0.1067|
|D|2.50|2.75|0.0988|0.1087|
|E|0.45|0.70|0.0178|0.0277|
|F|0.75|1.0|0.0296|0.0395|
|F1|1.15|1.70|0.0455|0.0672|
|F2|1.15|1.70|0.0455|0.0672|
|G|4.95|5.20|0.1957|0.2055|
|G1|2.40|2.70|0.0949|0.1067|
|H|10.00|10.40|0.3953|0.4111|
|L2|16.00 typ.||0.6324 typ.||
|L3|28.60|30.60|1.1304|1.2095|
|L4|9.80|10.6|0.3874|0.4190|
|L5|2.90|3.60|0.1146|0.1423|
|L6|15.90|16.40|0.6285|0.6482|
|L7|9.00|9.30|0.3557|0.3676|
|Dia|3.0|3.20|0.1186|0.1265|



**DS5161** - **Rev 6** 

**page 10/15** 

**ACST2 DPAK package information** 

## **3.2 DPAK package information** 

- Molding compouned resin is halogen free and meets UL94 flammability standard, level V0 

- Lead-free package leads plating 

## **Figure 19. DPAK package outline** 

**==> picture [385 x 426] intentionally omitted <==**

**----- Start of picture text -----**<br>
E<br>b4 c2<br>E1<br>A1<br>e b c<br>e1<br>L<br>V2<br>A<br>2<br>L<br>D1<br>D<br>H<br>4<br>L<br>A2<br>**----- End of picture text -----**<br>


**DS5161** - **Rev 6** 

**page 11/15** 

**ACST2 DPAK package information** 

## **Table 6. DPAK package mechanical data** 

||**Dimensions**|**Dimensions**|**Dimensions**|**Dimensions**|**Dimensions**|**Dimensions**|
|---|---|---|---|---|---|---|
|**Ref.**|**Millimeters**|||**Inches(1)**|||
||**Min.**|**Typ.**|**Max.**|**Min.**|**Typ.**|**Max.**|
|A|2.18||2.40|0.0858||0.0945|
|A1|0.90||1.10|0.0354||0.0433|
|A2|0.03||0.23|0.0012||0.0091|
|b|0.64||0.90|0.0252||0.354|
|b4|4.95||5.46|0.1949||0.2150|
|c|0.46||0.61|0.0181||0.0240|
|c2|0.46||0.60|0.0181||0.0236|
|D|5.97||6.22|0.2350||0.2449|
|D1|4.95||5.60|0.1949||0.2205|
|E|6.35||6.73|0.2500||0.2650|
|E1|4.32||5.50|0.1701||0.2165|
|e||2.286|||0.0900||
|e1|4.40||4.70|0.1732||0.1850|
|H|9.35||10.40|0.3681||0.4094|
|L|1.00||1.78|0.0394||0.0701|
|L2|||1.27|||0.0500|
|L4|0.60||1.02|0.0236||0.0402|
|V2(2)|-8°||+8°|-8°||+8°|



_1. Dimensions in inches are given for reference only_ 

_2. Degree_ 

_Note: This package drawing may slightly differ from the physical package. However, all the specified dimensions are guaranteed._ 

**Figure 20. DPAK recommended footprint (dimensions are in mm)** 

**==> picture [291 x 173] intentionally omitted <==**

**----- Start of picture text -----**<br>
12.7<br>6.7 3.0 3.0<br>A<br>4.572<br>6.7<br>B<br>1.6<br>The device must be positioned within 0.05 AB<br>**----- End of picture text -----**<br>


**DS5161** - **Rev 6** 

**page 12/15** 

**ACST2 Ordering information** 

**4** 

## **Ordering information** 

## **Figure 21. Ordering information scheme** 

**==> picture [354 x 240] intentionally omitted <==**

**----- Start of picture text -----**<br>
ACS T   2  10  -  8     B TR<br>AC switch<br>Topology<br>T = Triac<br>On-state RMS current<br>2 = 2 A<br>Triggering gate current<br>10 = 10 mA<br>Repetitive peak off-state voltage<br>8 = 800V<br>Package<br>B = DPAK<br>FP = TO-220FPAB<br>Delivery mode<br>TR = Tape and reel<br>Blank = Tube<br>**----- End of picture text -----**<br>


**Table 7. Ordering information** 

|**Order code**|**Marking**|**Package**|**Weight**|**Base qty.**|**Packing mode**|
|---|---|---|---|---|---|
|ACST210-8B|ACST2108|DPAK|0.3 g|50|Tube|
|ACST210-8BTR||DPAK||2500|Tape and reel|
|ACST210-8FP||TO-220FPAB|2.4 g|50|Tube|



**DS5161** - **Rev 6** 

**page 13/15** 

**ACST2** 

## **Revision history** 

**Table 8. Document revision history** 

|**Date**|**Version**|**Changes**|
|---|---|---|
|01-Mar-2007|1|Initial release.|
|13-Apr-2010|2|Updated ECOPACK statement. Reformatted for consistency with other<br>datasheets in this product class.|
|01-Jul-2010|3|Updated Figure 22.|
|24-May-2014|4|Updated DPAK package information and reformatted to current standard.|
|14-Jun-2017|5|Updated features in cover page and Table 2.<br>Updated Figure 8, Figure 9, Figure 10, Figure 14 and Section 3.<br>Minor text changes.|
|19-Dec-2019|6|Update DPAK package information.|



**DS5161** - **Rev 6** 

**page 14/15** 

**ACST2** 

## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2019 STMicroelectronics – All rights reserved 

**DS5161** - **Rev 6** 

**page 15/15**