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453-00039C
BLE MODULE, V5.1, 2MBPS
⚠️ Reference pricing provided. In case of supply shortages, we will connect you with our trusted procurement partners to ensure your project's continuity.
- Manufacturer: EZURIO
- Product type: Bluetooth Modules & Adaptors
- SVHC: To Be Advised
- Interfaces: I2C, I2S, SPI, UART, USB
- Product Range: BL653 Series
- Certifications: CE, FCC, IC, KC, MIC, RCM
- Bluetooth Class: -
- Bluetooth Version: Bluetooth LE 5.1
- Supply Voltage Range: 1.7 V to 3.6 V
- Receiver Sensitivity Rx: -92 dBm
- Operating Temperature Range: -40 °C to 105 °C
| Delivery and price | |
|---|---|
| Units per pack | 250 |
| Price | 7.13 € |
| Current stock | 200+ |
| Lead time | 30 days |
Datasheet
_Version 0.1_
~~ee~~ **Version Date Notes Contributor(s) Approver** 0.1 24 Mar 2020 Preliminary version Raj Khatri Jonathan Kaye
https://www.lairdconnect.com/wirelessmodules/bluetooth-modules
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2
© Copyright 2020 Laird Connectivity. All Rights Reserved
**==> picture [512 x 620] intentionally omitted <==**
**----- Start of picture text -----**<br>
|||||
|---|---|---|---|
|1|Overview and Key Features ................................................................................................................................................... 5|
|1.1|Features and Benefits ...................................................................................................................................................... 5|
|1.2|Application Areas ............................................................................................................................................................. 5|
|2|Specification ........................................................................................................................................................................... 6|
|2.1|Specification Summary ..................................................................................................................................................... 6|
|3|Hardware Specifications ...................................................................................................................................................... 10|
|3.1|Block Diagram and Pin-out ............................................................................................................................................. 10|
|3.2|Pin Definitions ................................................................................................................................................................ 11|
|3.3|Electrical Specifications .................................................................................................................................................. 17|
|3.3.1|Absolute Maximum Ratings .................................................................................................................................. 17|
|3.3.2|Recommended Operating Parameters ................................................................................................................. 18|
|3.4|Programmability ............................................................................................................................................................. 20|
|3.4.1|BL653 Special Function Pins in|smart|BASIC ........................................................................................................ 20|
|4|Power Consumption ............................................................................................................................................................. 21|
|4.1|Power Consumption ....................................................................................................................................................... 21|
|4.2|Peripheral Block Current Consumption .......................................................................................................................... 23|
|5|Functional Description ......................................................................................................................................................... 24|
|5.1|Power Management ....................................................................................................................................................... 24|
|5.2|BL653 Power Supply Options ......................................................................................................................................... 24|
|5.3|Clocks and Timers .......................................................................................................................................................... 26|
|5.3.1|Clocks ................................................................................................................................................................... 26|
|5.3.2|Timers ................................................................................................................................................................... 26|
|5.4|Radio Frequency (RF) .................................................................................................................................................... 26|
|5.5|NFC ................................................................................................................................................................................ 27|
|5.5.1|Use Cases ............................................................................................................................................................ 27|
|5.5.2|NFC Antenna Coil Tuning Capacitors ................................................................................................................... 27|
|5.6|UART Interface ............................................................................................................................................................... 28|
|5.7|USB interface ................................................................................................................................................................. 29|
|5.8|SPI Bus .......................................................................................................................................................................... 29|
|5.9|I2C Interface ................................................................................................................................................................... 30|
|5.10|General Purpose I/O, ADC, PWM and FREQ ................................................................................................................ 30|
|5.10.1|GPIO ..................................................................................................................................................................... 30|
|5.10.2|ADC ...................................................................................................................................................................... 30|
|5.10.3|PWM Signal Output on up to 16 SIO Pins ............................................................................................................ 31|
|5.10.4|FREQ Signal Output on up to 16 SIO Pins ........................................................................................................... 31|
|5.11|nRESET pin .................................................................................................................................................................... 31|
|5.12|Two-wire Interface JTAG ................................................................................................................................................ 31|
|5.13|BL653 Wakeup ............................................................................................................................................................... 32|
|5.13.1|Waking Up BL653 from Host ................................................................................................................................ 32|
|5.14|Low Power Modes .......................................................................................................................................................... 32|
|5.15|Temperature Sensor ...................................................................................................................................................... 33|
|5.16|Security/Privacy .............................................................................................................................................................. 33|
|5.16.1|Random Number Generator ................................................................................................................................. 33|
|5.16.2|AES Encryption/Decryption ................................................................................................................................... 33|
|5.16.3|Readback Protection ............................................................................................................................................. 33|
|5.16.4|Elliptic Curve Cryptography .................................................................................................................................. 33|
|5.17|Optional External 32.768 kHz crystal ............................................................................................................................. 33|
|5.18|453-00039 On-board PCB Antenna Characteristics ....................................................................................................... 35|
|6|Hardware Integration Suggestions ....................................................................................................................................... 36|
|6.1|Circuit ............................................................................................................................................................................. 36|
|6.2|PCB Layout on Host PCB - General ............................................................................................................................... 38|
|6.3|PCB Layout on Host PCB for the 453-00039 ................................................................................................................. 38|
|6.3.1|Antenna Keep-out on Host PCB ........................................................................................................................... 38|
|6.3.2|Antenna Keep-out and Proximity to Metal or Plastic ............................................................................................. 40|
|6.4|50-Ohms RF trace and RF match series 2nH RF inductor on host PCB for BL653 RF pad variant (453-00041)........... 40|
|6.5|External Antenna Integration with 453-00041................................................................................................................. 43|
|7|Mechanical Details ............................................................................................................................................................... 44|
|7.1|BL653 Mechanical Details .............................................................................................................................................. 44|
|7.2|Host PCB Land Pattern and Antenna Keep-out for the 453-00039 ................................................................................ 45|
|8|Application Note for Surface Mount Modules ....................................................................................................................... 46|
**----- End of picture text -----**<br>
https://www.lairdconnect.com/wirelessmodules/bluetooth-modules
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© Copyright 2020 Laird Connectivity. All Rights Reserved
||8.1<br>Introduction ..................................................................................................................................................................... 46|
|---|---|
||8.2<br>Shipping ......................................................................................................................................................................... 46|
||8.2.1<br>Tape and Reel Package Information..................................................................................................................... 46|
||8.2.2<br>Carton Contents .................................................................................................................................................... 47|
||8.2.3<br>Packaging Process ............................................................................................................................................... 48|
||8.2.4<br>Labeling ................................................................................................................................................................ 48|
||8.3<br>Reflow Parameters ......................................................................................................................................................... 49|
|9|FCC and IC Regulatory Statements ..................................................................................................................................... 51|
||9.1<br>Antenna Information ....................................................................................................................................................... 51|
||9.2<br>Power Exposure Information .......................................................................................................................................... 51|
||9.3<br>OEM Responsibilities ..................................................................................................................................................... 52|
||9.4<br>Federal Communication Commission Interference Statement ....................................................................................... 52|
||9.5<br>Industry Canada Statement ............................................................................................................................................ 54|
|10|Japan (MIC) Regulatory ....................................................................................................................................................... 56|
||10.1 Antenna Information ....................................................................................................................................................... 56|
|11|CE Regulatory ...................................................................................................................................................................... 56|
||11.1 Antenna Information ....................................................................................................................................................... 56|
||11.2 EU Declarations of Conformity ....................................................................................................................................... 57|
|12|Ordering Information ............................................................................................................................................................ 58|
|13|Bluetooth SIG Qualification .................................................................................................................................................. 58|
||13.1 Overview ........................................................................................................................................................................ 58|
||13.2 Qualification Steps When Referencing a Laird End Product Design .............................................................................. 58|
||13.3 Qualification Steps When Deviating from a Laird End Product Design .......................................................................... 59|
|14|Additional Assistance ........................................................................................................................................................... 60|
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© Copyright 2020 Laird Connectivity. All Rights Reserved
## 1 OVERVIEW AND KEY FEATURES
Every BL653 Series module is designed to simplify OEMs enablement of Bluetooth Low Energy (BLE) v5.1 and Thread (802.15.4) to small, portable, power-conscious devices. The BL653 provides engineers with considerable design flexibility in both hardware and software programming capabilities. Based on the world-leading Nordic Semiconductor nRF52833 chipset, the BL653 modules provide ultra-low power consumption with outstanding wireless range via +8 dBm of transmit power and the Long Range (CODED PHY) Bluetooth 5 feature. The BL653 is programmable via Laird Connectivity’s _smart_ BASIC language, AT command set, Zephyr RTOS or Nordic’s software development kit (SDK).
_smart_ BASIC is an event-driven programming language that is highly optimized for memory-constrained systems such as embedded modules. It was designed to make BLE development quicker and simpler, vastly cutting down time to market.
The Nordic SDK, on the other hand, offers developers source code (in C) and precompiled libraries containing BLE and ANT+ device profiles, wireless communication, as well as application examples.
**Note:** BL653 hardware provides all functionality of the nRF52833 chipset used in the module design. This is a hardware datasheet only – it does not cover the software aspects of the BL653.
For customers using _smart_ BASIC, refer to the _smart_ BASIC extensions guide (available from the BL653 product page of the Laird Connectivity website. For customers using the Nordic SDK, refer to www.nordicsemi.com.
- Bluetooth v5.1 – Single mode
- NFC
- 802.15.4 (Thread) radio support
- External or internal antennas
- Multiple programming options
- _smart_ BASIC
- AT command set
- Nordic SDK in C
- Zephyr RTOS
- Compact footprint
- Programmable Tx power +8 dBm to -20 dBm, -40 dBm
- Rx sensitivity -96 dBm (1 Mbps), - 103 dBm (125 kbps)
- Standby Doze – 2.6 uA typical
- Deep Sleep – 0.6 uA – (See Note 4 in the _Power Consumption_ section)
- UART, GPIO, ADC, PWM, FREQ output, timers, I2C, SPI, I2S, PDM, and USB interfaces
- Fast time-to-market
- FCC, CE, IC, RCM, Japan, and KC certified
- Full Bluetooth Declaration ID
- Other regulatory certifications on request
- No external components required
- Extended Industrial temperature range
- (-40° C to +105° C)
- Ultra-low power consumption
- Tx – 4.9 mA peak (at 0 dBm, DCDC on)
- (See Note 1 in the _Power Consumption_ section)
- Rx: 4.6 mA peak (DCDC on)
- (See Note 1 in the _Power Consumption_ section)
- Medical devices
- IoT Sensors
- Appcessories
- Fitness sensors
- Location awareness
- Home automation
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© Copyright 2020 Laird Connectivity. All Rights Reserved
|**Categories/Feature**|**Implementation**||
|---|---|---|
|**Wireless Specification**|||
||▪BT 5.1 – Single mode||
||▪Angle-of-arrival (AoA) and angle-of-departure (AoD) – BT 5.1||
||▪4x Range (CODED PHY support) – BT 5.0||
||▪2x Speed (2M PHY support) – BT 5.0||
||▪LE Advertising Extensions – BT 5.0||
|Bluetooth®|▪Concurrent master, slave<br>▪BLE Mesh capabilities||
||▪Diffie-Hellman based pairing (LE Secure Connections) – BT 4.2||
||▪Data Packet Length Extension – BT 4.2||
||▪Link Layer Privacy (LE Privacy 1.2) – BT 4.2||
||▪LE Dual Mode Topology – BT 4.1||
||▪ LE Ping– BT 4.1||
|Frequency|2.402 - 2.480 GHz||
||1 Mbps BLE (over-the-air)||
|Raw Data Rates|2 Mbps BLE (over-the-air)||
||125 kbps BLE (over-the-air)||
||500 kbps BLE (over-the-air)||
|Maximum Transmit Power Setting|+8 dBm<br>Conducted 453-00039 (Integrated antenna)<br>+8 dBm<br>Conducted 453-00041 (Trace pin–connecting to External antenna)||
|Minimum Transmit Power Setting|-40 dBm, -20 dBm (in 4 dB steps)<br>-16 dBm, -12 dBm, - 8 dBm, - 4 dBm, 0 dBm, 2 dBm, 4 dBm, 5 dBm, 6 dBm, 7 dBm,|-16 dBm, -12 dBm, - 8 dBm, - 4 dBm, 0 dBm, 2 dBm, 4 dBm, 5 dBm, 6 dBm, 7 dBm,|
||BLE 1 Mbps (BER=1E-3)<br>-96 dBm typical||
|Receive Sensitivity|BLE 2 Mbps<br>-92 dBm typical||
|(≤ 37-byte packet)|BLE 125 kbps<br>-103 dBm typical||
||BLE 500 kbps<br>-99 dBm typical||
|Link Budget (conducted)|104 dB<br>@ BLE 1 Mbps<br>111 dB<br>@ BLE 125 kbps||
https://www.lairdconnect.com/wirelessmodules/bluetooth-modules
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© Copyright 2020 Laird Connectivity. All Rights Reserved
|**Categories/Feature**|**Implementation**|
|---|---|
|**NFC**||
||**Based on NFC forum specification**|
||▪13.56 MHz|
||▪Date rate 106 kbps|
|NFC-A Listen mode compliant|▪NFC Type 2 and Type 4 emulation<br>**Modes of Operation:**<br>▪Disable<br>▪Sense<br>▪Activated<br>**Use Cases:**<br>▪Touch-to-Pair with NFC<br>▪ NFC enabled Out-of-Band Pairing|
|System Wake-On-Field function|Proximity Detection|
|**Host Interfaces and Peripherals**||
|Total|42 x multifunction I/O lines|
|UART|2 UARTs<br>Tx, Rx, CTS, RTS<br>DCD, RI, DTR, DSR (SeeNote 1in the Module Specification Notes)<br>Default 115200, n, 8, 1<br>From 1,200 bps to 1 Mbps|
|USB|USB 2.0 FS (Full Speed, 12 Mbps).<br>CDC driver/Virtual UART (baud rate TBD)<br>Other USB drivers available via Nordic SDK|
|GPIO|Up to 42, with configurable:<br>▪I/O direction<br>▪O/P drive strength (standard 0.5 mA or high 3mA/5 mA)<br>▪Pull-up /pull-down<br>▪Input buffer disconnect|
|ADC|Eight 8/10/12-bit channels<br>0.6 V internal reference<br>Configurable 4, 2, 1, 1/2, 1/3, 1/4, 1/5 1/6 (default) pre-scaling<br>Configurable acquisition time 3uS, 5uS, 10uS (default), 15uS, 20uS, 40uS.<br>One-shot mode|
||PWM outputs on 16 GPIO output pins|
|PWM Output|▪PWM output duty cycle: 0%-100%|
||▪PWM output frequency: Up to 500 kHz|
|FREQ Output|FREQ outputs on 16 GPIO output pins<br>▪FREQ output frequency: 0 MHz-4 MHz (50% dutycycle)|
|I2C|Two I2C interface (up to 400 kbps) – SeeNote 2in the Module Specification Notes|
|SPI|Four SPI Master Slave interface (up to 4 Mbps)|
||▪One temperature sensor|
|Temperature Sensor|▪Temperature range equal to the operating temperature range|
||▪Resolution 0.25 degrees|
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© Copyright 2020 Laird Connectivity. All Rights Reserved
|**Categories/Feature**|**Implementation**|**Implementation**||
|---|---|---|---|
||▪One RF received signal strength indicator|||
|RSSI Detector|▪±2 dB accuracy (valid over -90 to -20 dBm)|||
||▪One dB resolution|||
|I2S|One inter-IC sound interface|||
|PDM|One pulse density modulation interface|||
|**Optional (External to the BL653 module)**||||
|External 32.768 kHz crystal|For customer use, connect +/-20 ppm accuracy crystal for more accurate protocol<br>timing.||For customer use, connect +/-20 ppm accuracy crystal for more accurate protocol|
|**Profiles**||||
||▪Central mode|||
|Supported Services|▪Peripheral mode<br>▪Mesh (with custom models)|||
||▪Custom and adoptedprofiles|||
|**Programmability**||||
|_smart_BASIC|▪FW upgrade via JTAG or UART|||
||▪Application download via UART or Via Over-the-Air (if SIO_02 pin is pulled high|||
|||externally)||
|Nordic SDK|Via JTAG|||
|**Operating Modes**||||
|_smart_BASIC|**Self-contained Run mode**|||
||Selected by nAutoRun pin status: LOW (0V).|||
||Then runs $autorun$ (_smart_BASIC application script) if it exists.|||
||**Interactive/Development mode**|||
||HIGH (VDD).|||
||Then runs via at+run (and_file name_of_smart_BASIC application script).|||
|AT Command set|Comprehensive Hayes-style AT command set|||
|Nordic SDK|As per Nordic SDK|||
|Zephyr RTOS|As perwww.zephyrproject.org|||
|**Supply Voltage**||||
|Supply (VDD or VDD_HV) options|▪Normal voltage mode VDD 1.7- 3.6 V – Internal DCDC converter or LDO||Normal voltage mode VDD 1.7- 3.6 V – Internal DCDC converter or LDO|
|||(SeeNote 3 in the Module Specification Notes)<br>OR||
||▪High voltage mode VDD_HV 2.5V-5.5V Internal LDO|||
|||(SeeNote 3 andNote 4 in the Module Specification Notes)||
|**Power Consumption**||||
|Active Modes Peak Current<br>(for maximum Tx power +8 dBm)<br>– Radio only|14.2 mA peak Tx (with DCDC)|||
|Active Modes Peak Current (for<br>Tx power -40 dBm) – Radio only|2.3 mA peak Tx (with DCDC)|||
|Active Modes Average Current|Depends on many factors, see_Power Consumption_|||
|Ultra-low Power Modes|Standby Doze<br>2.6 uA typical<br>Deep Sleep<br>0.6 uA|||
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© Copyright 2020 Laird Connectivity. All Rights Reserved
|**Categories/Feature**|**Implementation**|
|---|---|
|**Antenna Options**||
|Internal|Printed PCB monopole antenna – on-board|
||**453-00039 variant**|
|External|▪Dipole antenna (with IPEX connector)|
||▪Dipole PCB antenna (with IPEX connector)<br>▪Connection via RF connector (IPEX MH4) –**453-00041 variant (RF trace pin)**<br>See the Antenna Information sections forFCC and IC,MIC, RCM, KC andCE.|
|**Physical**||
|Dimensions|15.0 mm x 10 mm x 2.2 mm<br>Pad Pitch – 0.8 mm<br>Pad Type – Two rows of pads|
|Weight|<1 gram|
|**Environmental**||
|Operating|-40 ˚C to +105 ˚C|
|Storage|-40 ˚C to +85 ˚C|
|**Miscellaneous**||
|Lead Free|Lead-free and RoHS-compliant|
|Warranty|One-year warranty|
|**Development Tools**||
|Development Kit|Development kit per module SKU (453-00039-K1 and 453-00041-K1) and free<br>software tools|
|**Approvals**||
|Bluetooth®|Full Bluetooth SIG Declaration ID|
|FCC/IC/CE/MIC/RCM/KC|All BL653 Series|
|**Module Specification Notes:**||
|**Note 1**<br>DSR,DTR,RI,and DCD can be im|and DCD can be implemented in the_smart_BASIC application or through the Nordic SDK.|
|**Note 2**<br>With I2C interface selected, pull-up resistors on I2C SDA and I2C SCL**_must_**be connected externally as per I2C<br>standard.||
|**Note 3**<br>Use of the internal DCDC(REG1)convertor or LDO(REG1)is decided bythe underlyingBLE stack.||
|**Note 4**<br>In High Voltage mode (VDD_HV), no external current draw (from VDD pin) is allowed (limitation of nRF52833<br>chipset).||
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© Copyright 2020 Laird Connectivity. All Rights Reserved
## 3 HARDWARE SPECIFICATIONS
_**Figure 1: BL653 block diagram**_
_**Figure 2: Functional HW and SW block diagram for BL653 series BLE module**_
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10 © Copyright 2020 Laird Connectivity. All Rights Reserved
_**Figure 3: BL653 module pin-out (top view). Outer row pads (long red line) and inner row pads (short red line) shown.**_
_**Table 1: Pin definitions**_
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||||||||||
|---|---|---|---|---|---|---|---|---|
|Pin|Pin Name|Default|Alternate|In/|Pull-|nRF52833|nRF52833|Comment|
|#|Function|Function|Out|Up/|QFN Pin|QFN Name|
|Down|
|0|GND|-|-|-|-|-|-|-|
|1|SWDIO|SWDIO|-|In|Pull-up|AC24|SWDIO|-|
|2|SIO_36|SIO_36|-|In|Pull-up|U24|P1.04|-|
|Pull-|
|3|SWDCLK|SWDCLK|-|In|AA24|SWDCLK|-|
|down|
|4|SIO_34|SIO_34|-|-|Pull-up|W24|P1.02|-|
|Laird Connectivity|
|Devkit:|
|SIO_35/|Pull-|
|5|nAutoRUN|SIO_35|In|Y23|P1.01|FTDI USB_DTR via|
|nAutoRUN|down|
|jumper on J12|
|pin 1-2|
|6|NC|-|-|-|-|-|-|-|
|P1.00/|
|7|SIO_32|SIO_32|-|In|Pull-up|AD22|-|
|TRACEDATA0|
**----- End of picture text -----**<br>
11
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© Copyright 2020 Laird Connectivity. All Rights Reserved
**==> picture [500 x 541] intentionally omitted <==**
**----- Start of picture text -----**<br>
||||||||||
|---|---|---|---|---|---|---|---|---|
|Pin|Pin Name|Default|Alternate|In/|Pull-|nRF52833|nRF52833|Comment|
|#|Function|Function|Out|Up/|QFN Pin|QFN Name|
|Down|
|Laird Devkit:|
|8|SIO_25|SIO_25|-|In|Pull-up|AD18|P0.22|
|BUTTON1|
|9|NC|-|-|-|-|-|-|-|
|Laird Connectivity|
|10|SIO_24|SIO_24|In|Pull-up|AD20|P0.24|
|Devkit:|BUTTON3|
|11|NC|-|-|-|-|-|-|-|
|12|SIO_21|SIO_21|-|In|Pull-up|AC17|P0.21|-|
|13|SIO_20|SIO_20|-|In|Pull-up|AD16|P0.20|-|
|14|NC|-|-|-|-|-|-|-|
|15|D+|D+|-|In|AD6|D+|-|
|16|SIO_17|SIO_17|-|In|Pull-up|AD12|P0.17|-|
|17|D-|D-|-|In|AD4|D-|-|
|Laird Connectivity|
|18|SIO_15|SIO_15|-|In|Pull-up|AD10|P0.15|
|Devkit:|LED3|
|P0.18/|System Reset|
|19|nRESET|nRESET|SIO_18|In|Pull-up|AC13|
|nRESET|(Active Low)|
|Laird Connectivity|
|20|SIO_13|SIO_13|-|In|Pull-up|AD8|P0.13|
|Devkit:|LED1|
|Laird Connectivity|
|21|SIO_16|SIO_16|-|In|Pull-up|AC11|P0.16|
|Devkit:|LED4|
|Laird Connectivity|
|22|SIO_14|SIO_14|-|In|Pull-up|AC9|P0.14|
|Devkit:|LED2|
|23|GND|-|-|-|-|-|-|-|
|24|VBUS|-|-|-|-|AD2|VBUS|4.35V – 5.5V|
|25|VDD_HV|-|-|-|-|Y2|VDDH|2.5V to 5.5V|
|26|GND|-|-|-|-|-|-|-|
|P0.11/|Laird Connectivity|
|27|SIO_11|SIO_11|-|In|Pull-up|T2|
|TRACEDATA2|Devkit:|BUTTON1|
|P0.12/|
|28|SIO_12|SIO_12|-|In|Pull-up|U1|-|
|TRACEDATA1|
|UARTCLOSE()|
|selects DIO|
|SIO_08/|functionality|
|29|SIO_08|UART_RX|In|Pull-up|N1|P0.08|
|UART_RX|UARTOPEN() selects|
|UART COMMS|
|behavior|
**----- End of picture text -----**<br>
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© Copyright 2020 Laird Connectivity. All Rights Reserved
**==> picture [499 x 619] intentionally omitted <==**
**----- Start of picture text -----**<br>
||||||||||
|---|---|---|---|---|---|---|---|---|
|Pin|Pin Name|Default|Alternate|In/|Pull-|nRF52833|nRF52833|Comment|
|#|Function|Function|Out|Up/|QFN Pin|QFN Name|
|Down|
|Laird Connectivity|
|Devkit:|
|SPI EEPROM.|
|SPI_Eeprom_CLK,|
|Output:|
|30|SIO_41/|SIO_41|SPI_CLK|In|Pull-up|R1|P1.09/|SPIOPEN() in|
|SPI_CLK|TRACEDATA3|smart|BASIC selects|
|SPI function, MOSI|
|and CLK are outputs|
|when in SPI master|
|mode.|
|31|VDD|-|-|-|-|AD14|VDD|1.7V to 3.6V|
|Laird Connectivity|
|Devkit:|
|SPI EEPROM.|
|SPI_Eeprom_MOSI,|
|Output|
|SIO_40/|
|32|SIO_40|SPI_MOSI|In|Pull-up|P2|P1.08|SPIOPEN() in|
|SPI_MOSI|
|smart|BASIC selects|
|SPI function, MOSI|
|and CLK are outputs|
|in SPI master.|
|33|GND|-|-|-|-|-|-|-|
|Laird Connectivity|
|Devkit:|SPI|
|EEPROM.|
|SPI_Eeprom_MISO,|
|Input|
|SIO_04/|
|34|AIN2/|SIO_04|AIN2/|In|Pull-up|J1|P0.04/AIN2|SPIOPEN() in|
|SPI_MISO|smart|BASIC selects|
|SPI_MISO|
|SPI function; MOSI|
|and CLK are outputs|
|when in SPI master|
|mode|
|UARTCLOSE()|
|selects DIO|
|Set|
|SIO_06/|functionality|
|35|SIO_06|UART_TX|Out|High in|L1|P0.06|
|UART_TX|UARTOPEN()|
|FW|
|selects UART|
|COMMS behaviour|
|Laird Connectivity|
|SIO_26/|Devkit:|
|36|SIO_26|I2C_SDA|In|Pull-up|G1|P0.26|
|I2C_SDA|I2C RTC chip|
|I2C data line|
|UARTCLOSE()|
|selects DIO|
|SIO_07/|Pull-|P0.07/|functionality|
|37|SIO_07|UART_CTS|IN|M2|
|UART_CTS|down|TRACECLK|UARTOPEN()|
|selects UART|
|COMMS behaviour|
**----- End of picture text -----**<br>
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**==> picture [499 x 584] intentionally omitted <==**
**----- Start of picture text -----**<br>
||||||||||
|---|---|---|---|---|---|---|---|---|
|Pin|Pin Name|Default|Alternate|In/|Pull-|nRF52833|nRF52833|Comment|
|#|Function|Function|Out|Up/|QFN Pin|QFN Name|
|Down|
|Laird Connectivity|
|SIO_27/|Devkit:|
|38|SIO_27|I2C_SCL|In|Pull-up|H2|P0.27|
|I2C_SCL|I2C RTC chip|
|I2C clock line|
|UARTCLOSE()|
|selects DIO|
|SIO_05/|Set|
|UART_RTS/|functionality|
|39|UART_RTS/|SIO_05|Out|Low in|K2|P0.05/AIN3|
|AIN3|UARTOPEN()|
|AIN3|FW|
|selects UART|
|COMMS behavior|
|40|GND|-|-|-|-|-|-|-|
|Laird Connectivity|
|Devkit:|Optional|
|SIO_01/|32.768kHz crystal|
|41|SIO_01|XL2|In|Pull-up|F2|P0.01/XL2|
|XL2|pad XL2 and|
|associated load|
|capacitor|
|Laird Connectivity|
|Devkit:|Optional|
|SIO_00/|32.768kHz crystal|
|42|SIO_00|XL1|In|Pull-up|D2|P0.00/XL1|
|XL1|pad XL1 and|
|associated load|
|capacitor|
|43|GND|-|-|-|-|-|-|-|
|SIO_31/|
|44|SIO_31|AIN7|In|Pull-up|A8|P0.31/AIN7|-|
|AIN7|
|SIO_30/|
|45|SIO_30|AIN6|In|Pull-up|B9|P0.30/AIN6|-|
|AIN6|
|SIO_28/|
|46|SIO_28|AIN4|In|Pull-up|B11|P0.28/AIN4|-|
|AIN4|
|47|GND|-|-|-|-|-|-|-|
|SIO_29/|
|48|SIO_29|AIN5|In|Pull-up|A10|P0.29/AIN5|-|
|AIN5|
|Laird Connectivity|
|SIO_03/|
|49|SIO_03|AIN1|In|Pull-up|B13|P0.03/AIN1|Devkit:|Temp Sens|
|AIN1|
|Analog|
|Pull High externally|
|SIO_02/|Pull-|
|50|SIO_02|AIN0|IN|A12|P0.02/AIN0|to enter VSP (Virtual|
|AIN0|down|
|Serial Port) Service.|
|51|SIO_46|SIO_46|-|In|Pull-up|B15|P1.03|-|
|52|GND|-|-|-|-|-|-|-|
|53|SIO_47|SIO_47|-|In|Pull-up|A14|P0.19|-|
**----- End of picture text -----**<br>
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|**Pin**|**Pin**<br>**Pin Name**|**Default**|**Alternate**|**In/**|**Pull-**|**nRF52833**|**nRF52833**|**Comment**|
|---|---|---|---|---|---|---|---|---|
|**#**||**Function**|**Function**<br>**Function**|**Out**|**Up/**|**QFN Pin**|**QFN Name**||
||||||**Down**|**Down**|||
|||||||||**Laird Connectivity**|
|||||||||**Devkit:**|
|54|SIO_44|SIO_44|-|In|Pull-up|Pull-up<br>B17|P0.23|SPI EEPROM|
|||||||||SPI_Eeprom_CS,<br>Input|
|55|GND|-|-|-|-|-|-|-|
|56|SIO_45|SIO_45|-|In|Pull-up|Pull-up<br>A16|P1.05|-|
|57|NFC2/<br>SIO_10|NFC2|SIO_10|In|-|J24|P0.10/NFC2|-|
|58|GND|-|-|-|-|-|-|-|
|59|NFC1/<br>SIO_09|NFC1|SIO_09|In|-|L24|P0.09/NFC1|-|
|60|NC|-|-|-|-|-|-|-|
|61|NC|-|-|-|-|-|-|-|
|62|SIO_42|SIO_42|-|In|Pull-up|Pull-up<br>A20|P0.25|-|
|63|SIO_38|N/C|-|In|Pull-up|Pull-up<br>R24|P1.06|Reserved for future<br>use. Do not connect.|
|64|SIO_39|SIO_39|-|In|Pull-up|Pull-up<br>P23|P1.07|-|
|65|GND|-|-|-|-|-|-|-|
|66|GND|-|-|-|-|-|-|-|
|67|GND|-|-|-|-|-|-|-|
|68|GND|-|-|-|-|-|-|-|
|69|GND|-|-|-|-|-|-|-|
|70|GND|-|-|-|-|-|-|-|
|71|GND|-|-|-|-|-|-|-|
|||||||||Used on BL653 RF|
|72|RF pad|-|-|-|-|-|-|pad variant (453-|
|||||||||00041). Note11|
## **Pin Definition Notes:**
**Note 1** SIO = Signal Input or Output. Secondary function is selectable in _smart_ BASIC application or via Nordic SDK. I/O voltage level tracks VDD. AIN = Analog Input.
**Note 2**[At reset, all SIO lines are configured as the defaults shown above. ]
SIO lines can be configured through the _smart_ BASIC application script to be either inputs or outputs with pull-ups or pull-downs. When an alternative SIO function is selected (such as I2C or SPI), the firmware does not allow the setup of internal pull-up/pull-down. Therefore, when I2C interface is selected, pull-up resistors on I2C SDA and I2C SCL _**must**_ be connected externally as per I2C standard. **Note 3** JTAG (two-wire SWD interface), pin 1 (SWDIO) and pin 3 (SWDCLK).
JTAG is required because Nordic SDK applications can only be loaded using JTAG ( _smart_ BASIC firmware can be loaded using the JTAG as well as UART). We recommend that you use JTAG (2-wire interface) to handle future BL653 module _smart_ BASIC firmware upgrades. You MUST wire out the JTAG (2-wire interface) on your host design (see Figure 7, where four lines (SWDIO, SWDCLK, GND and VDD) should be wired out. _smart_ BASIC
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## **Pin Definition Notes:**
||firmware upgrades can still be performed over the BL653 UART interface, but this is slower (60 seconds using<br>UART vs. 10 seconds when using JTAG) than using the BL653 JTAG (2-wire interface).<br>Upgrading_smart_BASIC firmware or loading the_smart_BASIC applications is done using the UART interface.|
|---|---|
|**Note 4**|Pull the nRESET pin (pin 19) low for minimum 100 milliseconds to reset the BL653.|
|**Note 5**|The SIO_02pin (pin 50) must be pulled high externally to enable VSP (Virtual Serial Port) which would allow OTA<br>(over-the-air)_smart_BASIC application download. Refer to the latest firmware release documentation for details.|
|**Note 6**|Ensure that SIO_02 (pin 50) and AutoRUN (pin 5) are**_not both high_**(externally), in that state, the UART is<br>bridged to Virtual Serial Port service; the BL653 module does not respond to AT commands and cannot load<br>_smart_BASIC application scripts.|
|**Note 7**|Pin 5 (nAutoRUN) is an input, with active low logic. In the development kit it is connected so that the state is<br>driven by the host’s DTR output line. The nAutoRUN pin must be externally held high or low to select between the<br>following two BL653 operating modes:<br>▪Self-contained Run mode (nAutoRUN pin held at 0V –this is the default (internal pull-down enabled))<br>▪Interactive/Development mode (nAutoRUN pin held at VDD)<br>The_smart_BASIC firmware checks for the status of nAutoRUN during power-up or reset. If it is low and if there is a<br>_smart_BASIC application script named**$autorun$**, then the_smart_BASIC firmware executes the application script<br>automatically; hence the name S_elf-contained Run Mode_.|
|**Note 8**|The_smartBASIC_firmware has SIO pins as Digital (Default Function) INPUT pins, which are set PULL-UP by<br>default. This avoids floating inputs (which can cause current consumption to drive with time in low power modes<br>(such as Standby Doze). You can disable the PULL-UP through your_smart_BASIC application.<br>All of the SIO pins (with a default function of DIO) are inputs (apart from SIO_05 and SIO_06, which are outputs):<br>▪<br>SIO_06 (alternative function UART_TX) is an output, set High (in the firmware).<br>▪<br>SIO_05 (alternative function UART_RTS) is an output, set Low (in the firmware).<br>▪<br>SIO_08 (alternative function UART_RX) is an input, set with internal pull-up (in the firmware).<br>▪<br>SIO_07 (alternative function UART_CTS) is an input, set with internal pull-down (in the firmware).<br>▪<br>SIO_02 is an input set with internal pull-down (in the firmware). It is used for OTA downloading of<br>_smart_BASIC applications. Refer to the latest firmware extension documentation for details.<br>▪<br>UART_RX, UART_TX, and UART_CTS are 3.3 V level logic (if VDD is 3.3 V; such as SIO pin I/O levels<br>track VDD). For example, when Rx and Tx are idle, they sit at 3.3 V (if VDD is 3.3 V). Conversely,<br>handshaking pins CTS and RTS at 0V are treated as assertions.|
|**Note 9**|BL653 also allows as an option to connect an external higher accuracy (±20 ppm) 32.768 kHz crystal to the<br>BL653 pins SIO_01/XL2 (pin 41) and SIO_00/XL1 (pin 42). This provides higher accuracy protocol timing and<br>helps with radio power consumption in the system standby doze/deep sleep modes by reducing the time that the<br>Rx window must be open.|
|**Note 10**|Not required for BL653 module normal operation. The on-chip 32.768kHz LFRC oscillator provides the standard<br>accuracy of ±500 ppm, with calibration required every 8seconds (default) to stay within ±500 ppm.<br>BL653 power supply options:<br>▪<br>**Option 1**– Normal voltage power supply mode entered when the external supply voltage is connected to<br>both the VDD and VDD_HV pins (so that VDD equals VDD_HV). Connect external supply within range 1.7V<br>to 3.6V range to BL653 VDD and VDD_HV pins.<br>OR<br>▪<br>**Option 2**– High voltage mode power supply mode (using BL653 VDD_HV pin) entered when the external<br>supply voltage in ONLY connected to the VDDH pin and the VDD pin is not connected to any external<br>voltage supply. Connect external supply within range 2.5V to 5.5V range to BL653 VDD_HV pin. BL653<br>VDD pin left unconnected.<br>No external current draw (from VDD pin) is allowed when using High Voltage mode (VDD_HV) (limitation of<br>nRF52833 chipset).|
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## **Pin Definition Notes:**
For either option, if you use USB interface then the BL653 VBUS pin must be connected to external supply within the range 4.35V to 5.5V. When using the BL653 VBUS pin, you MUST externally fit a 4.7uF to ground.
**Note 11** RF_pad (pin72) is for the BL653 RF pad variant (453-00041) module only. If using the BL653 module RF pad variant (453-00041), customer MUST copy the 50-Ohms GCPW RF track design, MUST add series 2nH RF inductor (Murata LQG15HN2N0B02# or Murata LQG15HS2N0B02) and RF connector IPEX MHF4 Receptacle (MPN: 20449-001E) Detailed in the following section: _**50-Ohms RF Trace and RF Match Series 2nH RF Inductor on Host PCB for BL653 RF Pad Variant (453-00041)**_ .
## 3.35 Electrical Specifications
Absolute maximum ratings for supply voltage and voltages on digital and analogue pins of the module are listed in the following table; exceeding these values causes permanent damage.
## _**Table 2: Maximum current ratings**_
**==> picture [494 x 350] intentionally omitted <==**
**----- Start of picture text -----**<br>
||||||||
|---|---|---|---|---|---|---|
|Parameter|Min|Max|Unit|
|Voltage at VDD pin|-0.3|+3.9 (Note 1)|V|
|Voltage at VDD_HV pin|-0.3|+5.8|V|
|VBUS|-0.3|+5.8|V|
|Voltage at GND pin|0|V|
|Voltage at SIO pin (at VDD≤3.6V)|-0.3|VDD +0.3|V|
|Voltage at SIO pin (at VDD≥3.6V)|-0.3|3.9|V|
|NFC antenna pin current (NFC1/2)|-|80|mA|
|Radio RF input level|-|10|dBm|
|Environmental|
|Storage temperature|-40|+85|ºC|
|MSL (Moisture Sensitivity Level)|-|4|-|
|ESD (as per EN301-489)|
|Conductive|4|KV|
|Air Coupling|8|KV|
|Flash Memory (Endurance) (Note 2)|-|10000|Write/erase cycles|
|°|
|Flash Memory (Retention) at 85|C|10|-|years|
|Flash Memory (Retention) at 105|°|C|3|years|
|(Limited to 1000 write /read cycles)|
|Flash Memory (Retention) at 105|°|C to 85|°|C, execution split|6.7|years|
|(Limited to 1000 write /read cycles, 75% execution time at 85|°|C|
|or less)|
|Thermal characteristics (Junction temperature)|110|ºC|
**----- End of picture text -----**<br>
## **Maximum Ratings Notes:**
**Note 1** The absolute maximum rating for VDD_nRF pin (max) is 3.9V for the BL653. **Note 2** Wear levelling is used in file system.
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## 3.5.2 Recommended Operating Parameters
_**Table 3: Power supply operating parameters**_
|**_Table 3: Power supply operating parameters_**|||||
|---|---|---|---|---|
|**Parameter**|**Min**|**Typ**|**Max**|**Unit**|
|VDD (independent of DCDC enable)**1**,4supply range|1.7|3.3|3.6|V|
|VDDPORsupply voltage needed during power on reset|1.75|||V|
|VDD_HV supply range4|2.5|3.7|5.5|V|
|VBUS USB supply range|4.35|5|5.5|V|
|VDD Maximum ripple or noise**2**|-|-|10|mV|
|VDD supply rise time (0V to 1.7V)**3**|-|-|60|mS|
|VDD_HV supply rise time (0V to 3.7V)**3**|||100|mS|
|Operatingtemperature range|-40|-|+85|ºC|
|Extended operatingtemperature range**5**|+85||+105|ºC|
## **Recommended Operating Parameters Notes:**
- **Note 1** 4.7 uF internal to module on VDD. The VDD internal DCDC (REG1) convertor or LDO (REG1) is decided by the underlying BLE stack depending on the load current. Through a smartBASIC command can also tell softdevice to use DCDC always or LDO always.
- **Note 2** This is the maximum VDD or VDD_HV ripple or noise (at any frequency) that does not disturb the radio.
- **Note 3** The on-board power-on reset circuitry may not function properly for rise times longer than the specified maximum.
- **Note 4** BL653 power supply options:
- **Option 1** – Normal voltage power supply mode entered when the external supply voltage is connected to both the VDD and VDD_HV pins (so that VDD equals VDD_HV). Connect external supply within range 1.7V to 3.6V range to BL653 VDD and VDD_HV pins.
- OR
- **Option 2** – High voltage mode power supply mode (using BL653 VDD_HV pin) entered when the external supply voltage in ONLY connected to the VDD_HV pin and the VDD pin is not connected to any external voltage supply. Connect external supply within range 2.5V to 5.5V range to BL653 VDD_HV pin. BL653 VDD pin left unconnected.
- No external current draw (from VDD pin) is allowed when using High Voltage mode (VDD_HV), limitation of the nRF52833 chip.
For either option, if you use USB interface then the BL653 VBUS pin must be connected to external supply within the range 4.35V to 5.5V. When using the BL653 VBUS pin, you MUST externally fit a 4.7uF to ground.
- **Note 5** To avoid surpassing the maximum die temperature (110 ºC), it is important to minimize current consumption when operating in the extended operating temperature conditions (+85 ºC to +105ºC). It is therefore recommended to use the module device on Normal Voltage mode with DCDC (REG1) enabled.
_**Table 4: Signal levels for interface, SIO**_
|**_Table 4: Signal levels for interface, SIO_**|||||
|---|---|---|---|---|
|**Parameter**|**Min**|**Typ**|**Max**|**Unit**|
|VIHInput high voltage|0.7 VDD||VDD|V|
|VILInput low voltage|VSS||0.3 x VDD|V|
|VOHOutput high voltage|||||
|(std. drive, 0.5mA) (Note 1)|VDD -0.4||VDD|V|
|(high-drive, 3mA) (Note 1)|VDD -0.4||VDD|V|
|(high-drive, 5mA) (Note 2)|VDD -0.4||VDD||
|VOLOutput low voltage|||||
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**==> picture [492 x 238] intentionally omitted <==**
**----- Start of picture text -----**<br>
|||||||
|---|---|---|---|---|---|
|Parameter|Min|Typ|Max|Unit|
|(std. drive, 0.5mA) (Note 1)|VSS|VSS+0.4|V|
|(high-drive, 3mA) (Note 1)|VSS|VSS+0.4|V|
|(high-drive, 5mA) (Note 2)|VSS|VSS+0.4|
|VOL Current at VSS+0.4V, Output set low|
|(std. drive, 0.5mA) (Note 1)|1|2|4|mA|
|(high-drive, 3mA) (Note 1)|3|-|-|mA|
|(high-drive, 5mA) (Note 2)|6|10|15|mA|
|VOL Current at VDD -0.4, Output set low|
|(std. drive, 0.5mA) (Note 1)|1|2|4|mA|
|(high-drive, 3mA) (Note 1)|3|-|-|mA|
|(high-drive, 5mA) (Note 2)|6|9|14|mA|
|Pull up resistance|11|13|16|k|Ω|
|Pull down resistance|11|13|16|k|Ω|
|Pad capacitance|3|pF|
|Pad capacitance at NFC pads|4|pF|
**----- End of picture text -----**<br>
## **Signal Levels Notes:**
- **Note 1** For VDD≥1.7V. The firmware supports high drive (3 mA, as well as standard drive). **Note 2** For VDD≥2.7V. The firmware supports high drive (5 mA (since VDD≥2.7V), as well as standard drive). The GPIO (SIO) high reference voltage always equals the level on the **VDD** pin.
- Normal voltage mode – The GPIO high level equals the voltage supplied to the VDD pin
- High voltage mode – The GPIO high level equals the level specified (is configurable to 1.8V, 2.1V, 2.4V, 2.7V, 3.0V, and 3.3V. The default voltage is 1.8V). In High voltage mode, the VDD pin becomes an output voltage pin. The VDD output voltage and hence the GPIO is configurable from 1.8V to 3.3V with possible settings of 1.8V, 2.1V, 2.4V, 2.7V, 3.0V, and 3.3V.
## _**Table 5: SIO pin alternative function AIN (ADC) specification**_
**==> picture [490 x 242] intentionally omitted <==**
**----- Start of picture text -----**<br>
||||||
|---|---|---|---|---|
|Parameter|Min|Typ|Max|Unit|
|Maximum sample rate|200|kHz|
|ADC Internal reference voltage|-1.5%|0.6 V|+1.5%|%|
|4, 2, 1, 1/2,|
|ADC pin input|
|1/3, 1/4, 1/5|scaling|
|internal selectable scaling|
|1/6|
|ADC input pin (AIN) voltage maximum without|
|damaging ADC w.r.t|(see Note 1)|
|VCC|Prescaling|
|0V-VDD|4, 2, 1, ½, 1/3, ¼, 1/5, 1/6|VDD+0.3|V|
|Configurable|
|8-bit mode|10-bit mode|12-bit mode|bits|
|Resolution|
|Configurable (see Note 2)|
|Acquisition Time, source resistance ≤10kΩ Acquisition|3|uS|
|Time, source resistance ≤40kΩ|5|uS|
|Acquisition Time, source resistance ≤100kΩ|10|uS|
|Acquisition Time, source resistance ≤200kΩ|
**----- End of picture text -----**<br>
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**==> picture [489 x 129] intentionally omitted <==**
**----- Start of picture text -----**<br>
||||||
|---|---|---|---|---|
|Parameter|Min|Typ|Max|Unit|
|Maximum sample rate|200|kHz|
|Acquisition Time, source resistance ≤400kΩ|15|uS|
|Acquisition Time, source resistance ≤800kΩ|20|uS|
|40|uS|
|Conversion Time|(see Note 3)|<2|uS|
|ADC input impedance (during operation) (see Note 3)|
|Input Resistance|>1|MOhm|
|Sample and hold capacitance at maximum gain|2.5|pF|
**----- End of picture text -----**<br>
## **Recommended Operating Parameters Notes:**
**==> picture [484 x 34] intentionally omitted <==**
**----- Start of picture text -----**<br>
|||
|---|---|
|Note 1|Stay within internal 0.6 V reference voltage with given pre-scaling on AIN pin and do not violate ADC maximum|
|input voltage (for damage) for a given VCC, e.g. If VDD is 3.6V, you can only expose AIN pin to VDD+0.3 V.|
|Default pre-scaling is 1/6 which configurable via smartBASIC.|
**----- End of picture text -----**<br>
**Note 2** Firmware allows configurable resolution (8-bit, 10-bit or 12-bit mode) and acquisition time. BL653 ADC is a Successive Approximation type ADC (SSADC), as a result no external capacitor is needed for ADC operation. Configure the acquisition time according to the source resistance that customer has.
The sampling frequency is limited by the sum of sampling time and acquisition time. The maximum sampling time is 2us. For acquisition time of 3us the total conversion time is therefore 5us, which makes maximum sampling frequency of 1/5us = 200kHz. Similarly, if acquisition time of 40us chosen, then the conversion time is 42us and the maximum sampling frequency is 1/42us = 23.8kHz.
**Note 3** ADC input impedance is estimated mean impedance of the ADC (AIN) pins.
## 3.4 Programmability
The BL653 module comes loaded with _smart_ BASIC firmware but does not come loaded with any _smart_ BASIC application script (as that is dependent on customer-end application or use). Laird Connectivity provides many sample _smart_ BASIC application scripts via a sample application folder on GitHub – https://github.com/LairdCP/BL653-Applications
Therefore, it boots into AT command mode by default.
## 3.4.2 BL653 Special Function Pins in smartBASIC
Refer to the _smart_ BASIC extension manual for details of functionality connected to this:
- nAutoRUN pin (SIO_35), see Table 6 for default
- VSP pin (SIO_02), see Table 7 for default
- SIO_38 – Reserved for future use. Do not connect. See Table 8
## _**Table 6: nAutoRUN pin**_
**==> picture [461 x 90] intentionally omitted <==**
**----- Start of picture text -----**<br>
|||||
|---|---|---|---|
|Signal Name|Pin #|I/O|Comments|
|nAutoRUN /(SIO_35)|5|I|Input with active low logic. Internal pull down (default).|
|Operating mode selected by nAutoRun pin status:|
|▪ Self-contained Run mode (nAutoRUN pin held at 0V)|
|▪ If Low (0V), runs $autorun$ if it exists|
|▪ Interactive/Development mode (nAutoRUN pin held at VCC)|
|▪ If High (VCC), runs via AT+rRUN (and file name of application)|
**----- End of picture text -----**<br>
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In the development board nAutoRUN pin is connected so that the state is driven by the host’s DTR output line.
## _**Table 7: VSP mode**_
|**Signal Name**|**Pin #**|**I/O**|**Comments**|
|---|---|---|---|
||||Internal pull down (default).|
|SIO_02|50|I|VSP mode selected by externally pulling-up SIO_02 pin:|
||||**High (VCC),**then OTA_smart_ BASIC application download is possible.|
|**_Table 8: SIO_38_**||||
|**Signal Name**|**Pin #**|**I/O**|**Comments**|
|SIO_38|63|I|Internal pull up (default).<br>Reserved for future use. Do not connect if using_smart_BASIC FW.|
Data at VDD of 3.3 V with internal (to chipset) LDO(REG1) ON or with internal (to chipset) DCDC(REG1) ON (see Power Consumption Note 1) and 25 º C.
|4.1<br>Power Consumption||||
|---|---|---|---|
|**_Table 9: Power consumption_**||||
|**Parameter**|**Min**<br>**Typ**|**Max**|**Unit**|
|**Active mode ‘peak’ current**(Note 1)<br>**(Advertising or Connection)**<br>Tx only run peak current @ Txpwr = +8 dBm|With DCDC [with LDO]<br>14.2 [30.4]||mA|
|Tx only run peak current @ Txpwr = +4 dBm|9.6 [20.7]||mA|
|Tx only run peak current @ Txpwr = 0 dBm|4.9 [10.3]||mA|
|Tx only run peak current @ Txpwr = -4 dBm|3.8 [8.0]||mA|
|Tx only run peak current @ Txpwr = -8 dBm|3.4 [7.1]||mA|
|Tx only run peak current @ Txpwr = -12 dBm|3.1 [6.4]||mA|
|Tx only run peak current @ Txpwr = -16 dBm|2.9 [5.9]||mA|
|Tx only run peak current @ Txpwr = -20 dBm|2.7 [5.5]||mA|
|Tx only run peak current @ Txpwr = -40 dBm|2.3 [4.5]||mA|
|Active Mode<br>Rx only ‘peak’ current, BLE 1Mbps (Note 1)|4.6 [9.6]||mA|
|Rx only ‘peak’ current, BLE 2Mbps (Note 2)|5.2 [10.7]||mA|
|**Ultra-Low Power Mode 1**(Note 2)<br>Standby Doze, 256k RAM retention|2.6||uA|
|**Ultra-Low Power Mode 2**(Note 3)<br>Deep Sleep (no RAM retention)|0.6||uA|
|**Active Mode Average current**(Note 4)||||
|**Advertising Average** **Current draw**||||
|**Max**, with advertising interval (min) 20 mS|Note 4||uA|
|**Min**, with advertising interval (max) 10240 mS|Note 4||uA|
|**Connection** **Average** **Current draw**||||
|**Max,**with connection interval (min) 7.5 mS|Note 4||uA|
|**Min**, with connection interval (max) 4000 mS|Note4||uA|
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## **Power Consumption Notes:**
|**Note 1**|This is for Peak Radio Current only, but there is additional current due to the MCU. The internal DCDC convertor<br>(REG1) or LDO (REG1) is decided by the underlying BLE stack.|
|---|---|
|**Note 2**|BL653 modules Standby Doze is 2.6 uA typical. When using smartBASIC firmware, Standby Doze is entered<br>automatically (when a waitevent statement is encountered within a smartBASIC application script). In Standby<br>Doze, all peripherals that are enabled stay on and may re-awaken the chip. Depending on active peripherals,<br>current consumption ranges from 2.6 μA to 370 uA (when UART is ON). See individual peripherals current<br>consumption data in the Peripheral Block Current Consumption section. smartBASIC firmware has functionality to<br>detect GPIO change with no current consumption cost, it is possible to close the UART and get to the 2.6 uA<br>current consumption regime and still be able to detect for incoming data and be woken up so that the UART can<br>be re-opened at expense of losing that first character.<br>The BL653 Standby Doze current (at 25°C) consists of the below nRF52833 blocks:<br>▪<br>nRF52 System ON IDLE current (no RAM retention) (1.1 uA) – This is the base current of the CPU<br>▪<br>LFRC (0.7 uA) and RTC (0.1uA or near 0uA) running as well as 128k RAM retention (0.8 uA) – This adds to<br>the total of 2.7 uA typical. The RAM retention is 20nA per 4k block, but this can vary to 30nA per 4k block<br>which would make the total 2.55uA to 2.86uA.|
|**Note 3**|In Deep Sleep, everything is disabled and the only wake-up sources (including NFC to wakeup) are reset and<br>changes on SIO or NFC pins on which sense is enabled. The current consumption seen is ~0.6 uA typical in<br>BL653 modules.<br>▪Coming out from Deep Sleep to Standby Doze through the reset vector.|
|**Note 4**|Average current consumption depends on several factors (including Tx power, VCC, accuracy of 32MHz and<br>32.768 kHz). With these factors fixed, the largest variable is the advertising or connection interval set.<br>Advertising Interval range:<br>▪<br>20 milliseconds to 10240 mS (10485759.375 mS in BT5.1) in multiples of 0.625 milliseconds.<br>For an advertising event:<br>▪<br>The minimum average current consumption is when the advertising interval is large 10240 mS<br>(10485759.375 mS (in BT5.0) although this may cause long discover times (for the advertising event) by<br>scanners<br>▪<br>The maximum average current consumption is when the advertising interval is small 20 mS<br>▪<br>Other factors that are also related to average current consumption include the advertising payload bytes in<br>each advertising packet and whether it’s continuously advertising or periodically advertising.<br>Connection Interval range (for a peripheral):<br>▪<br>7.5 milliseconds to 4000 milliseconds in multiples of 1.25 milliseconds.<br>For a connection event (for a peripheral device):<br>▪<br>The minimum average current consumption is when the connection interval is large 4000 milliseconds<br>▪<br>The maximum average current consumption is with the shortest connection interval of 7.5 ms; no slave<br>latency.<br>Other factors that are also related to average current consumption include:<br>▪<br>Number packets per connection interval with each packet payload size<br>▪<br>An inaccurate 32.768 kHz master clock accuracy would increase the average current consumption.<br>Connection Interval range (for a central device):<br>▪<br>2.5 milliseconds to 40959375 milliseconds in multiples of 1.25 milliseconds.|
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## 4.2 Peripheral Block Current Consumption
The values below are calculated for a typical operating voltage of 3V.
## _**Table 10: UART power consumption**_
|**_Table 10: UART power consumption_**|||||
|---|---|---|---|---|
|**Parameter**|**Min**|**Typ**|**Max**|**Unit**|
|UART Run current @ 115200 bps|-|55|-|uA|
|UART Run current @ 1200 bps|-|55|-|uA|
|Idle current for UART (no activity)|-|1|-|uA|
|UART Baud rate|1.2|-|1000|kbps|
|**_Table 11: Power consumption_**|||||
|**Parameter**|**Min**|**Typ**|**Max**|**Unit**|
|SPI Master Run current @ 2 Mbps|-||50|uA|
|SPI Master Run current @ 8 Mbps|-||50|uA|
|Idle current for SPI (no activity)||<1||uA|
|SPI bit rate||-|8|Mbps|
|**_Table 12: I2C power consumption_**|||||
|**Parameter**|**Min**|**Typ**|**Max**|**Unit**|
|I2C Run current @ 100 kbps|-|50|-|uA|
|I2C Run current @ 400 kbps|-|50|-|uA|
|I2C Bit rate|100|-|400|kbps|
|**_Table 13: ADC power consumption_**<br>**Parameter**|**Min**|**Typ**|**Max**|**Unit**|
|ADC current during conversion|-|700|-|uA|
The above current consumption is for the given peripheral only and to operate that peripheral requires some other internal blocks which consume current (base current). This base current is consumed when the UART, SPI, I2C, or ADC is opened (operated).
For asynchronous interface, like the UART (asynchronous as the other end can communicate at any time), the UART on the BL653 must be kept open (by a command in _smart_ BASIC application script), resulting in the base current consumption penalty.
For a synchronous interface like the I2C or SPI (since BL653 side is the master), the interface can be closed and opened (by a command in _smart_ BASIC application script) only when needed, resulting in current saving (no base current consumption penalty). There’s a similar argument for ADC (open ADC when needed).
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To provide the widest scope for integration, a variety of physical host interfaces/sensors are provided. The major BL653 series module functional blocks described below.
Power management features:
- System Standby Doze and Deep Sleep modes
- Open/Close peripherals (UART, SPI, I2C, SIO’s, ADC, NFC). Peripherals consume current when open; each peripheral can be individually closed to save power consumption
- Use of the internal DCDC (REG1) convertor or LDO (REG1) is decided by the underlying BLE stack
- _smart_ BASIC command allows the supply voltage to be read (through the internal ADC)
- Pin wake-up system from deep sleep (including from NFC pins)
Power supply features:
- Supervisor hardware to manage power during reset, brownout, or power fail.
- 1.7V to 3.6V supply range for normal power supply (VDD pin) using internal DCDC convertor (REG1) or LDO(REG1) decided by the underlying BLE stack.
- 2.5V to 5.5 supply range for High voltage power supply (VDD_HV pin) using internal LDO(REG0).
- 4.35V to 5.5V supply range for powering USB (VBUS pin) portion of BL653 only. The remainder of the BL653 module circuitry must still be powered through the VDD (or VDD_HV) pin.
## 5.2 BL653 Power Supply Options
The BL653 module power supply internally contains the following two main supply regulator stages (Figure 4):
- REG0 – Connected to the VDD_HV pin
- REG1 – Connected to the VDD pin
The USB power supply is separate (connected to the VBUS pin).
_**Figure 4: BL653 power supply block diagram (adapted from the following resource: http://infocenter.nordicsemi.com/pdf/nRF52833_PS_v1.0.pdf**_
The BL653 power supply system enters one of two supply voltage modes, normal or high voltage mode, depending on how the external supply voltage is connected to these pins.
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BL653 power supply options:
- **Option 1 –** Normal voltage power supply mode entered when the external supply voltage is connected to both the VDD and VDD_HV pins (so that VDD equals VDD_HV). Connect external supply within range 1.7V to 3.6V range to BL653 VDD and VDD_HV pins.
## _OR_
- **Option 2 –** High voltage mode power supply mode (using BL653 VDD_HV pin) entered when the external supply voltage in ONLY connected to the VDD_HV pin and the VDD pin is not connected to any external voltage supply. Connect external supply within range 2.5V to 5.5V range to BL653 VDD_HV pin. BL653 VDD pin left unconnected.
- No external current draw (from VDD pin) is allowed when using High Voltage mode (VDD_HV), limitation of the nRF52833 chip.
- **Note:** To avoid surpassing the maximum die temperature (110 ºC), it is important to minimize current consumption when operating in the extended operating temperature conditions (+85 ºC to +105ºC). It is therefore recommended to use the module device on Normal Voltage mode with DCDC (REG1) enabled.
For either option, if you use USB interface then the BL653 VBUS pin must be connected to external supply within the range 4.35V to 5.5V. When using the BL653 VBUS pin, you **MUST** externally fit a 4.7uF to ground.
Table 14 summarizes these power supply options.
_**Table 14: BL653 powering options**_
**==> picture [479 x 151] intentionally omitted <==**
**----- Start of picture text -----**<br>
|||||
|---|---|---|---|
|OPTION 1 with USB|
|Power Supply|OPTION 1|OPTION 2 with USB|
|OPTION 2|peripheral,|
|Pins and|Normal voltage|peripheral, and high|
|High voltage mode|and normal voltage|
|Operating Voltage|mode operation|voltage operation|
|operation connect?|mode operation|
|Range|connect?|connect?|
|connect?|
|VDD (pin31)|Yes|No|No|
|Yes|
|1.7V to 3.6V|(Note 1)|(Note 2)|(Note 2)|
|VDD_HV (pin25)|Yes|
|No|Yes|No|
|2.5V to 5.5V|(Note 5)|
|VBUS (pin24)|Yes|Yes|
|No|(Note 3)|
|4.35V to 5.5V|(Note 4)|(Note 4)|
**----- End of picture text -----**<br>
## **Power Supply Option Notes:**
**Note 1 Option 1 –** External supply voltage is connected to BOTH the VDD and VDD_HV pins (so that VDD equals VDD_HV). Connect external supply within range 1.7V to 3.6V range to BOTH BL653 VDD and VDD_HV pins.
- **Note 2 Option 2 –** External supply within range 2.5V to 5.5V range to the BL653 VDD_HV pin ONLY. BL653 VDD pin left unconnected.
In High voltage mode, the VDD pin becomes an output voltage pin but no current can be taken from VDD pin (limitation of the nRF52833 chip). It Additionally, the VDD output voltage is configurable from 1.8V to 3.3V with possible settings of 1.8V, 2.1V, 2.4V, 2.7V, 3.0V, and 3.3V. The default voltage is 1.8V.
The supported BL653 VDD pin output voltage range depends on the supply voltage provided on the BL653 VDD_HV pin. The minimum difference between voltage supplied on the VDD_HV pin and the voltage output on the VDD pin is 0.3 V. The maximum output voltage of the VDD pin is VDDH – 0.3V.
- **Note 3** Depends on whether USB operation is required
- **Note 4** When using the BL653 **VBUS** pin, you **must** externally fit a 4.7uF capacitor to ground.
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## **Power Supply Option Notes:**
- **Note 5** To use the BL653 USB peripheral:
1. Connect the BL653 VBUS pin to the external supply within the range 4.35V to 5.5V. When using the BL653 VBUS pin, you **MUST** externally fit a 4.7uF to ground.
2. Connect the external supply to either the VDD (Option 1) or VDD_HV (Option 2) pin to operate the rest of BL653 module.
- When using the BL653 USB peripheral, the VBUS pin can be supplied from same source as VDD_HV (within the operating voltage range of the VBUS pin and VDD_HV pin).
## 5.3 Clocks and Timers
The integrated high accuracy 32 MHz (±10 ppm) crystal oscillator helps with radio operation and reducing power consumption in the active modes.
The integrated on-chip 32.768 kHz LFRC oscillator (±500 ppm) provides protocol timing and helps with radio power consumption in the system StandByDoze and Deep Sleep modes by reducing the time that the RX window needs to be open.
To keep the on-chip 32.768 kHz LFRC oscillator within ±500 ppm (which is needed to run the BLE stack) accuracy, RC oscillator needs to be calibrated (which takes 33 mS) regularly. The default calibration interval is eight seconds which is enough to keep within ±500 ppm. The calibration interval ranges from 0.25 seconds to 31.75 seconds (in multiples of 0.25 seconds) and configurable via firmware
## 5.3.2 Timers
When using _smart_ BASIC, the timer subsystem enables applications to be written which allow future events to be generated based on timeouts.
- **Regular Timer** – There are eight built-in timers (regular timers) derived from a single RTC clock which are controlled solely by smart BASIC functions. The resolution of the regular timer is 976 microseconds.
- **Tick Timer** – A 31-bit free running counter that increments every (1) millisecond. The resolution of this counter is 488 microseconds.
Refer to the _smartBASIC User Guide_ available from the Laird Connectivity BL653 product page. For timer utilization when using the Nordic SDK, refer to http://infocenter.nordicsemi.com/index.jsp.
## 5.4 Radio Frequency (RF)
- 2402–2480 MHz Bluetooth Low Energy radio BT5.1 – 1 Mbps, 2 Mbps, and long-range (125 kbps and 500 kbps) over-theair data rate.
- Tx output power of +8 dBm programmable down to 7 dBm, 6 dBm, 5 dBm, 4 dBm, 2 dBm, 0 dBm and further down to -20 dBm in steps of 4 dB and final TX power level of -40 dBm.
- Receiver (with integrated channel filters) to achieve maximum sensitivity -96 dBm @ 1 Mbps BLE, -92 dBm @2 Mbps, - 103 dBm @ 125 kbps long-range and -99 dBm @500kbps long-range).
- RF conducted interface available in the following two ways:
- 453-00039: RF connected to on-board PCB trace antenna
- 453-00041: RF connected to RF pad on BL653
- Antenna options:
- Integrated PCB trace antenna on the 453-00039
- External dipole antenna connected to IPEX MH4 RF connector on host PCB. If using the BL653 module RF pad variant (453-00041), customer MUST copy the 50-Ohms GCPW RF track design, MUST add series 2nH RF inductor (Murata LQG15HN2N0B02# or Murata LQG15HS2N0B02) and RF connector IPEX MHF4 Receptacle (MPN: 20449-001E) Detailed in the following section: _**50-Ohms RF Trace and RF Match Series 2nH RF Inductor on Host PCB for BL653 RF Pad Variant (453-00041)**_ .
- Received Signal Strength Indicator (RSSI)
- RSSI accuracy (valid range -90 to -20 dBm) is ±2 dB typical
- RSSI resolution 1 dB typical
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## 5.5 NFC
NFC support:
- Based on the NFC forum specification
- 13.56 MHz
- Date rate 106 kbps
- NFC Type2 and Type4 tag emulation
- Modes of operation:
- Disable
- – Sense – Activated
- Touch-to Pair with NFC
- Launch a smartphone app (on Android)
- NFC enabled Out-of-Band Pairing
- System Wake-On-Field function
- Proximity Detection
_**Table 15: NFC interface**_
~~e~~ **Signal Name Pin No** ~~es~~ **I/O** ~~s~~ **Comments** NFC1/SIO_09 59 I/O The NFC pins are by default NFC pins and an alternate function on each pin NFC2/SIO_10 57 I/O is GPIO. Refer to the _smart_ BASIC. User manual.
## 5.5.2 NFC Antenna Coil Tuning Capacitors
From Nordic’s _nRF52833_ Objective _Product Specification v1.0_ : http://infocenter.nordicsemi.com/pdf/nRF52833_PS_v1.0.pdf
The NFC antenna coil must be the connected differential between the NFC1 and NFC2 pins of the BL653. Two external capacitors should be used to tune the resonance of the antenna circuit to 13.56 MHz (Figure 5).
_**Figure 5: NFC antenna coil tuning capacitors**_
The required external tuning capacitor value is given by the following equations:
An antenna inductance of Lant = 0.72 uH provides tuning capacitors in the range of 300 pF on each pin. The total capacitance on NFC1 and NFC2 must be matched. Cint and Cp are small usually (Cint is 4pF), so can omit from calculation.
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**Battery Protection Note:** If the NFC coil antenna is exposed to a strong NFC field, the supply current may flow in the opposite direction due to parasitic diodes and ESD structures.
If the used battery does not tolerate a return current, a series diode must be placed between the battery and the BL653 to protect the battery.
## 5.6 UART Interface
**Note:** The BL653 has two UARTs.
The Universal Asynchronous Receiver/Transmitter (UART) offers fast, full-duplex, asynchronous serial communication with builtin flow control support (UART_CTS, UART_RTS) in HW up to one Mbps baud. Parity checking and generation for the ninth data bit are supported.
UART_TX, UART_RX, UART_RTS, and UART_CTS form a conventional asynchronous serial data port with handshaking. The interface is designed to operate correctly when connected to other UART devices such as the 16550A. The signaling levels are nominal 0 V and 3.3 V (tracks VDD) and are inverted with respect to the signaling on an RS232 cable.
Two-way hardware flow control is implemented by UART_RTS and UART_CTS. UART_RTS is an output and UART_CTS is an input. Both are active low.
These signals operate according to normal industry convention. UART_RX, UART_TX, UART_CTS, UART_RTS are all 3.3 V level logic (tracks VDD). For example, when RX and TX are idle they sit at 3.3 V. Conversely for handshaking pins CTS, RTS at 0 V is treated as an assertion.
The module communicates with the customer application using the following signals:
- Port/TxD of the application sends data to the module’s UART_RX signal line
- Port/RxD of the application receives data from the module’s UART_TX signal line
**==> picture [30 x 8] intentionally omitted <==**
**----- Start of picture text -----**<br>
BL653<br>**----- End of picture text -----**<br>
_**Figure 6: UART signals**_
**Note:** The BL653 serial module output is at 3.3V CMOS logic levels (tracks VDD). Level conversion must be added to interface with an RS-232 level compliant interface.
Some serial implementations link CTS and RTS to remove the need for handshaking. We do not recommend linking CTS and RTS other than for testing and prototyping. If these pins are linked and the host sends data at the point that the BL653 deasserts its RTS signal, there is significant risk that internal receive buffers will overflow, which could lead to an internal processor crash. This will drop the connection and may require a power cycle to reset the module. We recommend that the correct CTS/RTS handshaking protocol be adhered to for proper operation.
_**Table 16: UART interface**_
|**Signal Name**|**Pin No.**|**Pin No.**<br>**I/O**|**I/O**<br>**Comments**|
|---|---|---|---|
|SIO_06 / UART_Tx|35|O|SIO_06 (alternative function UART_Tx) is an output, set high (in firmware).|
|SIO_08 / UART_Rx|29|I|SIO_08 (alternative function UART_Rx) is an input, set with internal pull-up (in firmware).|
|SIO_05 / UART_RTS|39|O|SIO_05 (alternative function UART_RTS) is an output, set low (in firmware).|
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|**Signal Name**|**Pin No.**|**Pin No.**<br>**I/O**|**I/O**<br>**Comments**|
|---|---|---|---|
|SIO_07 / UART_CTS|37|I|SIO_07 (alternative function UART_CTS) is an input, set with internal pull-down (in<br>firmware).|
The UART interface is also used to load customer developed _smart_ BASIC application script.
## 5.7 USB Interface
BL653 has USB 2.0 FS (Full Speed, 12 Mbps) hardware capability. There is a CDC driver/Virtual UART as well as other USB drivers available via Nordic SDK – such as: usb_audio, usb_hid, usb_generic, usb_msc (mass storage device).
_**Table 17: USB interface**_
|**Signal Name**|**Pin No**|**Pin No**<br>**I/O**|**I/O**<br>**Comments**|
|---|---|---|---|
|D-|17|I/O|I/O|
|D+|15|I/O|I/O|
|VBUS|24||When using the BL653 VBUS pin (which is mandatory when USB interface is used),<br>Customer MUST connect externally a 4.7uF capacitor to ground.<br>**_Note:_**_You MUST power the rest of BL653 module circuitry through the VDD pin_<br>_(OPTION1) or VDD_HV pin (OPTION2)._|
## 5.8 SPI Bus
The SPI interface is an alternate function on SIO pins.
The module is a master device that uses terminals SPI_MOSI, SPI_MISO, and SPI_CLK. SPI_CS is implemented using any spare SIO digital output pins to allow for multi-dropping.
The SPI interface enables full duplex synchronous communication between devices. It supports a three-wire (SPI_MOSI, SPI_MISO, SPI_SCK,) bidirectional bus with fast data transfers to and from multiple slaves. Individual chip select signals are necessary for each of the slave devices attached to a bus, but control of these is left to the application through use of SIO signals. I/O data is double buffered.
The SPI peripheral supports SPI mode 0, 1, 2, and 3.
## _**Table 18: SPI interfaces**_
|**_Table 18: SPI interfaces_**||||
|---|---|---|---|
|**Signal Name**<br>**Pin No**|**Pin No**<br>**I/O**||**Comments**|
|SIO_40/SPI_MOSI<br>32|O||This interface is an alternate function configurable by|
|SIO_04/AIN2/SPI_MISO<br>34|I||_smart_BASIC. Default in the FW pin 56 and 53 are SIO inputs. SPIOPEN() in<br>_smart_BASIC selects SPI function and changes pin 56 and 53 to outputs|
|SIO_41/SPI_CLK<br>30|O||(when in SPI master mode).|
|Any_SIO/SPI_CS<br>54|I||SPI_CS is implemented using any spare SIO digital output pins to allow for<br>multi-dropping. On Laird Connectivity devboard SIO_44 (pin54) used as|
||||SPI_CS.|
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## 5.9 I2C Interface
The I2C interface is an alternate function on SIO pins.
The two-wire interface can interface a bi-directional wired-OR bus with two lines (SCL, SDA) and has master /slave topology. The interface is capable of clock stretching. Data rates of 100 kbps and 400 kbps are supported.
An I2C interface allows multiple masters and slaves to communicate over a shared wired-OR type bus consisting of two lines which normally sit at VDD. The SCL is the clock line which is always sourced by the master and SDA is a bi-directional data line which can be driven by any device on the bus.
**IMPORTANT:** It is essential to remember that pull-up resistors on both SCL and SDA lines are not provided in the module and MUST be provided external to the module.
|**_Table 19: I2C interface_**<br>**Signal Name**<br>SIO_26/I2C_SDA<br>SIO_27/I2C_SCL<br>~~ae ~~|**Pin No**<br>36<br>38<br> ~~ee ee~~|**I/O**<br>I/O<br>I/O<br>~~ee~~|**Comments**<br>This interface is an alternate function on each pin, configurable by<br>_smart_BASIC. I2COPEN() in_smart_BASIC selects I2C function.|
|---|---|---|---|
## 5.10 General Purpose I/O, ADC, PWM, and FREQ
## 5.10.1 GPIO
The 42 SIO pins are configurable by _smart_ BASIC application script or Nordic SDK. They can be accessed individually. Each has the following user configured features:
- Input/output direction
- Output drive strength (standard drive 0.5 mA or high drive 5mA)
- Internal pull-up and pull-down resistors (13 K Ohms typical) or no pull-up/down or input buffer disconnect
- Wake-up from high or low-level triggers on all pins including NFC pins
## 5.10.2ADC
The ADC is an alternate function on SIO pins, configurable by _smart_ BASIC or Nordic SDK.
The BL653 provides access to 8-channel 8/10/12-bit successive approximation ADC in one-shot mode. This enables sampling up to 8 external signals through a front-end MUX. The ADC has configurable input and reference pre-scaling and sample resolution (8, 10, and 12 bit).
## 5.10.2.1 Analog Interface (ADC)
|**_Table 20: Analog interface_**<br>**Signal Name**|**Pin No**|**Pin No**<br>**I/O**|**Comments**|
|---|---|---|---|
|SIO_05/UART_RTS/AIN3 – Analog Input|39|I|This interface is an alternate function on each pin,|
|SIO_04/AIN2/SPI_MISO – Analog Input|34|I|configurable by_smart_BASIC. AIN configuration|
|SIO_03/AIN1 – Analog Input<br>SIO_02/AIN0 – Analog Input<br>SIO_31/AIN7 – Analog Input|49<br>50<br>44|I<br>I<br>I|selected using GpioSetFunc() function. <br>Configurable 8, 10, 12-bit resolution.<br>Configurable voltage scaling 4, 2, 1/1, 1/3, 1/3, 1/4,<br>1/5, 1/6(default).|
|SIO_30/AIN6 – Analog Input|45|I|Configurable acquisition time 3uS, 5uS, 10uS(default),|
|SIO_29/AIN5 – Analog Input|48|I|15uS, 20uS, 40uS.|
|SIO_28/AIN4 – Analog Input|46|I|Full scale input range (VDD)|
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## 5.10.3 PWM Signal Output on Up to 16 SIO Pins
The PWM output is an alternate function on ALL (GPIO) SIO pins, configurable by _smart_ BASIC or the Nordic SDK.
The **PWM output** signal has a frequency and duty cycle property. Frequency is adjustable (up to 1 MHz) and the duty cycle can be set over a range from 0% to 100%.
PWM output signal has a frequency and duty cycle property. PWM output is generated using dedicated hardware in the chipset. There is a trade-off between PWM output frequency and resolution.
For example:
- PWM output frequency of 500 kHz (2 uS) results in resolution of 1:2
- PWM output frequency of 100 kHz (10 uS) results in resolution of 1:10
- PWM output frequency of 10 kHz (100 uS) results in resolution of 1:100
- PWM output frequency of 1 kHz (1000 uS) results in resolution of 1:1000
## 5.10.4 FREQ Signal Output on Up to 16 SIO Pins
The FREQ output is an alternate function on 16 (GPIO) SIO pins, configurable by _smart_ BASIC or Nordic SDK.
**Note:** The frequency driving each of the 16 SIO pins is the same but the duty cycle can be independently set for each pin.
**FREQ output** signal frequency can be set over a range of 0Hz to 4 MHz (with 50% mark-space ratio).
## 5.11 nRESET Pin
|**_Table 21: nRESET pin_**|**_Table 21: nRESET pin_**|||
|---|---|---|---|
|**Signal Name**|**Signal Name**<br>**Pin No**|**Pin No**<br>**I/O**|**I/O**<br>**Comments**|
|nRESET|19|I|BL653 HW reset (active low). Pull the nRESET pin low for minimum 100 mS for the<br>BL653 to reset.|
## 5.12 Two-Wire Interface SWD (JTAG)
The BL653 Firmware hex file consists of four elements:
- _smart_ BASIC runtime engine
- Nordic Softdevice
- Master Bootloader
Laird Connectivity BL653 _smart_ BASIC firmware (FW) image part numbers are referenced as w.x.y.z (ex. V30.x.y.z). The BL653 _smart_ BASIC runtime engine and Softdevice combined image can be upgraded by the customer over the UART interface.
You also have the option to use the two-wire SWD (JTAG) interface, during production, to clone the file system of a Golden preconfigured BL653 to others using the Flash Cloning process. This is described in the following application note _Flash Cloning for the BL653_ . In this case the file system is also part of the .hex file.
|**Signal Name**|**Pin No**|**I/O**|**Comments**|
|---|---|---|---|
|SWDIO|1|I/O|Internal pull-up resistor|
|SWDCLK|3|I|Internal pull-down resistor|
The Laird Connectivity development board incorporates an on-board SWD (JTAG) J-link programmer for this purpose. There is also the following SWD (JTAG) connector which allows on-board SWD (JTAG) J-link programmer signals to be routed off the development board. The only requirement is that you should use the following SWD (JTAG) connector on the host PCB.
The SWD (JTAG) connector MPN is as follows:
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**Reference Part Description and MPN (Manufacturers Part Number)** JP1 FTSH-105 Header, 1.27mm, SMD, 10-way, FTSH-105-01-L-DV Samtech
**Note:** Reference on the BL653 development board schematic (Figure 7) shows the DVK development schematic wiring only for the SWD (JTAG) connector and the BL653 module JTAG pins.
**==> picture [140 x 81] intentionally omitted <==**
**----- Start of picture text -----**<br>
VDD_VSRC_nRF<br>T<br>JP1<br>1 2 SWDIO_EXT<br>3 4 SWDCLK_EXT<br>5 6 SWO_EXT<br>7 8<br>9 1 0 nRESET_EXT<br>PIN HEADER,1.27mm 2X5P<br>GND<br>**----- End of picture text -----**<br>
## _**Figure 7: BL653 development board schematic**_
**Note:** The BL653 development board allows Laird Connectivity on-board SWD (JTAG) J-link programmer signals to be routed off the development board by from connector JP1
SWD (JTAG) is required because Nordic SDK applications can only be loaded using the SWED (JTAG) ( _smart_ BASIC firmware can be loaded using SWD (JTAG) as well as over the UART). We recommend that you use SWD (JTAG) (2-wire SWD interface) to handle future BL653 module firmware upgrades. You **must** wire out the JTAG (2-wire SWD interface) on your host design (see Figure 7, where the following four lines should be wired out – SWDIO, SWDCLK, GND, and VCC). _smart_ BASIC firmware upgrades can still be performed over the BL653 UART interface, but this is slower than using the BL653 JTAG (2-wire SWD interface) – (60 seconds using UART vs. 10 seconds when using JTAG).
## 5.15 BL653 Wakeup
## 5.13.1 Waking Up BL653 From Host
Wake the BL653 from the host using wake-up pins (any SIO pin). You may configure the BL653’s wakeup pins via _smart_ BASIC to do any of the following:
- Wake up when signal is low
- Wake up when signal is high
- Wake up when signal changes
Refer to the _smart_ BASIC user guide for details. You can access this guide from the Laird Connectivity BL653 product page.
For BL653 wake-up using the Nordic SDK, refer to Nordic infocenter.nordicsemi.com.
## 5.14. Low Power Modes
The BL653 has three power modes: Run, Standby Doze, and Deep Sleep.
The module is placed automatically in Standby Doze if there are no pending events (when WAITEVENT statement is encountered within a customer’s _smart_ BASIC script). The module wakes from Standby Doze via any interrupt (such as a received character on the UART Rx line). If the module receives a UART character from either the external UART or the radio, it wakes up.
Deep sleep is the lowest power mode. Once awakened, the system goes through a system reset.
For different Nordic power modes using the Nordic SDK, refer to Nordic infocenter.nordicsemi.com.
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## 5.15 Temperature Sensor
The on-silicon temperature sensor has a temperature range greater than or equal to the operating temperature of the device. Resolution is 0.25°C degrees. The on-silicon temperature sensor accuracy is ±5°C.
To read temperature from on-silicon temperature sensor (in tenth of centigrade, so 23.4°C is output as 234) using _smart_ BASIC:
- In command mode, use **ATI2024**
_OR_
- From running a _smart_ BASIC application script, use **SYSINFO(2024)**
## 5.16 Security/Privacy
## 5.16.1 Random Number Generator
Exposed via an API in _smart_ BASIC (see _smart_ BASIC documentation available from the BL653 product page). The **rand()** function from a running _smart_ BASIC application returns a value.
For Nordic related functionality, visit Nordic infocenter.nordicsemi.com
Exposed via an API in _smart_ BASIC (see _smart_ BASIC documentation available from the BL653 product page). Function called **aesencrypt** and **aesdecrypt** .
For Nordic related functionality, visit Nordic infocenter.nordicsemi.com
## 5.16.3 Readback Protection
The BL653 supports readback protection capability that disallows the reading of the memory on the nRF52833 using a JTAG interface. Available via _smart_ BASIC or the Nordic SDK.
## 5.16.4 Elliptic Curve Cryptography
The BL653 offers a range of functions for generating public/private keypair, calculating a shared secret, as well as generating an authenticated hash. Available via _smart_ BASIC or the Nordic SDK.
## 5.17 Optional External 52.768 kHz Crystal
This is not required for normal BL653 module operation.
The BL653 uses the on-chip 32.76 kHz RC oscillator (LFCLK) by default (which has an accuracy of ±500 ppm) which requires regulator calibration (every eight seconds) to within ±500 ppm.
You can connect an optional external high accuracy (±20 ppm) 32.768 kHz crystal (and associated load capacitors) to the BL653SIO_01/XL2 (pin 41) and SIO_00/XL1 (pin 42) to provide improved protocol timing and to help with radio power consumption in the system standby doze/deep sleep modes by reducing the time that the RX window needs to be open. Table 22 compares the current consumption difference between RC and crystal oscillator.
_**Table 22: Comparing current consumption difference between BL653 on-chip RC 32.76 kHz oscillator and optional external crystal (32.768kHz) based oscillator**_
||**BL653 On-chip 32.768 kHz RC Oscillator**<br>**(±500 ppm) LFRC**|**Optional External Higher Accuracy (±20**<br>**ppm) 32.768 kHz Crystal-based Oscillator**<br>**LFXO**|
|---|---|---|
|**Current Consumption**<br>**of 32.768 kHz Block**|0.7 uA|0.23 uA|
|**Standby Doze Current**|||
|**(SYSTEM ON IDLE +full**|2.5 uA|2.03 uA|
|**RAM retention +RTC**|||
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**==> picture [501 x 620] intentionally omitted <==**
**----- Start of picture text -----**<br>
|||||
|---|---|---|---|
|Optional External Higher Accuracy (±20|
|BL653 On-chip 32.768 kHz RC Oscillator|
|ppm) 32.768 kHz Crystal-based Oscillator|
|(±500 ppm) LFRC|
|LFXO|
|run current (0uA) +|
|LFRC or LFXO)|
|Calibration|Calibration required regularly (default eight|Not applicable|
|seconds interval).|
|Calibration takes 32 ms; with DCDC used, the|
|total charge of a calibration event is 15.1 uC|
|(or 18.8uC with DCDC disabled).|
|The average current consumed by the|
|calibration depends on the calibration interval|
|and can be calculated using the following|
|formula:|
|CAL_charge/CAL_interval –|The lowest|
|calibration interval (0.25 seconds) provides an|
|average current of (DCDC enabled):|
|15.1uC/0.25s = 60.4uA|
|To get the 250-ppm accuracy, the BLE stack|
|specification states that a calibration interval of|
|8 seconds is enough. This gives an average|
|current of:|
|15.1uC/8s = 1.89 uA|
|Added to the LFRC run current and Standby|
|Doze (IDLE) base current shown above results|
|in a total average current of:|
|LFRC + CAL = 2.5 + 1.89 = 4.39 uA|
|Total|4.39 uA|2.03 uA|
|▪ Lowest current consumption|
|▪ Low current consumption|▪ Needs external crystal|
|Summary|▪ Accuracy 250 ppm|▪ High accuracy (depends on the crystal,|
|usually 20 ppm)|
|Table 23: Optional external 32.768 kHz crystal specification|
|Optional external 32.768kHz crystal|Min|Typ|Max|
|Crystal Frequency|-|32.768 kHz|-|
|Frequency tolerance requirement of BLE stack|-|-|±500 ppm|
|Load Capacitance|-|-|12.5 pF|
|Shunt Capacitance|-|-|2 pF|
|Equivalent series resistance|-|-|100 kOhm|
|Drive level|-|-|1 uW|
|Input capacitance on XL1 and XL2 pads|-|4 pF|-|
|Run current for 32.768 kHz crystal based oscillator|-|0.23 uA|-|
|Start-up time for 32.768 kHz crystal based oscillator|-|0.25 seconds|-|
|Peak to peak amplitude for external low swing clock input signal|
|200 mV|-|1000 mV|
|must not be outside supply rails|
**----- End of picture text -----**<br>
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Be sure to tune the load capacitors on the board design to optimize frequency accuracy (at room temperature) so it matches that of the same crystal standalone, Drive Level (so crystal operated within safe limits) and oscillation margin (Rneg is at least 3 to 5 times ESR) over the operating temperature range.
## 5.18 453-00039 On-board PCB Antenna Characteristics
The 453-00039 on-board PCB trace monopole antenna radiated performance depends on the host PCB layout.
The BL653 development board was used for BL653 development and the 453-00039 PCB antenna performance evaluation. To obtain similar performance, follow guidelines in section _PCB Layout on Host PCB for the 453-00039_ to allow the on-board PCB antenna to radiate and reduce proximity effects due to nearby host PCB GND copper or metal covers.
**XY-plane XZ-plane YZ-plane Unit in dBi @2440MHz** ~~——_————eeEEE~~ **Peak Avg Peak Avg Peak Avg** 453-00039 PCB trace antenna -0.94 -4.92 -3.41 -6.7 -3.14 -8.64 **XY Plane XZ Plaze YZ Plane**
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**==> picture [24 x 8] intentionally omitted <==**
**----- Start of picture text -----**<br>
3 GHz fata)!<br>**----- End of picture text -----**<br>
_**Figure 8: 453-00039 on-board PCB antenna performance (Antenna Gain and S11 – whilst 453-00039 module sitting on Devboard 45300039-K1)**_
The BL653 is easy to integrate, requiring no external components on your board apart from those which you require for development and in your end application.
The following are suggestions for your design for the best performance and functionality.
Checklist (for Schematic):
## ▪ **BL653 power supply options:**
**Option 1** – Normal voltage power supply mode entered when the external supply voltage is connected to both the VDD and VDDH pins (so that VDD equals VDD_HV). Connect external supply within range 1.7V to 3.6V range to BL653 VDD and VDD_HV pins.
## _OR_
**Option 2 –** High voltage mode power supply mode (using BL653 VDD_HV pin) entered when the external supply voltage in ONLY connected to the VDDH pin and the VDD pin is not connected to any external voltage supply. Connect external supply within range 2.5V to 5.5V range to BL653 VDD_HV pin. BL653 VDD pin left unconnected.
In High Voltage mode (VDD_HV), No external current draw (from VDD pin) is allowed (limitation of nRF52833 chipset).
For either option, if you use USB interface then the BL653 VBUS pin must be connected to external supply within the range 4.35V to 5.5V. When using the BL653 VBUS pin, you MUST externally fit a 4.7uF to ground.
**Note:** To avoid surpassing the maximum die temperature (110 ºC), it is important to minimize current consumption when operating in the extended operating temperature conditions (+85 ºC to +105ºC). It is therefore recommended to use the module device on Normal Voltage mode with DCDC (REG1) enabled.
External power source should be within the operating range, rise time and noise/ripple specification of the BL653. Add decoupling capacitors for filtering the external source. Power-on reset circuitry within BL653 series module incorporates brown-out detector, thus simplifying your power supply design. Upon application of power, the internal power-on reset ensures that the module starts correctly.
## ▪ **VDD and coin-cell** operation
With a built-in DCDC (operating range 1.7V to 3.6V), that reduces the peak current required from a coin-cell, making it easier to use with a coin-cell.
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## ▪ **AIN (ADC) and SIO pin IO voltage levels**
BL653 SIO voltage levels are at VDD. Ensure input voltage levels into SIO pins are at VDD also (if VDD source is a battery whose voltage will drop). Ensure ADC pin maximum input voltage for damage is not violated.
## ▪ **AIN (ADC) impedance and external voltage divider setup**
If you need to measure with ADC a voltage higher than 3.6V, you can connect a high impedance voltage divider to lower the voltage to the ADC input pin.
## ▪ **JTAG (SWD)**
This is REQUIRED as Nordic SDK applications can only be loaded using the SWD (JTAG) ( _smart_ BASIC firmware can be loaded using the JTAG as well as the UART).
We recommend that you use JTAG (2-wire interface) to handle future BL653 module firmware upgrades. You MUST wire out the JTAG (2-wire interface) on your host design (see Figure 7, where four lines should be wired out, namely SWDIO, SWDCLK, GND and VCC). Firmware upgrades can still be performed over the BL653 UART interface, but this is slower (60 seconds using UART vs. 10 seconds when using JTAG) than using the BL653 JTAG (2-wire interface). JTAG may be used if you intend to use Flash Cloning during production to load _smart_ BASIC scripts.
## ▪ **UART**
Required for loading your _smart_ BASIC application script during development (or for subsequent firmware upgrades (except JTAG for FW upgrades and/or Flash Cloning of the _smart_ BASIC application script). Add connector to allow interfacing with UART via PC (UART–RS232 or UART-USB).
## ▪ **UART_RX and UART_CTS**
SIO_08 (alternative function UART_RX) is an input, set with internal weak pull-up (in firmware). The pull-up prevents the module from going into deep sleep when UART_RX line is idling.
SIO_07 (alternative function UART_CTS) is an input, set with internal weak pull-down (in firmware). This pull-down ensures the default state of the UART_CTS will be asserted which means can send data out of the UART_TX line. Laird Connectivity recommends that UART_CTS be connected.
## ▪ **nAutoRUN pin and operating mode selection**
nAutoRUN pin needs to be externally held high or low to select between the two BL653 operating modes at power-up:
- Self-contained Run mode (nAutoRUN pin held at 0V).
- Interactive / development mode (nAutoRUN pin held at VDD).
Make provision to allow operation in the required mode. Add jumper to allow nAutoRUN pin to be held high or low (BL653 has internal 13K pull-down by default) OR driven by host GPIO.
## ▪ **I2C**
It is essential to remember that pull-up resistors on both I2C_SCL and I2C_SDA lines are not provided in the BL653 module and MUST be provided external to the module as per I2C standard.
## ▪ **SPI**
Implement SPI chip select using any unused SIO pin within your _smart_ BASIC application script or Nordic application then SPI_CS is controlled from the software application allowing multi-dropping.
## ▪ **SIO pin direction**
BL653 modules shipped from production with _smart_ BASIC FW, all SIO pins (with default function of DIO) are mostly digital inputs (see Pin Definitions Table2). Remember to change the direction SIO pin (in your _smart_ BASIC application script) if that particular pin is wired to a device that expects to be driven by the BL653 SIO pin configured as an output. Also, these SIO pins have the internal pull-up or pull-down resistor-enabled by default in firmware (see Pin Definitions Table 2). This was done to avoid floating inputs, which can cause current consumption in low power modes (e.g. StandbyDoze) to drift with time. You can disable the PULL-UP or Pull-down through their _smart_ BASIC application.
**Note:** Internal pull-up, pull down takes current from VDD.
- **SIO_02 pin** and OTA _smart_ BASIC application download feature
SIO_02 is an input, set with internal pull-down (in FW). Refer to latest firmware release documentation on how SIO_02 is used for Over the Air _smart_ BASIC application download feature. The SIO_02 pin must be pulled high externally to enable
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the feature. Decide if this feature is required in production. When SIO_02 is high, ensure nAutoRun is NOT high at same time; otherwise you cannot load the _smart_ BASIC application script.
## ▪ **NFC antenna connector**
To make use of the Laird Connectivity flexi-PCB NFC antenna, fit connector:
- Description – FFC/FPC Connector, Right Angle, SMD/90d, Dual Contact,1.2 mm Mated Height
- Manufacturer – Molex
- Manufacturers Part number – 512810594
Add tuning capacitors of 300 pF on NFC1 pin to GND and 300 pF on NFC2 pins to GND if the PCB track length is similar as development board.
## ▪ **nRESET pin (active low)**
Hardware reset. Wire out to push button or drive by host.
By default module is out of reset when power applied to VCC pins.
## ▪ **Optional External 32.768kHz crystal**
If the optional external 32.768kHz crystal is needed then use a crystal that meets specification and add load capacitors whose values should be tuned to meet all specification for frequency and oscillation margin.
- **SIO_38 special function pin**
This is for future use by Laird Connectivity. It is currently a Do Not Connect pin if using the _smart_ BASIC FW.
- **BL653 module RF pad variant 453-00041**
If using the BL653 module RF pad variant (453-00041), MUST copy the 50-Ohms GCPW RF track design, MUST add series 2nH RF inductor (Murata LQG15HN2N0B02# or Murata LQG15HS2N0B02) and RF connector IPEX MHF4 Receptacle (MPN: 20449-001E) Detailed in the following section: _**50-Ohms RF Trace and RF Match Series 2nH RF Inductor on Host PCB for BL653 RF Pad Variant (453-00041)**_ .
## 6.2 PCB Layout on Host PCB - General
## **Checklist (for PCB):**
- MUST locate BL653 module close to the edge of PCB (mandatory for the 453-00039 for on-board PCB trace antenna to radiate properly).
- Use solid GND plane on inner layer (for best EMC and RF performance).
- All module GND pins MUST be connected to host PCB GND.
- Place GND vias close to module GND pads as possible.
- Unused PCB area on surface layer can flooded with copper but place GND vias regularly to connect the copper flood to the inner GND plane. If GND flood copper is on the bottom of the module, then connect it with GND vias to the inner GND plane.
- Route traces to avoid noise being picked up on VDD, VDDH, VBUS supply and AIN (analogue) and SIO (digital) traces.
- Ensure no exposed copper is on the underside of the module (refer to land pattern of BL653 development board).
## 6.3 PCB Layout on Host PCB for the 453-O0039
The 453-00039 has an integrated PCB trace antenna and its performance is sensitive to host PCB. It is critical to locate the 45300039 on the edge of the host PCB (or corner) to allow the antenna to radiate properly. Refer to guidelines in section _**PCB land pattern and antenna keep-out area for the 453-00039**_ . Some of those guidelines repeated below.
- Ensure there is no copper in the antenna keep-out area on any layers of the host PCB. Keep all mounting hardware and metal clear of the area to allow proper antenna radiation.
- For best antenna performance, place the 453-00039 module on the edge of the host PCB, preferably in the edge center.
- The BL653 development board has the 453-00039 module on the edge of the board (not in the corner). The antenna keepout area is defined by the BL653 development board which was used for module development and antenna performance evaluation is shown in Figure 9, where the antenna keep-out area is ~5 mm wide, ~39.95 mm long; with PCB dielectric (no copper) height ~1 mm sitting under the 453-00039 PCB trace antenna.
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- The 453-00039 module on-board PCB trace antenna is tuned when the 453-00039 is sitting on development board (host PCB) with size of 125 mm x 85 mm x 1mm.
- A different host PCB thickness dielectric will have small effect on antenna.
- The antenna-keep-out defined in the Host PCB Land Pattern and Antenna Keep-out for the 453-00039 section.
- Host PCB land pattern and antenna keep-out for the BL653 applies when the 453-00039 is placed in the edge of the host PCB preferably in the edge center. Figure 9 shows an example.
GND »oOodoa o a” . US dao oF o t ie 4 ey By am _**Figure 9: PCB trace Antenna keep-out area (shown in red), corner of the BL653 development board for the 453-00039 module.**_ **Antenna Keep-out Notes: Note 1** The BL653 module is placed on the edge, preferably edge centre of the host PCB. **Note 2** Copper cut-away on all layers in the _Antenna Keep-out_ area under the 453-00039 on host PCB.
## **Antenna Keep-out Notes:**
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## 6.3.2 Antenna Keep-Out and Proximity to Metal or Plastic
## **Checklist (for metal /plastic enclosure):**
- Minimum safe distance for metals without seriously compromising the antenna (tuning) is 40 mm top/bottom and 30 mm left or right.
- Metal close to the 453-00039 PCB trace monopole antenna (bottom, top, left, right, any direction) will have degradation on the antenna performance. The amount of that degradation is entirely system dependent, meaning you will need to perform some testing with your host application.
- Any metal closer than 20 mm will begin to significantly degrade performance (S11, gain, radiation efficiency).
- It is best that you test the range with a mock-up (or actual prototype) of the product to assess effects of enclosure height (and materials, whether metal or plastic).
## 6.4 50-Ohms RF Trace and RF Match Series 2nH RF Inductor on Host
To use an external antenna requires BL653 module variant with RF pad (453-00041) and 50-Ohm RF trace (GCPW, that is Grounded Coplanar Waveguide) from RF_pad (pin72) of the module (BL653 453-00041) to RF antenna connector (IPEX MHF4) on host PCB. On this RF path, MUST use 2nH series RF inductor. BL653 module GND pin0 and GND pin66 used to support GCPW 50-Ohm RF trace.
## **Checklist for SCH**
- MUST fit 2 nH RF inductor (R144) in series. RF inductor part number is Murata LQG15HN2N0B02# or Murata LQG15HS2N0B02# with 0402 body size.
https://www.murata.com/en-eu/products/productdetail.aspx?partno=LQG15HN2N0B02%23 https://www.murata.com/en-eu/products/productdetail.aspx?partno=LQG15HS2N0B02%23
- MUST fit RF connector IPEX MHF4 Receptacle (MPN: 20449-001E), https://www.i-pex.com/product/mhf-4-smt#!
## _**Figure 10: BL6653 RF pad variant (453-00041) Host PCB 50-Ohm RF trace schematic with series 2nH inductor, RF connector**_
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**==> picture [315 x 9] intentionally omitted <==**
**----- Start of picture text -----**<br>
Layer1 (RF Track and RF GND)<br>**----- End of picture text -----**<br>
**==> picture [299 x 39] intentionally omitted <==**
**----- Start of picture text -----**<br>
Layer2 (RF GND) and Layer2 copper cut-out under RF connector<br>| re)<br>**----- End of picture text -----**<br>
_**Figure 11: 50-Ohm RF trace design (Layer1 and Layer2) on BL653 development board (or host PCB) for use with BL653 (453-00041) module**_
## **Checklist for PCB:**
- MUST use a 50-Ohm RF trace (GCPW, that is Grounded Coplanar Waveguide) from RF_pad (pin72) of the module (BL653 453-00041) to RF antenna connector (IPEX MHF4) on host PCB.
- To ensure regulatory compliance, MUST follow exactly the following considerations for 50-Ohms RF trace design and test verification:
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|<br>KS~~A~~|**Thickness**<br>~~A~~||
|---|---|---|
||**mil**||
|Solder Mask|0.4|Stack up for<br>50Ohms<br>GCPW RF<br>track.|
|Layer1 Copper 0.5oz (Note1)|0.7||
|Prepreg|4||
|Layer2 Copper 1oz|1.4||
|Core 0.6mm|24||
|Layer3 Copper 1oz|1.4||
|Prepreg|4||
|Layer4 Copper 0.5oz (Note1)|0.7||
|Solder Mask|0.4||
**Note 1** : The plating (ENIG) above base 0.5z copper is not listed, but plating expected to be ENIG.
## _**Figure 12: BL653 development board PCB stack-up and L1 to L2 50-Ohms Grounded CPW RF trace design**_
- The 50-Ohms RF trace design MUST be Grounded Coplanar Waveguide (GCPW) with
- Layer1 RF track width (W) of 6.5mil and
- Layer1 gap (G) to GND of 10mil and where the
- Layer1 to Layer 2 dielectric thickness (H) MUST be 4mil.
- Further the Layer1 base copper must be 0.5-ounce base copper (that is 0.7mil) plus the plating and
- Layer1 MUST be covered by solder mask.
- The 50-Ohms RF trace design MUST follow the PCB stack-up shown in Figure 12. (Layer1 to Layer2 thickness MUST be identical to the BL653 development board).
- The 50-Ohms RF track should be a controlled-impedance trace e.g. ±10%.
- The 50-Ohms RF trace length MUST be identical (as seen in Figure 12) (TBD 6.7 mm) to that on the BL653 development board from BL653 module RF pad (pin72) to the RF connector IPEX MHF4 Receptable (MPN: 20449-001E).
- Place GND vias regularly spaced either side of 50-Ohms RF trace to form GCPW (Grounded coplanar waveguide) transmission line as shown in Figure12 and use BL653 module GND pin0 and GND pin66.
- Cut away copper on Layer2 GND layer under the RF connector IPEX MHF4 Receptable, as seen in Figure 12. This is to reduce RF detuning the 50Ohms of the RF connector (J49) when it sits on the PCB.
- Cut away copper on Layer2 GND layer under the BL653 module RF pad (pin72), identical to the BL653 development board as seen in Figure 12.
- Use spectrum analyzer to confirm the radiated (and conducted) signal is within the certification limit.
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## 6.5 External Antenna Integration with 453-O00041
Please refer to the regulatory sections for FCC, IC, CE, RCM, KC, and Japan for details of use of BL653-with external antennas in each regulatory region.
The BL653 family has been designed to operate with the below external antennas (with a maximum gain of 2.0 dBi). The required antenna impedance is 50 ohms. See Table 24. External antennas improve radiation efficiency.
## _**Table 24: External antennas for the BL653**_
**==> picture [503 x 182] intentionally omitted <==**
**----- Start of picture text -----**<br>
|||||||
|---|---|---|---|---|---|
|Peak Gain|
|Laird Connectivity|
|Manufacturer|Model|Type|Connector|
|Part Number|2400-2500 MHz|2400-2480 MHz|
|Laird|EBL2400A1-|IPEX|
|NanoBlue|PCB Dipole|2 dBi|-|
|Connectivity|10MH4L|MHF4|
|Laird|IPEX|
|FlexPIFA|001-0022|Patch|-|2 dBi|
|Connectivity|MHF4|
|IPEX|
|Mag.Layers|EDA-8709-2G4C1-B27-CY|0600-00057|Dipole|2 dBi|-|
|MHF4|
|Laird|EFA2400A3S-|IPEX|
|mFlexPIFA|PIFA|-|2 dBi|
|Connectivity|10MH4L|MHF4|
|Laird|
|Laird Connectivity NFC|0600-00061|NFC|N/A|-|-|
|Connectivity|
|Laird|
|BL653 PCB printed antenna|NA|Printed PCB|N/A|0 dBi|-|
|Connectivity|
**----- End of picture text -----**<br>
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## 7 MECHANICAL DETAILS
## _**Figure 13: BL653 mechanical drawings**_
Development Kit Schematics can be found in the software downloads tab of the BL653 product page.
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_**Figure 14: Land pattern and Keep-out for the 453-00039**_
All dimensions are in millimeters.
## **Host PCB Land Pattern and Antenna Keep-out for the 453-00039 Notes:**
|**Note 1**|Ensure there is no copper in the antenna ‘keep out area’ on any layers of the host PCB. Also keep all mounting<br>hardware or any metal clear of the area (Refer to6.3.2) to reduce effects of proximity detuning the antenna and to<br>help antenna radiate properly.|
|---|---|
|**Note 2**|For the best on-board antenna performance, the module 453-00039 MUST be placed on the edge of the host<br>PCB and preferably in the edge centre and host PCB, the antenna “Keep Out Area” is extended (seeNote 4).|
|**Note 3**|BL653 development board has the 453-00039 placed on the edge of the PCB board (and not in corner) for that<br>the Antenna keep out area is extended down to the corner of the development board, see section_PCB Layout on_<br>_Host PCB for the 453-00039_,Figure 14. This was used for module development and antenna performance<br>evaluation.|
|**Note 4**|Ensure that there is no exposed copper under the module on the host PCB.|
|**Note 5**|You may modify the PCB land pattern dimensions based on their experience and/or process capability.|
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Laird Connectivity’s surface mount modules are designed to conform to all major manufacturing guidelines. This application note is intended to provide additional guidance beyond the information that is presented in the User Manual. This Application Note is considered a living document and will be updated as new information is presented.
The modules are designed to meet the needs of several commercial and industrial applications. They are easy to manufacture and conform to current automated manufacturing processes.
## 8.2 Shipping
_**Figure 15: Reel specifications**_
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## _**Figure 16: Tape specifications**_
There are 1,000 x BL653 modules taped in a reel (and packaged in a pizza box) and five boxes per carton (5000 modules per carton). Reel, boxes, and carton are labeled with the appropriate labels. See Carton Contents for more information.
## 8.2.2 Carton Contents
The following are the contents of the carton shipped for the BL653 modules.
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_**Figure 17: Carton contents for the BL653**_
## 8.2.5 Packaging Process
_**Figure 18: BL653 packaging process**_
## 8.2.4 Labeling
The following labels are located on the antistatic bag:
**==> picture [104 x 32] intentionally omitted <==**
**----- Start of picture text -----**<br>
M/N:453-00039<br>QTY:1000PCS<br>**----- End of picture text -----**<br>
_**Figure 19: Antistatic bag labels**_
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The following package label is located on both sides of the master carton:
**==> picture [154 x 33] intentionally omitted <==**
**----- Start of picture text -----**<br>
Figure 20: Master carton package label<br>The following is the packing slip label:<br>FROM SHIP TO:<br>**----- End of picture text -----**<br>
_**Figure 21: Packing slip label**_
## 8.3 Reflow Parameters
Prior to any reflow, it is important to ensure the modules were packaged to prevent moisture absorption. New packages contain desiccate (to absorb moisture) and a humidity indicator card to display the level maintained during storage and shipment. If directed to _bake units_ on the card, see Table 25 and follow instructions specified by IPC/JEDEC J-STD-033. A copy of this standard is available from the JEDEC website: http://www.jedec.org/sites/default/files/docs/jstd033b01.pdf
Any modules not manufactured before exceeding their floor life should be re-packaged with fresh desiccate and a new humidity indicator card. Floor life for MSL (Moisture Sensitivity Level) 4 devices is 72 hours in ambient environment 30°C/60%RH.
_**Table 25: Recommended baking times and temperatures**_
|**MSL**|**125°C**|**125°C**|**C**|**90°C/≤ 5%RH**|**90°C/≤ 5%RH**|**40°C/≤ 5%RH**|**40°C/≤ 5%RH**|
|---|---|---|---|---|---|---|---|
||**Baking Temp. **|||**Baking Temp. **||**Baking Temp. **||
||**Saturated**|**Floor Life Limit**||**Saturated**|**Saturated**<br>**Floor Life Limit**|**Saturated**|**Floor Life Limit**|
||**@**|**+ 72 hours**|**+ 72 hours**|**@**|**+ 72 hours**|**@ 30°C/85%**|**C/85%**<br>**+ 72 hours @**|
||**30°C/85%**|**@ 30**|**30°C/60%**|**30°C/85%**|**@ 30°C/60%**||**30°C/60%**|
|4|11 hours||7 hours|37 hours|23 hours|15 days|9 days|
Laird Connectivity surface mount modules are designed to be easily manufactured, including reflow soldering to a PCB. Ultimately it is the responsibility of the customer to choose the appropriate solder paste and to ensure oven temperatures during reflow meet the requirements of the solder paste. Laird Connectivity surface mount modules conform to J-STD-020D1 standards for reflow temperatures.
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**Important:** During reflow, modules should not be above 260° and not for more than 30 seconds. In addition, we recommend that the BL653 module **does not** go through the reflow process more than one time; otherwise the BL653 internal component soldering may be impacted.
_**Figure 22: Recommended reflow temperature**_
Temperatures should not exceed the minimums or maximums presented in Table 26.
_**Table 26: Recommended maximum and minimum temperatures**_
|**Specification**|**Value**|**Unit**|
|---|---|---|
|Temperature Inc./Dec. Rate (max)|1~3|°C / Sec|
|Temperature Decrease rate (goal)|2-4|°C / Sec|
|Soak Temp Increase rate (goal)|.5 - 1|°C / Sec|
|Flux Soak Period (Min)|70|Sec|
|Flux Soak Period (Max)|120|Sec|
|Flux Soak Temp (Min)|150|°C|
|Flux Soak Temp (max)|190|°C|
|Time Above Liquidous (max)|70|Sec|
|Time Above Liquidous (min)|50|Sec|
|Time In Target Reflow Range (goal)|30|Sec|
|Time At Absolute Peak (max)|5|Sec|
|Liquidous Temperature (SAC305)|218|°C|
|Lower Target Reflow Temperature|240|°C|
|Upper Target Reflow Temperature|250|°C|
|Absolute Peak Temperature|260|°C|
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~~ee~~ **Model US/FCC Canada/IC** 453-00039 SQGBL653 3147A-BL653 453-00041 SQGBL653 3147A-BL653
The 453-00039 and the 453-00041 hold full modular approvals. The OEM must follow the regulatory guidelines and warnings listed below to inherit the modular approval.
~~a~~ **Part # Form Factor Tx Outputs Antenna** 453-00039 Surface Mount 8 dBm PCB Trace 453-00041 Surface Mount 8 dBm IPEX MHF4
The BL653 family has been designed to operate with the antennas listed below with a maximum gain of 2 dBi. The required antenna impedance is 50 ohms.
**==> picture [503 x 182] intentionally omitted <==**
**----- Start of picture text -----**<br>
|||||||
|---|---|---|---|---|---|
|Peak Gain|
|Laird Connectivity|
|Manufacturer|Model|Type|Connector|
|Part Number|2400-2500 MHz|2400-2480 MHz|
|Laird|EBL2400A1-|IPEX|
|NanoBlue|PCB Dipole|2 dBi|-|
|Connectivity|10MH4L|MHF4|
|Laird|IPEX|
|FlexPIFA|001-0022|PCB Dipole|-|2 dBi|
|Connectivity|MHF4|
|IPEX|
|Mag.Layers|EDA-8709-2G4C1-B27-CY|0600-00057|Dipole|2 dBi|-|
|MHF4|
|Laird|EFA2400A3S-|IPEX|
|mFlexPIFA|PIFA|-|2 dBI|
|Connectivity|10MH4L|MHF4|
|Laird|
|Laird Connectivity NFC|0600-00061|NFC|N/A|-|-|
|Connectivity|
|Laird|
|BL653 PCB printed antenna|NA|Printed PCB|N/A|0 dBi|-|
|Connectivity|
**----- End of picture text -----**<br>
**Note:** The OEM is free to choose another vendor’s antenna of like type and equal or lesser gain as an antenna appearing in the table and still maintain compliance. Reference FCC Part 15.204(c)(4) for further information on this topic.
To reduce potential radio interference to other users, the antenna type and gain should be chosen so that the equivalent isotropic radiated power (EIRP) is not more than that permitted for successful communication.
## 9.2 Power Exposure Information
Federal Communication Commission (FCC) Radiation Exposure Statement:
This EUT complies with SAR for general population/uncontrolled exposure limits in FCC Part 1.1307, Part. 1310 and FCC KDB 447498 – RF Exposure Procedures and Equipment Authorization Policies for Mobile and Portable Devices.
This transceiver must not be co-located or operating in conjunction with any other antenna, transmitter, or external amplifiers. Further testing/evaluation of the end product will be required if the OEM’s device violates any of these requirements.
The BL653 is fully approved for mobile and portable applications.
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**WARNING:** The OEM must ensure that FCC labelling requirements are met. This includes a clearly visible label on the outside of the OEM enclosure specifying the appropriate Laird Connectivity FCC identifier for this product.
## **Contains FCC ID: SQGBL653**
If the size of the end product is larger than 8x10cm, then the following FCC part 15.19 statement must also be available on visible on outside of device:
_The enclosed device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) This device must accept any interference received, including interference that may cause undesired operation._
Label and text information should be in a size of type large enough to be readily legible, consistent with the dimensions of the equipment and the label. However, the type size for the text is not required to be larger than eight points.
**CAUTION** : The OEM should have their device which incorporates the BL653 tested by a qualified test house to verify compliance with FCC Part 15 Subpart B limits for unintentional radiators.
**CAUTION** : Any changes or modifications not expressly approved by Laird Connectivity could void the user’s authority to operate the equipment.
## 9.4 Federal Communication Commission Interference Statement
This equipment was tested and found compliant with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one of the following measures:
- Reorient or relocate the receiving antenna.
- Increase the separation between the equipment and receiver.
- Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
- Consult the dealer or an experienced radio/TV technician for help.
**FCC Caution:** Any changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment.
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
## **IMPORTANT NOTE:**
## **FCC Radiation Exposure Statement:**
This product complies with the US portable RF exposure limit set forth for an uncontrolled environment and is safe for intended operation as described in this manual. The further RF exposure reduction can be achieved if the product can be kept as far as possible from the user body or set the device to lower output power if such function is available.
Country Code selection feature to be disabled for products marketed to the US/CANADA.
This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with a minimum distance of 20 centimeters between the radiator and your body.
This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter.
## **Integration Instructions for Host Product Manufacturers**
**Applicable FCC rules for this module:** FCC Part 15.247
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## **Summarization of Specific Operational Use Conditions**
This device is intended only for OEM integrators under the following condition:
▪ The transmitter module may not be co-located with any other transmitter or antenna
As long as the condition above is met, further transmitter test is not required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed.
**IMPORTANT NOTE:** In the event that these conditions cannot be met (for example certain laptop configurations or co-location with another transmitter), then the FCC authorization is no longer considered valid and the FCC ID cannot be used on the final product. In these circumstances, the OEM integrator is responsible for reevaluating the end product (including the transmitter) and obtaining a separate FCC authorization. The OEM integrator must be aware not to provide information to the end user regarding how to install or remove this RF module in the user’s manual of the end product which integrates this module.
The end user manual shall include all required regulatory information/warning as shown in this manual.
## **Limited Module Procedures**
Not applicable
## **Trace Antenna Designs**
Not applicable
## **RF Exposure Considerations**
Co-located issue shall be met as mentioned in the _**Summarization of Specific Operational Use Conditions**_ section.
Product manufacturer shall provide the following text in the end-product manual:
## _**FCC Radiation Exposure Statement**_
This product complies with the US portable RF exposure limit set forth for an uncontrolled environment and is safe for intended operation as described in this manual. The further RF exposure reduction can be achieved if the product can be kept as far as possible from the user body or set the device to lower output power if such function is available.
A 20-centimer separation distance and co-located issues shall be met as mentioned in the in _**Summarization of Specific Operational Use Conditions**_ section.
The manufacturer shall provide the following text in the end-product manual:
_This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance of 20 centimeters between the radiator and your body._
## **Antennas**
|**Manufacturer**||**Model**|**Laird Part Number**|**Type**|**Connector**|**2400-**<br>**2500 MHz**|**2400-**<br>**2480 MHz**|
|---|---|---|---|---|---|---|---|
|Laird||NanoBlue|EBL2400A1-10MH4L|PCB<br>Dipole|IPEX MHF4|2 dBi||
|Laird||FlexPIFA|001-0022|PCB<br>Dipole|IPEX MHF4||2 dBi|
|Mag. Layers|EDA-8709-2G4C1-B27-CY||0600-00057|Dipole|IPEX MHF4|2 dBi||
|Laird||mFlexPIFA|EFA2400A3S-10MH4L|PIFA|IPEX MHF4||2 dBi|
|Laird||Laird NFC|0600-00061|NFC|N/A|||
|Laird|BL653-SA PCB printed antenna||N/A|Printed<br>PCB|N/A|1.28 dBi||
## **Label and Compliance Information**
Product manufacturers must provide a physical or e-label with the finished product that state the following:
## _**Contains FCC ID: SQGBL653**_
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© Copyright 2020 Laird Connectivity. All Rights Reserved
## **Information on Test Modes and Additional Testing Requirements**
Test tool: BleDtmRfTool shall be used to set the module to transmit continuously.
## **Additional Testing, Part 15 Subpart B Disclaimer**
The module is only FCC authorized for the specific rule parts listed on the grant, and that the host product manufacturer is responsible for compliance to any other FCC rules that apply to the host not covered by the modular transmitter grant of certification. The final host product still requires Part 15 Subpart B compliance testing with the modular transmitter installed.
## 9.5 Industry Canada Statement
This device contains licence-exempt transmitter(s)/receiver(s) that comply with Innovation, Science and Economic Development Canada’s licence-exempt RSS(s). Operation is subject to the following two conditions:
## (1) This device may not cause interference
(2) This device must accept any interference, including interference that may cause undesired operation of the device
_L’émetteur/récepteur exempt de licence contenu dans le présent appareil est conforme aux CNR d’Innovation, Sciences et Développement économique Canada applicables aux appareils radio exempts de licence. L’exploitation est autorisée aux deux conditions suivantes :_
## (1) _L’appareil ne doit pas produire de brouillage;_
(2) _L’appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d’en compromettre le fonctionnement._
This radio transmitter _(IC: 3147A-BL653)_ has been approved by Innovation, Science and Economic Development Canada to operate with the antenna types listed below, with the maximum permissible gain indicated. Antenna types not included in this list that have a gain greater than the maximum gain indicated for any type listed are strictly prohibited for use with this device.
Le présent émetteur radio (IC: 3147A-BL653) a été approuvé par Innovation, Sciences et Développement économique Canada pour fonctionner avec les types d'antenne énumérés ci-dessous et ayant un gain admissible maximal. Les types d'antenne non inclus dans cette liste, et dont le gain est supérieur au gain maximal indiqué pour tout type figurant sur la liste, sont strictement interdits pour l'exploitation de l'émetteur.
|**Manufacturer**|**Model**|**Laird Part Number**|**Type**|**Connector**|**2400-**<br>**2500 MHz**|**2400-**<br>**2480 MHz**|
|---|---|---|---|---|---|---|
|Laird|NanoBlue|EBL2400A1-10MH4L|PCB<br>Dipole|IPEX MHF4|2 dBi||
|Laird|FlexPIFA|001-0022|PCB<br>Dipole|IPEX MHF4||2 dBi|
|Mag. Layers|EDA-8709-2G4C1-B27-CY|0600-00057|Dipole|IPEX MHF4|2 dBi||
|Laird|mFlexPIFA|EFA2400A3S-10MH4L|PIFA|IPEX MHF4||2 dBi|
|Laird|Laird NFC|0600-00061|NFC|N/A|||
|Laird|BL653-SA PCB printed antenna|N/A|Printed<br>PCB|N/A|1.28 dBi||
## **Radiation Exposure Statement:**
This equipment complies with Canada radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20cm between the radiator & your body.
## **Déclaration d'exposition aux radiations:**
Cet équipement est conforme Canada limites d'exposition aux radiations dans un environnement non contrôlé. Cet équipement doit être installé et utilisé à distance minimum de 20cm entre le radiateur et votre corps.
This device is intended only for OEM integrators under the following condition:
## 1) The transmitter module may not be co-located with any other transmitter or antenna.
As long as the condition above is met, further transmitter test will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed.
Cet appareil est conçu uniquement pour les intégrateurs OEM dans les conditions suivantes:
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1) Le module émetteur peut ne pas être coïmplanté avec un autre émetteur ou antenne.
Tant que les 1 condition ci-dessus sont remplies, des essais supplémentaires sur l'émetteur ne seront pas nécessaires. Toutefois, l'intégrateur OEM est toujours responsable des essais sur son produit final pour toutes exigences de conformité supplémentaires requis pour ce module installé.
**IMPORTANT NOTE:** In the event that these conditions cannot be met (for example certain laptop configurations or colocation with another transmitter), then the Canada authorization is no longer considered valid and the IC ID cannot be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate Canada authorization.
**NOTE IMPORTANTE:** Dans le cas où ces conditions ne peuvent être satisfaites (par exemple pour certaines configurations d'ordinateur portable ou de certaines co-localisation avec un autre émetteur), l'autorisation du Canada n'est plus considéré comme valide et l'ID IC ne peut pas être utilisé sur le produit final. Dans ces circonstances, l'intégrateur OEM sera chargé de réévaluer le produit final (y compris l'émetteur) et l'obtention d'une autorisation distincte au Canada.
## **End Product Labeling**
The final end product must be labeled in a visible area with the following: “Contains IC:3147A-BL653.
## **Plaque signalétique du produit final**
Le produit final doit être étiqueté dans un endroit visible avec l'inscription suivante: "Contient des IC:3147A-BL653.
## **Manual Information to the End User**
The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the user’s manual of the end product which integrates this module.
The end user manual shall include all required regulatory information/warning as show in this manual.
## **Manuel d'information à l'utilisateur final**
L'intégrateur OEM doit être conscient de ne pas fournir des informations à l'utilisateur final quant à la façon d'installer ou de supprimer ce module RF dans le manuel de l'utilisateur du produit final qui intègre ce module.
Le manuel de l'utilisateur final doit inclure toutes les informations réglementaires requises et avertissements comme indiqué dans ce manuel.
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## 10 JAPAN CMIC) REGULATORY
The BL653 is approved for use in the Japanese market. The part numbers listed below hold WW type certification. Refer to **ARIB-STD-T66** for further guidance on OEM’s responsibilities.
~~es~~ **Model Certificate Number Antenna** 453-00039 201-180112 PCB Trace 453-00041 201-180112 IPEX MHF4
## 10.1 Antenna Information
The BL653 was tested with antennas listed below. The OEM can choose a different manufacturers antenna but must make sure it is of same type and that the gain is lesser than or equal to the antenna that is approved for use.
**==> picture [503 x 181] intentionally omitted <==**
**----- Start of picture text -----**<br>
|||||||
|---|---|---|---|---|---|
|Peak Gain|
|Laird Connectivity|
|Manufacturer|Model|Type|Connector|
|Part Number|2400-2500 MHz|2400-2480 MHz|
|Laird|EBL2400A1-|IPEX|
|NanoBlue|PCB Dipole|2 dBi|-|
|Connectivity|10MH4L|MHF4|
|Laird|IPEX|
|FlexPIFA|001-0022|PCB Dipole|-|2 dBi|
|Connectivity|MHF4|
|IPEX|
|Mag.Layers|EDA-8709-2G4C1-B27-CY|0600-00057|Dipole|2 dBi|-|
|MHF4|
|Laird|EFA2400A3S-|IPEX|
|mFlexPIFA|PIFA|-|2 dBI|
|Connectivity|10MH4L|MHF4|
|Laird|
|Laird Connectivity NFC|0600-00061|NFC|N/A|-|-|
|Connectivity|
|Laird|
|BL653 PCB printed antenna|NA|Printed PCB|N/A|0 dBi|-|
|Connectivity|
**----- End of picture text -----**<br>
## 11 CE REGULATORY
The 453-00039/453-00041 have been tested for compliance with relevant standards for the EU market. The 453-00041 module was tested with a 2 dBi antenna. The OEM can operate the 453-00041 module with any other type of antenna but must ensure that the gain does not exceed 2 dBi to maintain the Laird approval.
The OEM should consult with a qualified test house before entering their device into an EU member country to make sure all regulatory requirements have been met for their complete device.
Reference the Declaration of Conformities listed below for a full list of the standards that the modules were tested to. Test reports are available upon request.
The antennas listed below were tested for use with the BL653. For CE mark countries, the OEM is free to use any manufacturer’s antenna and type of antenna if the gain is less than or equal to the highest gain approved for use (2dBi ~~)~~ Contact a Laird Connectivity representative for more information regarding adding antennas.
**==> picture [496 x 96] intentionally omitted <==**
**----- Start of picture text -----**<br>
||||||||
|---|---|---|---|---|---|---|
|Peak Gain|
|Laird Connectivity|
|Manufacturer|Model|Type|Connector|
|Part Number|2400-2500 MHz|2400-2480 MHz|
|Laird|
|NanoBlue|EBL2400A1-10MH4L|PCB Dipole|IPEX MHF4|2 dBi|-|
|Connectivity|
|Laird|
|FlexPIFA|001-0022|PCB Dipole|IPEX MHF4|-|2 dBi|
|Connectivity|
|Mag.Layers|EDA-8709-2G4C1-B27-CY|0600-00057|Dipole|IPEX MHF4|2 dBi|-|
**----- End of picture text -----**<br>
https://www.lairdconnect.com/wirelessmodules/bluetooth-modules
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© Copyright 2020 Laird Connectivity. All Rights Reserved
**==> picture [496 x 106] intentionally omitted <==**
**----- Start of picture text -----**<br>
|||||||
|---|---|---|---|---|---|
|Peak Gain|
|Laird Connectivity|
|Manufacturer|Model|Type|Connector|
|Part Number|2400-2500 MHz|2400-2480 MHz|
|Laird|
|mFlexPIFA|EFA2400A3S-10MH4L|PIFA|IPEX MHF4|-|2 dBI|
|Connectivity|
|Laird|
|Laird Connectivity NFC|0600-00061|NFC|N/A|-|-|
|Connectivity|
|Laird|
|BL653 PCB printed antenna|NA|Printed PCB|N/A|0 dBi|-|
|Connectivity|
**----- End of picture text -----**<br>
**Note:** The BL653 module internal BLE chipset IC pins are rated 2 kV (ESD HBM). ESD can find its way through the external JTAG connector (if used on the customer’s design), if discharge is applied directly. Customer should ensure adequate protection against ESD on their end product design (using the BL653 module) to meet relevant ESD standard (for CE, this is EN301-489).
## 11.2 EU Declarations of Conformity
**==> picture [310 x 64] intentionally omitted <==**
**----- Start of picture text -----**<br>
|||
|---|---|
|Manufacturer|Laird Connectivity|
|Products|453-00039, 453-00041|
|Product Description|Bluetooth v5.1 + 802.15.4 + NFC|
|EU Directives|2014/53/EU – Radio Equipment Directive (RED)|
**----- End of picture text -----**<br>
Reference standards used for presumption of conformity:
**==> picture [509 x 116] intentionally omitted <==**
**----- Start of picture text -----**<br>
|||||
|---|---|---|---|
|Article Number|Requirement|Reference standard(s)|
|3.1a|Low voltage equipment safety|EN 60950-1:2006 +A11:2009 +A1:2010 +A12:2011 +A2:2013|
|RF Exposure|EN 62311:2008|
|EN 50385:2017|
|3.1b|Protection requirements –|EN 301 489-1 v2.2.0 (2017-03) (Draft)|
|Electromagnetic compatibility|EN 301 489-3 v2.1.1 (Draft)|
|EN 301 489-17 v3.2.0 (2017-03)|(Draft)|
|3.2|Means of the efficient use of the radio|EN 300 328 v2.1.1 (2016-11)|Wide-band transmission systems|
|frequency spectrum (ERM)|
|EN 300 330 v2.1.1 (2017-02)|Short Range Devices (SRD)|
**----- End of picture text -----**<br>
## **Declaration:**
We, Laird Connectivity, declare under our sole responsibility that the essential radio test suites have been carried out and that the above product to which this declaration relates is in conformity with all the applicable essential requirements of Article 3 of the EU Radio Equipment Directive 2014/53/EU, when used for its intended purpose.
The minimum distance between the user and/or any bystander and the radiating structure of the transmitter is 20 cm.
Place of Issue: Laird Connectivity W66N220 Commerce Court, Cedarburg, WI 53012 USA tel: +1-262-375-4400 fax: +1-262-364-2649 Date of Issue: Name of Authorized Person: Signature of Authorized Person:
https://www.lairdconnect.com/wirelessmodules/bluetooth-modules
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© Copyright 2020 Laird Connectivity. All Rights Reserved
## 12 ORDERING INFORMATION
|**Part Number**<br>453-00039R<br>~~a~~|**Part Number**<br>453-00039R<br>~~a~~|**Product Description**<br>BLE module (Nordic nRF52833) – Integrated antenna (Tape/Reel)|
|---|---|---|
||453-00041R|BLE module (Nordic nRF52833) – Tracepin (Tape/Reel)|
||453-00039C|BLE module(Nordic nRF52833)– Integrated antenna(Cut Tape)|
||453-00041C|BLE module(Nordic nRF52833)– Tracepin(Cut Tape)|
||453-00039-K1|Development Kit for Bluetooth +802.15.4 + NFC module – Integrated antenna|
||453-00041-K1|Development Kit for Bluetooth +802.15.4 + NFC module – Tracepin (External antenna)|
## 15 BLUETOOTH SIG QUALIFICATION
## 13.1 Overview
The BL653 module is listed on the Bluetooth SIG website as a qualified End Product.
|**Design**<br>**Name**|**Owner**|**Declaration ID**|**Declaration ID**|**QD ID**||**Link to listing on the SIG website**|
|---|---|---|---|---|---|---|
|BL653|Laird<br>Connectivity|D049591|D049591|147394||https://launchstudio.bluetooth.com/ListingDetails/104900|
It is a mandatory requirement of the Bluetooth Special Interest Group (SIG) that every product implementing Bluetooth technology has a Declaration ID. Every Bluetooth design is required to go through the qualification process, even when referencing a Bluetooth Design that already has its own Declaration ID. The Qualification Process requires each company to registered as a member of the Bluetooth SIG – www.bluetooth.org
The following link provides a link to the Bluetooth Registration page: https://www.bluetooth.org/login/register/
For each Bluetooth Design, it is necessary to purchase a Declaration ID. This can be done before starting the new qualification, either through invoicing or credit card payment. The fees for the Declaration ID will depend on your membership status, please refer to the following webpage:
https://www.bluetooth.org/en-us/test-qualification/qualification-overview/fees
For a detailed procedure of how to obtain a new Declaration ID for your design, please refer to the following SIG document:
https://www.bluetooth.org/DocMan/handlers/DownloadDoc.ashx?doc_id=283698&vId=317486
## 13.2 Qualification Steps When Referencing a Laird Connectivity End
To start a listing, go to: https://www.bluetooth.org/tpg/QLI_SDoc.cfm
In step 1, select the option, **Reference a Qualified Design** and enter D049591 in the End Product table entry. You can then select your pre-paid Declaration ID from the drop-down menu or go to the Purchase Declaration ID page, (please note that unless the Declaration ID is pre-paid or purchased with a credit card, it will not be possible to proceed until the SIG invoice is paid.
Once all the relevant sections of step 1 are finished, complete steps 2, 3, and 4 as described in the help document. Your new Design will be listed on the SIG website and you can print your Certificate and Declaration of Conformity.
For further information, please refer to the following training material:
https://www.bluetooth.org/en-us/test-qualification/qualification-overview/listing-process-updates
**Note** : If using the BL653 with Laird Connectivity Firmware and _smart_ BASIC script, you can skip “Controller Subsystem”, “Host Subsystem”, and “Profile Subsystem”.
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© Copyright 2020 Laird Connectivity. All Rights Reserved
## 13.3 Qualification Steps When Deviating from a Laird Connectivity End
If you wish to deviate from the standard End Product design listed under D0xxxxx, the qualification process follows the Traditional Project route, creating a new design. When creating a new design, it is necessary to complete the full qualification listing process and also maintain a compliance folder for the new design.
The BL653 design under D049591 incorporates the following components:
|Listing reference<br>Design Name<br>Core Spec Version<br>**D043345**<br>S140 Link Layer v7.0.1<br>5.1<br>~~es~~<br>Re|
|---|
|**D043346**<br>S140 Host Layer v7.0.1<br>5.1|
In the future, Nordic may list updated versions of these components and it is possible to use them in your new design. Please check with Nordic to make sure these software components are compatible with the nRF52833 hardware.
If your design is based on un-modified BL653 hardware it is possible use the following process;
1. Reference the existing RF-PHY test report from the BL653 listing.
2. Combine the relevant Nordic Link Layer (LL) – check QDID with Nordic.
3. Combine in a Host Component (covering L2CAP, GAP, ATT, GATT, SM) - check QDID with Nordic.
4. Test any standard SIG profiles that are supported in the design (customs profiles are exempt).
**==> picture [232 x 220] intentionally omitted <==**
**----- Start of picture text -----**<br>
End<br>Product<br>ieee |<br>Laird RF-PHY<br>I I<br>Nordic LL I<br>I [/-——J :I<br>I dh ;<br>Host<br>I I<br>I Layers<br>I<br>*<br>I I<br>I<br>I<br>Profiles<br>I<br>**----- End of picture text -----**<br>
_**Figure 23: Scope of the qualification for an End Product Design**_
The first step is to generate a project on the TPG (Test Plan Generator) system. This determines which test cases apply to demonstrate compliance with the Bluetooth Test Specifications. If you are combining pre-tested and qualified components in your design and they are within their three-year listing period, you are not required to re-test those layers covered by these components.
If the design incorporates any standard SIG LE profiles (such as Heart Rate Profile), it is necessary to test these profiles using PTS or other tools where permitted; the results are added to the compliance folder.
You are required to upload your test declaration and test reports (where applicable) and then complete the final listing steps on the SIG website. Remember to purchase your Declaration ID before you start the qualification process, as it’s impossible to complete the listing without it.
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© Copyright 2020 Laird Connectivity. All Rights Reserved
## 14 ADDITIONAL ASSISTANCE
Please contact your local sales representative or our support team for further assistance:
Laird Connectivity Support Centre: https://www.lairdconnect.com/resources/support Email: wireless.support@lairdconnectivity.com Phone: Americas: +1-800-492-2320 Europe: +44-1628-858-940 Hong Kong: +852 2923 0610 Web: https://www.lairdconnect.com/products
**Note:** Information contained in this document is subject to change.
© Copyright 2020 Laird Connectivity. All Rights Reserved. Patent pending. Any information furnished by Laird and its agents is believed to be accurate and reliable. All specifications are subject to change without notice. Responsibility for the use and application of Laird materials or products rests with the end user since Laird and its agents cannot be aware of all potential uses. Laird makes no warranties as to noninfringement nor as to the fitness, merchantability, or sustainability of any Laird materials or products for any specific or general uses. Laird Connectivity or any of its affiliates or agents shall not be liable for incidental or consequential damages of any kind. All Laird products are sold pursuant to the Laird Terms and Conditions of Sale in effect from time to time, a copy of which will be furnished upon request. Nothing herein provides a license under any Laird or any third-party intellectual property right.
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© Copyright 2020 Laird Connectivity. All Rights Reserved
Updated at June 5, 2026
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