2N7002L

## MOSFET – N-Channel, Small Signal, SOT-23 60 V, 115 mA ~~_~~ 2N7002L, 2V7002L 

## **Features** 

## **www.onsemi.com** 

- 2V Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable (2V7002L) 

|**V(BR)DSS**||**RDS(on) MAX**|**ID MAX**|
|---|---|---|---|
|60 V||7.5  @ 10 V,<br>500 mA|115 mA|
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|||**N−Channel**||
|||3||
||1|||
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|||2||



- These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 

## **MAXIMUM RATINGS** 

**Rating Symbol Value Unit** Drain−Source Voltage VDSS 60 Vdc Drain−Gate Voltage (RGS = 1.0 M ) VDGR 60 Vdc 1 Drain Current ID ± 115 mAdc − Continuous TC = 25 ° C (Note 1) ID ± 75 − Continuous TC = 100 ° C (Note 1) IDM ± 800 − Pulsed (Note 2) 2 Gate−Source Voltage − Continuous VGS ± 20 Vdc 3 **MARKING** − Non−repetitive (tp ≤ 50 s) VGSM ± 40 Vpk **DIAGRAM THERMAL CHARACTERISTICS** 1 2 702 M **Characteristic Symbol Max Unit SOT−23** ~~PLT~~ Total Device Dissipation FR−5 Board PD > **CASE 318** 1 oa (Note 3) TA = 25 ° C 225 mW **STYLE 21** Derate above 25 ° C 1.8 mW/ ° C Thermal Resistance, Junction−to−Ambient R JA 556 ° C/W 702 = Device Code ~~ae~~ M = Date Code* Total Device Dissipation PD = Pb−Free Package (Note 4) Alumina Substrate, TA = 25 ° C 300 mW (Note: Microdot may be in either location) Thermal Resistance, Junction−to−AmbientDerate above 25 ° C R JA 4172.4 mW/ ° C/W ° C *Date Code orientation and/or position mayvary depending upon manufacturing location. ~~ae~~ Junction and Storage Temperature TJ, Tstg −55 to ° C +150 ~~ee~~ **ORDERING INFORMATION** ~~ee ee~~ Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be **Device Package Shipping**[†] assumed, damage may occur and reliability may be affected. 

|**Device**|**Package**|**Shipping**[†]|
|---|---|---|
|2N7002LT1G|SOT−23<br>(Pb−Free)|3,000 Tape & Reel|
|2N7002LT3G||10,000 Tape & Reel|
|2N7002LT7G||3,500 Tape & Reel|
|2V7002LT1G|SOT−23<br>(Pb−Free)|3,000 Tape & Reel|
|2V7002LT3G||10,000 Tape & Reel|
|2N7002LT1H*||3,000 Tape & Reel|
|2N7002LT7H*||3,500 Tape & Reel|



1. The Power Dissipation of the package may result in a lower continuous drain current. 

2. Pulse Test: Pulse Width ≤ 300 s, Duty Cycle ≤ 2.0%. 

3. FR−5 = 1.0 x 0.75 x 0.062 in. 

4. Alumina = 0.4 x 0.3 x 0.025 in 99.5% alumina. 

- †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

- *Not for new design. 

Publication Order Number: 

**1** 

© Semiconductor Components Industries, LLC, 2013 **December, 2019 − Rev. 10** 

**2N7002L/D** 

**2N7002L, 2V7002L** 

## **ELECTRICAL CHARACTERISTICS** (TA = 25 ° C unless otherwise noted) 

|**ELECTRICAL CHARACTERISTICS **(TA= 25°C unless otherwise not|**ELECTRICAL CHARACTERISTICS **(TA= 25°C unless otherwise not|ed)|||||
|---|---|---|---|---|---|---|
|**Characteristic**||**Symbol**|**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**|||||||
|Drain−Source Breakdown Voltage<br>(VGS= 0, ID= 10�Adc)||V(BR)DSS|60|−|−|Vdc|
|Zero Gate Voltage Drain Current<br>TJ= 25°C<br>(VGS= 0, VDS= 60 Vdc)<br>TJ= 125°C||IDSS|−<br>−|−<br>−|1.0<br>500|�Adc|
|Gate−Body Leakage Current, Forward<br>(VGS= 20 Vdc)||IGSSF|−|−|100|nAdc|
|Gate−Body Leakage Current, Reverse<br>(VGS= −20 Vdc)||IGSSR|−|−|−100|nAdc|
|**ON CHARACTERISTICS**(Note 5)|||||||
|Gate Threshold Voltage<br>(VDS= VGS, ID= 250�Adc)||VGS(th)|1.0|−|2.5|Vdc|
|On−State Drain Current<br>(VDS ≥2.0 VDS(on), VGS= 10 Vdc)||ID(on)|500|−|−|mA|
|Static Drain−Source On−State Voltage<br>(VGS= 10 Vdc, ID= 500 mAdc)<br>(VGS= 5.0 Vdc, ID= 50 mAdc)||VDS(on)|−<br>−|−<br>−|3.75<br>0.375|Vdc|
|Static Drain−Source On−State Resistance<br>(VGS= 10 V, ID= 500 mAdc)<br>TC= 25°C<br>TC= 125°C<br>(VGS= 5.0 Vdc, ID= 50 mAdc)<br>TC= 25°C<br>TC= 125°C||rDS(on)|−<br>−<br>−<br>−|−<br>−<br>−<br>−|7.5<br>13.5<br>7.5<br>13.5|Ohms|
|Forward Transconductance<br>(VDS ≥2.0 VDS(on), ID= 200 mAdc)||gFS|80|−|−|mS|
|**DYNAMIC CHARACTERISTICS**|||||||
|Input Capacitance<br>(VDS= 25 Vdc, VGS= 0, f = 1.0 MHz)||Ciss|−|−|50|pF|
|Output Capacitance<br>(VDS= 25 Vdc, VGS= 0, f = 1.0 MHz)||Coss|−|−|25|pF|
|Reverse Transfer Capacitance<br>(VDS= 25 Vdc, VGS= 0, f = 1.0 MHz)||Crss|−|−|5.0|pF|
|**SWITCHING CHARACTERISTICS**(Note 5)|||||||
|Turn−On Delay Time|(VDD= 25 Vdc, ID �500 mAdc,<br>RG= 25�, RL= 50�, Vgen= 10 V)|td(on)|−|−|20|ns|
|Turn−Off Delay Time||td(off)|−|−|40|ns|
|**BODY−DRAIN DIODE RATINGS**|||||||
|Diode Forward On−Voltage<br>(IS= 115 mAdc, VGS= 0 V)||VSD|−|−|−1.5|Vdc|
|Source Current Continuous<br>(Body Diode)||IS|−|−|−115|mAdc|
|Source Current Pulsed||ISM|−|−|−800|mAdc|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 5. Pulse Test: Pulse Width ≤ 300 � s, Duty Cycle ≤ 2.0%. 

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**2** 

**2N7002L, 2V7002L** 

## **TYPICAL ELECTRICAL CHARACTERISTICS** 

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**----- Start of picture text -----**<br>
2.0 1.0<br>1.8 T A  = 25°C V DS  = 10 V -�55°C 25°C<br>1.6 V GS  = 10 V 0.8 125°C<br>1.4 9 V<br>1.2 0.6<br>8 V<br>1.0<br>7 V<br>0.8 0.4<br>6 V<br>0.6<br>5 V<br>0.4 0.2<br>0.2 4 V<br>3 V<br>0<br>0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10<br>VDS, DRAIN SOURCE VOLTAGE (VOLTS) VGS, GATE SOURCE VOLTAGE (VOLTS)<br>Figure 1. Ohmic Region Figure 2. Transfer Characteristics<br>2.4 1.2<br>2.2 1.05<br>2.0 VGS = 10 V 1.1 VDS = VGS<br>ID = 200 mA ID = 1.0 mA<br>1.8 1.10<br>1.6 1.0<br>1.4 0.95<br>1.2 0.9<br>1.0 0.85<br>0.8 0.8<br>0.6 0.75<br>0.4 0.7<br>-�60 -�20 +�20 +�60 +�100 +�140 -�60 -�20 +�20 +�60 +�100 +�140<br>T, TEMPERATURE (°C) T, TEMPERATURE (°C)<br>ID, DRAIN CURRENT (AMPS) ID, DRAIN CURRENT (AMPS)<br>(NORMALIZED)<br>VGS(th), THRESHOLD VOLTAGE (NORMALIZED)<br>rDS(on), STATIC DRAIN-SOURCE ON-RESISTANCE<br>**----- End of picture text -----**<br>


**Figure 3. Temperature versus Static Drain−Source On−Resistance** 

**Figure 4. Temperature versus Gate Threshold Voltage** 

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**3** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

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SOT−23 (TO−236)<br>CASE 318−08<br>ISSUE AS<br>2 DATE 30 JAN 2018<br>SCALE 4:1<br>D NOTES:<br>1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETERS.<br>3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH.<br>0.25 MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF<br>“a 3 t = THE BASE MATERIAL.<br>| E HE T 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,PROTRUSIONS, OR GATE BURRS.<br>1 2<br>MILLIMETERS INCHES<br>DIM MIN NOM MAX MIN NOM MAX<br>L A 0.89 1.00 1.11 0.035 0.039 0.044<br>3X b L1 A1b 0.010.37 0.060.44 0.100.50 0.0000.015 0.0020.017 0.0040.020<br>e VIEW C c 0.08 0.14 0.20 0.003 0.006 0.008<br>TOP VIEW D 2.80 2.90 3.04 0.110 0.114 0.120<br>E 1.20 1.30 1.40 0.047 0.051 0.055<br>e 1.78 1.90 2.04 0.070 0.075 0.080<br>L 0.30 0.43 0.55 0.012 0.017 0.022<br>A L1 0.35 0.54 0.69 0.014 0.021 0.027<br>H E 2.10 2.40 2.64 0.083 0.094 0.104<br>= T 0 ° −−− 10 ° 0 ° −−− 10 °<br>a A1 SIDE VIEW SEE VIEW C c<br>GENERIC<br>END VIEW<br>MARKING DIAGRAM*<br>RECOMMENDED<br>SOLDERING FOOTPRINT XXXM<br>1<br>2.90 i 0.903X XXX = Specific Device Code oo<br>M = Date Code<br>= Pb−Free Package<br>LO | cr ,<br>*This information is generic. Please refer to<br>3X 0.80 a) LL 0.95 device data sheet for actual part marking.<br>PITCH Pb−Free indicator, “G” or microdot “ ”, |<br>DIMENSIONS: MILLIMETERS may or may not be present.<br>STYLE 1 THRU 5: STYLE 6: STYLE 7: STYLE 8:<br>CANCELLED PIN 1. BASE PIN 1. EMITTER PIN 1. ANODE<br>2. EMITTER 2. BASE 2. NO CONNECTION<br>3. COLLECTOR 3. COLLECTOR 3. CATHODE<br>STYLE 9: STYLE 10: STYLE 11: STYLE 12: STYLE 13: STYLE 14:<br>PIN 1. ANODE PIN 1. DRAIN PIN 1. ANODE PIN 1. CATHODE PIN 1. SOURCE PIN 1. CATHODE<br>2. ANODE 2. SOURCE 2. CATHODE 2. CATHODE 2. DRAIN 2. GATE<br>3. CATHODE 3. GATE 3. CATHODE−ANODE 3. ANODE 3. GATE 3. ANODE<br>STYLE 15: STYLE 16: STYLE 17: STYLE 18: STYLE 19: STYLE 20:<br>PIN 1. GATE PIN 1. ANODE PIN 1. NO CONNECTION PIN 1. NO CONNECTION PIN 1. CATHODE PIN 1. CATHODE<br>2. CATHODE 2. CATHODE 2. ANODE 2. CATHODE 2. ANODE 2. ANODE<br>3. ANODE 3. CATHODE 3. CATHODE 3. ANODE 3. CATHODE−ANODE 3. GATE<br>STYLE 21: STYLE 22: STYLE 23: STYLE 24: STYLE 25: STYLE 26:<br>PIN 1. GATE PIN 1. RETURN PIN 1. ANODE PIN 1. GATE PIN 1. ANODE PIN 1. CATHODE<br>2. SOURCE 2. OUTPUT 2. ANODE  2. DRAIN  2. CATHODE  2. ANODE<br>3. DRAIN 3. INPUT 3. CATHODE  3. SOURCE  3. GATE  3. NO CONNECTION<br>STYLE 27: STYLE 28:<br>PIN 1. CATHODE PIN 1. ANODE<br> 2. CATHODE  2. ANODE<br> 3. CATHODE  3. ANODE<br>Electronic versions are uncontrolled except when accessed directly from the Document Repository.<br>DOCUMENT NUMBER: 98ASB42226B Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red.<br>DESCRIPTION: SOT−23 (TO−236) PAGE 1 OF 1<br>aes<br>ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.<br>ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding<br>the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically<br>disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the<br>rights of others.<br>**----- End of picture text -----**<br>


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