2N7002-G

## **2N7002** 

## **N-Channel Enhancement-Mode Vertical DMOS FET** 

## **Features** 

- Free from Secondary Breakdown 

- Low Power Drive Requirement 

- Ease of Paralleling 

- Low CISS and Fast Switching Speeds 

- Excellent Thermal Stability 

- Integral Source-Drain Diode 

- High Input Impedance and High Gain 

## **Applications** 

- Motor Controls 

- Converters 

- Amplifiers 

## **General Description** 

The 2N7002 is a low-threshold, Enhancement-mode (normally-off) transistor that uses a vertical DMOS structure and a well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally induced secondary breakdown. 

Microchip’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance and fast switching speeds are desired. 

- Switches 

- Power Supply Circuits 

- Drivers (Relays, Hammers, Solenoids, Lamps, Memories, Displays, Bipolar Transistors, etc.) 

## **Package Type** 

**==> picture [110 x 104] intentionally omitted <==**

**----- Start of picture text -----**<br>
3-lead SOT-23<br>(Top view)<br>DRAIN<br>SOURCE<br>GATE<br>**----- End of picture text -----**<br>


See Table 3-1 for pin information. 

DS20005797A-page  1 

 2018 Microchip Technology Inc. 

**2N7002** 

## **1.0 ELECTRICAL CHARACTERISTICS** 

## **Absolute Maximum Ratings†** 

Drain-to-Source Voltage ...................................................................................................................................... BVDSS Drain-to-Gate Voltage ......................................................................................................................................... BVDGS Gate-to-Source Voltage .........................................................................................................................................  ±30V Operating Ambient Temperature, TA ................................................................................................... –55°C to +150°C Storage Temperature, TS ..................................................................................................................... –55°C to +150°C 

**† Notice:** Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. 

## **DC ELECTRICAL CHARACTERISTICS** 

**Electrical Specifications:** TA = 25°C unless otherwise specified. ( **Note 1** ) 

|**DC ELECTRICAL CHARACTERISTICS**|**DC ELECTRICAL CHARACTERISTICS**|**DC ELECTRICAL CHARACTERISTICS**|**DC ELECTRICAL CHARACTERISTICS**|**DC ELECTRICAL CHARACTERISTICS**|**DC ELECTRICAL CHARACTERISTICS**|**DC ELECTRICAL CHARACTERISTICS**|
|---|---|---|---|---|---|---|
|**Electrical Specifications:**TA= 25°C unless otherwise specified.(**Note 1**)|||||||
|**Parameter**|**Sym.**|**Min.**|**Typ.**|**Max.**|**Unit**|**Conditions**|
|Drain-to-Source Breakdown Voltage|BVDSS|60|—|—|V|VGS= 0V, ID= 10µA|
|Gate Threshold Voltage|VGS(th)|1|—|2.5|V|VGS= VDS, ID= 250µA|
|Change in VGS(th)with Temperature|∆VGS(th)|—|—|–5.5|mV/°C|VGS= VDS, ID= 250 µA<br>(**Note 2**)|
|Gate BodyLeakage Current|IGSS|—|—|±100|nA|VGS= ±20V, VDS= 0V|
|Zero-Gate Voltage Drain Current|IDSS|—|—|1|µA|VGS= 0V, VDS= Maximum<br>Rating|
|||—|—|500||VGS= 0V, VDS= 0.8 Maximum<br>Rating, TA= 125°C(**Note 2**)|
|On-State Drain Current|ID(ON)|500|—|—|mA|VGS= 10V, VDS= 25V|
|Static Drain-to-Source On-State<br>Resistance|RDS(ON)|—|—|7.5|Ω|VGS= 5V, ID= 50 mA|
|||—|—|7.5||VGS= 10V, ID= 500 mA|
|Change in RDS(ON)with Temperature|∆RDS(ON)|—|—|1|%/°C|VGS= 10V, ID= 500 mA<br>(**Note 2**)|



**Note 1:** All DC parameters are 100% tested at 25°C unless otherwise stated. (Pulse test: 300 µs pulse, 2% duty cycle) 

- **2:** Specification is obtained by characterization and is not 100% tested. 

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**2N7002** 

## **AC ELECTRICAL CHARACTERISTICS** 

|**AC ELECTRICAL CHARACTERISTICS**|**AC ELECTRICAL CHARACTERISTICS**|**AC ELECTRICAL CHARACTERISTICS**|**AC ELECTRICAL CHARACTERISTICS**|**AC ELECTRICAL CHARACTERISTICS**|**AC ELECTRICAL CHARACTERISTICS**|**AC ELECTRICAL CHARACTERISTICS**|
|---|---|---|---|---|---|---|
||||||||
|**Electrical Specifications:**TA= 25°C unless otherwise specified.(**Note 2**)|||||||
|**Parameter**|**Sym.**|**Min.**|**Typ.**|**Max.**|**Unit**|**Conditions**|
|Forward Transconductance|GFS|80|—|—|mmho|VDS= 25V, ID= 500 mA|
|Input Capacitance|CISS|—|—|50|pF|VGS= 0V,<br>VDS= 25V,<br>f = 1 MHz|
|Common Source Output Capacitance|COSS|—|—|25|||
|Reverse Transfer Capacitance|CRSS|—|—|5|||
|Turn-On Time|t(ON)|—|—|20|ns|VDD= 30V,<br>ID= 200 mA,<br>RGEN= 25Ω|
|Turn-Off Time|t(OFF)|—|—|20|||
|**DIODE PARAMETER(Note 2)**|||||||
|Diode Forward Voltage Drop|VSD|—|1.2|—|V|VGS= 0V, ISD= 200 mA(**Note 1**)|
|Reverse RecoveryTime|trr|—|400|—|ns|VGS= 0V, ISD= 800 mA|



**Note 1:** All DC parameters are 100% tested at 25°C unless otherwise stated. (Pulse test: 300 µs pulse, 2% duty cycle) 

**2:** Specification is obtained by characterization and is not 100% tested. 

## **TEMPERATURE SPECIFICATIONS** 

|**Parameter**|**Sym.**|**Min.**|**Typ.**|**Max.**|**Unit**|**Conditions**|
|---|---|---|---|---|---|---|
|**TEMPERATURE RANGE**|||||||
|OperatingAmbient Temperature|TA|–55|—|+150|°C||
|Storage Temperature|TS|–55|—|+150|°C||
|**PACKAGE THERMAL RESISTANCE**|||||||
|3-lead SOT-23|JA|—|203|—|°C/W||



## **THERMAL CHARACTERISTICS** 

|**Package**|**ID (Note 1)**<br>**(Continuous)**<br>**(mA)**|**ID**<br>**(Pulsed)**<br>**(mA)**|**Power Dissipation at**<br>**TA = 25°C**<br>**(W)**|**IDR(Note 1)**<br>**(mA)**|**IDRM**<br>**(mA)**|
|---|---|---|---|---|---|
|3-lead SOT-23|115|800|0.36|115|800|



**Note 1:** ID (continuous) is limited by maximum TJ. 

DS20005797A-page  3 

 2018 Microchip Technology Inc. 

**2N7002** 

## **2.0 TYPICAL PERFORMANCE CURVES** 

**Note:** The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g. outside specified power supply range) and therefore outside the warranted range. 

**==> picture [216 x 540] intentionally omitted <==**

**----- Start of picture text -----**<br>
2.0<br>1.6 VGS = 10V<br>9V<br>1.2<br>8V<br>0.8<br>7V<br>6V<br>0.4<br>5V<br>4V<br>0 3V<br>0                  10                20                30                40                 50<br>VDS (volts)<br>FIGURE 2-1:  Output  Characteristics.<br>0.5<br>VDS = 25V<br>0.4<br>0.3  TA = -55 [O] C<br>25 [O] C<br>0.2 125 [O] C<br>0.1<br>0 0                 0.2               0.4               0.6               0.8                10<br>ID (amperes)<br>FIGURE 2-2: Transconductance vs. Drain<br>Current.<br>1.0<br>SOT-23 (pulsed)<br>SOT-23 (DC)<br>0.1<br>0.01<br> TA = 25 [O] C<br>0.001<br>0.1                            1.0                              10                            100<br> VDS (volts)<br>(amperes)<br>ID<br>(seimens)<br>FS<br>G<br>(amperes)<br>ID<br>**----- End of picture text -----**<br>


_**FIGURE 2-2:** Transconductance vs. Drain Current._ 

_**FIGURE 2-3:** Maximum Rated Safe Operating Area._ 

**==> picture [186 x 160] intentionally omitted <==**

**----- Start of picture text -----**<br>
2.0<br>1.6 VGS = 10V<br>9V<br>1.2<br>8V<br>0.8<br>7V<br>0.4 6V<br>5V<br>4V<br>0 3V<br>0                   2                  4                   6                  8                 10<br>VDS (volts)<br>(amperes)<br>ID<br>**----- End of picture text -----**<br>


## _**FIGURE 2-4:** Saturation Characteristics._ 

**==> picture [163 x 161] intentionally omitted <==**

**----- Start of picture text -----**<br>
0.5<br>0.4<br>0.3<br>SOT-23<br>0.2<br>0.1<br>0<br>0              25             50             75            100           125          150<br>TC ( [O] C)<br>(watts)<br>D<br>P<br>**----- End of picture text -----**<br>


_**FIGURE 2-5:** Power Dissipation vs. Case Temperature._ 

**==> picture [216 x 192] intentionally omitted <==**

**----- Start of picture text -----**<br>
1.0<br>0.8<br>0.6<br>0.4<br>SOT-23<br>TA = 25 [O] C<br>0.2 PD = 0.36W<br>0<br>0.001            0.01               0.1                 1.0                 10<br>tp (seconds)<br>FIGURE 2-6: Thermal Response<br>Characteristics.<br>Thermal Resistance (normalized)<br>**----- End of picture text -----**<br>


DS20005797A-page  4 

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**2N7002** 

**==> picture [468 x 361] intentionally omitted <==**

**----- Start of picture text -----**<br>
1.1 10<br>VGS = 5.0V<br>8<br>VGS = 10V<br>6<br>1.0<br>4<br>2<br>0.9-50                     0                    50                   100                  150 0 0               0.5              1.0              1.5               2.0              2.5<br>Tj ( [O] C) ID (amperes)<br>FIGURE 2-7: BVDSS Variation with  FIGURE 2-10: On-Resistance vs. Drain<br>Temperature. Current.<br>2.0 2.0<br>VDS = 25V<br>1.4<br>RDS(ON) @ 10V, 0.5A<br>1.6 1.6<br>1.2<br>1.2 1.2<br>1.0<br>0.8 0.8<br>VGS(th) @ 1.0mA<br>0.8<br>0.4 0.4<br>0.6<br>00                 2                 4                  6                 8                10 -50                     0                    50                   100                  1500<br>VGS (volts) Tj ( [O] C)<br>125OC<br>TA = -55OC<br>25OC<br> (ohms)<br> (normalized)<br>DSS DSS(ON)<br>BV R<br>(amperes) (normalized) (normalized)<br>ID<br>GS(th)  DS(ON)<br>V R<br>**----- End of picture text -----**<br>


_**FIGURE 2-8:** Transfer Characteristics._ 

**==> picture [164 x 162] intentionally omitted <==**

**----- Start of picture text -----**<br>
50<br>f = 1.0MHz<br>CISS<br>25<br>CRSS<br>0<br>0                     10                    20                    30                     40<br>VDS (volts)<br>COSS<br>C (picofarads)<br>**----- End of picture text -----**<br>


_**FIGURE 2-9:** Capacitance vs. Drain-to-Source Voltage._ 

_**FIGURE 2-11:** V and R GS(th) DS(ON) Variation with Temperature._ 

**==> picture [160 x 160] intentionally omitted <==**

**----- Start of picture text -----**<br>
10<br>VDS = 10V<br>8<br>90 pF<br>6<br>VDS = 40V<br>4<br>2<br>30 pF<br>0 0                0.2              0.4              0.6              0.8              1.0<br>QG (nanocoulombs)<br>(volts)<br>GS<br>V<br>**----- End of picture text -----**<br>


_**FIGURE 2-12:** Gate Drive Dynamic Characteristics._ 

DS20005797A-page  5 

 2018 Microchip Technology Inc. 

**2N7002** 

## **3.0 PIN DESCRIPTION** 

Table 3-1 shows the description of pins in 2N7002. Refer to **Package Type** for the location of pins. 

## **TABLE 3-1: PIN FUNCTION TABLE** 

|**Pin Number**|**Pin Name**|**Description**|
|---|---|---|
|1|Gate|Gate|
|2|Source|Source|
|3|Drain|Drain|



DS20005797A-page  6 

 2018 Microchip Technology Inc. 

**2N7002** 

## **4.0 FUNCTIONAL DESCRIPTION** 

Figure 4-1 illustrates the switching waveforms and test circuit for 2N7002. 

**==> picture [428 x 112] intentionally omitted <==**

**----- Start of picture text -----**<br>
10V 90%  VDD<br>INPUT 10% GeneratorPulse RL<br>0V OUTPUT<br>t t<br>(ON)  (OFF)  RGEN<br>td(ON)  tr  td(OFF) tf<br>VDD INPUT D.U.T.<br>10%  10%<br>OUTPUT<br>0V 90%  90%<br>**----- End of picture text -----**<br>


_**FIGURE 4-1:** Switching Waveforms and Test Circuit._ 

## **TABLE 4-1: PRODUCT SUMMARY** 

|**BVDSS/BVDGS**<br>**(V)**|**RDS(ON)**<br>**(Maximum)**<br>**(Ω)**|**ID(ON)**<br>**(Minimum)**<br>**(mA)**|
|---|---|---|
|60|7.5|500|



DS20005797A-page  7 

 2018 Microchip Technology Inc. 

**2N7002** 

## **5.0 PACKAGING INFORMATION** 

## **5.1 Package Marking Information** 

**==> picture [186 x 90] intentionally omitted <==**

**----- Start of picture text -----**<br>
3-lead SOT-23 Example<br>XXXNNN 702149<br>**----- End of picture text -----**<br>


**Legend:** XX...X Product Code or Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code e3 Pb-free JEDEC[®] designator for Matte Tin (Sn) ***** This package is Pb-free. The Pb-free JEDEC designator (     ) e3 can be found on the outer packaging for this package. **Note** : In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for product code or customer-specific information. Package may or not include the corporate logo. 

DS20005797A-page  8 

 2018 Microchip Technology Inc. 

**2N7002** 

## **3-Lead TO-236AB (SOT-23) Package Outline (K1/T)** 

## _**2.90x1.30mm body, 1.12mm height (max), 1.90mm pitch**_ 

**==> picture [361 x 243] intentionally omitted <==**

**----- Start of picture text -----**<br>
D<br>3<br>E1 E<br>0.25 Gauge<br>Plane<br>1 2 L Seating<br>Plane<br>L1<br>e b<br>e1<br>Top View View B<br>A View B<br>A2<br>A<br>Seating<br>Plane<br>A1<br>Side View A View A - A<br>**----- End of picture text -----**<br>


**Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.** 

|**Symbol**|**Symbol**|**A**|**A1**|**A2**|**b**|**D**|**E**|**E1**|**e**|**e1**|**L**|**L1**|**�**|
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|Dimension<br>(mm)|MIN|0.89|0.01|0.88|0.30|2.80|2.10|1.20|||0.20_†_||0O|
||NOM|-|-|0.95|-|2.90|-|1.30|0.9<br>BS|5<br>C<br>1.90<br>BSC|0.50|0.54<br>REF|-|
||MAX|1.12|0.10|1.02|0.50|3.04|2.64|1.40|||0.60||8O|
|_JEDEC Registration TO-236, Variation AB, Issue H, Jan._<br>_† This dimension differs from the JEDEC drawing._<br>**_Drawings not to scale._**|||||_1999._|||||||||



DS20005797A-page  9 

 2018 Microchip Technology Inc. 

**2N7002** 

## **NOTES:** 

DS20005797A-page  10 

 2018 Microchip Technology Inc. 

**2N7002** 

## **APPENDIX A: REVISION HISTORY** 

## **Revision A (September 2018)** 

- Converted Supertex Doc# DSFP-2N7002 to Microchip DS20005797A 

- Changed the package marking format 

- Added some sections to comply with standard Microchip Technology documentation format 

- Made minor text changes throughout the document 

DS20005797A-page  11 

 2018 Microchip Technology Inc. 

**2N7002** 

## **PRODUCT IDENTIFICATION SYSTEM** 

To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. 

||**PART NO.**|**XX**|**XX**||**-X**<br>|**-**|**X**||**Example:**||
|---|---|---|---|---|---|---|---|---|---|---|
||**Device**<br> <br>|**Package**<br> <br>**Options**|||**Environmental**<br>||**Media Type**||a)  2N7002-G:|N-Channel Enhancement-Mode<br>Vertical DMOS FET, 3-lead SOT-23,|
|||||||||||3000/Reel|
||Device:|2N7002||=|N-Channel Enhancement-Mode Vertical||||||
||||||DMOS FET||||||
||Package:|(blank)||=|3-lead SOT-23||||||
||Environmental:|G||=|Lead (Pb)-free/RoHS-compliant Package||||||
||Media Type:|(blank)||=|3000/Reel for an|SOT-23|Package||||
||||||||||||



DS20005797A-page  12 

 2018 Microchip Technology Inc. 

## **Note the following details of the code protection feature on Microchip devices:** 

- Microchip products meet the specification contained in their particular Microchip Data Sheet. 

- Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. 

- There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. 

- Microchip is willing to work with the customer who is concerned about the integrity of their code. 

- Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” 

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. 

Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE **.** Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. 

_Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC[®] MCUs and dsPIC[®] DSCs, KEELOQ[®] code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified._ 

## **QUALITY MANAGEMENT  SYSTEM** 

## **CERTIFIED BY DNV** 

## **Trademarks** 

The Microchip name and logo, the Microchip logo, AnyRate, AVR, AVR logo, AVR Freaks, BitCloud, chipKIT, chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, Kleer, LANCheck, LINK MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip Designer, QTouch, SAM-BA, SpyNIC, SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. 

ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. 

Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. 

GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. 

All other trademarks mentioned herein are property of their respective companies. 

- © 2018, Microchip Technology Incorporated, All Rights Reserved. ISBN: 978-1-5224-3477-1 

## == == **ISO/TS 16949** 

DS20005797A-page  13 

 2018 Microchip Technology Inc. 

## **Worldwide Sales and Service** 

## **AMERICAS** 

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**France - Paris** Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 

**Germany - Garching** Tel: 49-8931-9700 

**Germany - Haan** Tel: 49-2129-3766400 **Germany - Heilbronn** Tel: 49-7131-67-3636 

**Germany - Karlsruhe** Tel: 49-721-625370 

**Germany - Munich** Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 **Germany - Rosenheim** Tel: 49-8031-354-560 

**Israel - Ra’anana** Tel: 972-9-744-7705 

**Italy - Milan** Tel: 39-0331-742611 Fax: 39-0331-466781 

**Italy - Padova** Tel: 39-049-7625286 

**Netherlands - Drunen** Tel: 31-416-690399 Fax: 31-416-690340 

**Norway - Trondheim** Tel: 47-7288-4388 

**Poland - Warsaw** Tel: 48-22-3325737 

**Romania - Bucharest** Tel: 40-21-407-87-50 

**Spain - Madrid** Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 

**Sweden - Gothenberg** Tel: 46-31-704-60-40 

**Sweden - Stockholm** Tel: 46-8-5090-4654 

**UK - Wokingham** Tel: 44-118-921-5800 

Fax: 44-118-921-5820 

DS20005797A-page  14 

 2018 Microchip Technology Inc. 

08/15/18