# Power MOSFET, N Channel, 80 V, 10 A, 0.05 ohm, TO-220, Through Hole

![Product image](https://novapart.co/image/farnell:1739425/)

**URL**: https://novapart.co/products/VNP20N07-E/power-mosfet-n-channel-80-v-10-a-005-ohm-to-220
**SKU**: VNP20N07-E
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.4900
**Stock**: 200+
**Lead Time**: 106 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:10A; Drain Source Voltage Vds:80V; On Resistance Rds(on):0.05ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:3V; Power Di

## Specifications

| Parameter | Value |
|---|---|
| Msl | - |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 83W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-220 |
| Drain Source Voltage Vds | 80V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 10A |
| Drain Source On State Resistance | 0.05ohm |
| Gate Source Threshold Voltage Max | 3V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:1739425/)

## **VNP20N07** 

## "OMNIFET": FULLY AUTOPROTECTED POWER MOSFET 

|**TYPE**|**Vclamp**|**RDS(on)**|**Ilim**|
|---|---|---|---|
|VNP20N07|70 V|0.05Ω|20 A|



- I LINEAR CURRENT LIMITATION 

- I THERMAL SHUT DOWN 

- I SHORT CIRCUIT PROTECTION 

- I INTEGRATED CLAMP 

- I LOW CURRENT DRAWN FROM INPUT PIN 

- I DIAGNOSTIC FEEDBACK THROUGH INPUT PIN 

- I ESD PROTECTION 

- I DIRECT ACCESS TO THE GATE OF THE POWER MOSFET (ANALOG DRIVING) 

**==> picture [80 x 108] intentionally omitted <==**

**----- Start of picture text -----**<br>
3<br>2<br>1<br>TO-220<br>**----- End of picture text -----**<br>


- I COMPATIBLE WITH STANDARD POWER MOSFET 

- I STANDARD TO-220 PACKAGE 

## **DESCRIPTION** 

The VNP20N07 is a monolithic device made using STMicroelectronics  VIPower Technology, intended for replacement of standard power MOSFETS in DC to 50 KHz applications. Built-in thermal shut-down, linear current limi- 

tation and overvoltage  clamp protect the chip in harsh enviroments. 

Fault feedback can be detected by monitoring the voltage at the input pin. 

## **BLOCK DIAGRAM** 

**==> picture [290 x 195] intentionally omitted <==**

1/11 

March 2004 

**VNP20N07** 

## **ABSOLUTE MAXIMUM RATING** 

|**Symbol**|**Parameter**|**Parameter**|**Value**|**Value**|**Unit**|
|---|---|---|---|---|---|
|VDS|Drain-source Voltage (Vin= 0)||Internally Clamped||V|
|Vin|Input Voltage||18||V|
|ID|Drain Current||Internally Limited||A|
|IR|Reverse DC Output Current||-28||A|
|Vesd|Electrostatic Discharge (C= 100 pF, R=1.5 KΩ)||2000||V|
|Ptot|Total Dissipation at Tc= 25oC||83||W|
|Tj|Operating Junction Temperature||Internally Limited||oC|
|Tc|Case Operating Temperature||Internally Limited||oC|
|Tstg|Storage Temperature||-55 to 150||oC|
|**THERMAL  DATA**||||||
|Rthj-case<br>Rthj-amb||Thermal  Resistance  Junction-case                                Max<br>Thermal  Resistance  Junction-ambient                            Max||1.5<br>62.5|oC/W<br>oC/W|



## **ELECTRICAL  CHARACTERISTICS** (Tcase = 25[o] C unless otherwise specified) OFF 

|OFF|||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test Conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|VCLAMP|Drain-source Clamp<br>Voltage|ID= 200 mA    Vin= 0|60|70|80|V|
|VCLTH|Drain-source Clamp<br>Threshold Voltage|ID= 2 mA    Vin= 0|55|||V|
|VINCL|Input-Source Reverse<br>ClampVoltage|Iin= -1 mA|-1||-0.3|V|
|IDSS|Zero Input Voltage<br>Drain Current (Vin= 0)|VDS= 13 V   Vin= 0<br>VDS= 25 V   Vin= 0|||50<br>200|µA<br>µA|
|IISS|Supply Current from<br>Input Pin|VDS= 0 V    Vin= 10 V||250|500|µA|



## ON (∗) 

|**Symbol**|**Parameter**|**Test Conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|VIN(th)|Input Threshold<br>Voltage|VDS= VinID+ Iin= 1 mA|0.8||3|V|
|RDS(on)|Static Drain-source On<br>Resistance|Vin= 10 V   ID= 10 A<br>Vin= 5 V     ID= 10 A|||0.05<br>0.07|Ω<br>Ω|



## DYNAMIC 

|DYNAMIC|||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test Conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|gfs(∗)|Forward<br>Transconductance|VDS= 13 V     ID= 10 A|13|17||S|
|Coss|Output Capacitance|VDS= 13 V    f = 1 MHz    Vin= 0||500|800|pF|



2/11 

**VNP20N07** 

## **ELECTRICAL  CHARACTERISTICS** (continued) SWITCHING **(** ∗∗ **)** 

|SWITCHIN|G**(**∗∗**)**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test Conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|td(on)<br>tr<br>td(off)<br>tf|Turn-on Delay Time<br>Rise Time<br>Turn-off Delay Time<br>Fall Time|VDD= 15 V        Id= 10 A<br>Vgen= 10 V       Rgen= 10Ω<br>(see figure 3)||90<br>240<br>430<br>150|180<br>400<br>800<br>300|ns<br>ns<br>ns<br>ns|
|td(on)<br>tr<br>td(off)<br>tf|Turn-on Delay Time<br>Rise Time<br>Turn-off Delay Time<br>Fall Time|VDD= 15 V        Id= 10 A<br>Vgen= 10 V       Rgen= 1000Ω<br>(see figure 3)||800<br>1.5<br>6<br>3.5|1200<br>2.2<br>10<br>5.5|ns<br>µs<br>µs<br>µs|
|(di/dt)on|Turn-on Current Slope|VDD= 15 V      ID= 10 A<br>Vin= 10 V       Rgen= 10Ω||60||A/µs|
|Qi|Total Input Charge|VDD= 12 V    ID= 10 A    Vin= 10 V||60||nC|



## SOURCE DRAIN DIODE 

|**Symbol**|**Parameter**|**Test Conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|VSD(∗)|Forward On Voltage|ISD= 10 A    Vin= 0|||1.6|V|
|trr(∗∗)<br>Qrr(∗∗)<br>IRRM(∗∗)|Reverse Recovery<br>Time<br>Reverse Recovery<br>Charge<br>Reverse Recovery<br>Current|ISD= 10 A      di/dt = 100 A/µs<br>VDD= 30 V     Tj= 25oC<br>(see test circuit, figure 5)||165<br>0.55<br>6.5||ns<br>µC<br>A|



## PROTECTION 

|**Symbol**|**Parameter**|**Test Conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ilim|Drain Current Limit|Vin= 10 V    VDS= 13 V<br>Vin= 5 V      VDS= 13 V|14<br>14|20<br>20|28<br>28|A<br>A|
|tdlim(∗∗)|Step Response<br>Current Limit|Vin= 10 V<br>Vin= 5 V||29<br>70|60<br>140|µs<br>µs|
|Tjsh(∗∗)|Overtemperature<br>Shutdown||150|||oC|
|Tjrs(∗∗)|Overtemperature Reset||135|||oC|
|Igf(∗∗)|Fault Sink Current|Vin= 10 V<br>Vin= 5 V||50<br>20||mA<br>mA|
|Eas(∗∗)|Single Pulse<br>Avalanche Energy|starting Tj= 25oC     VDD= 20 V<br>Vin= 10 V   Rgen= 1 KΩL = 10 mH|0.95|||J|



(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % 

(∗∗) Parameters guaranteed by design/characterization 

3/11 

**VNP20N07** 

## **PROTECTION FEATURES** 

During normal operation, the Input pin is electrically connected to the gate of the internal power MOSFET. The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50 KHz. The only difference from the user’s standpoint is that a small DC current (Iiss) flows into the Input pin in order to supply the internal circuitry. 

The device integrates: 

- OVERVOLTAGE CLAMP PROTECTION: internally set at 70V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. 

- LINEAR CURRENT LIMITER CIRCUIT: limits the drain current Id to Ilim whatever the Input pin voltage. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh. 

- OVERTEMPERATURE AND SHORT CIRCUIT PROTECTION: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs at minimum 150[o] C. The device is automatically restarted when the chip temperature falls below 135[o] C. 

- STATUS FEEDBACK: In the case of an overtemperature fault condition, a Status Feedback is provided through the Input pin. The internal protection circuit disconnects the input from the gate and connects it instead to ground via an equivalent resistance of 100 Ω. The failure can be detected by monitoring the voltage at the Input pin, which will be close to ground potential. 

Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit  (with a small increase in RDS(on)). 

4/11 

**VNP20N07** 

## Thermal Impedance 

**==> picture [180 x 174] intentionally omitted <==**

Output Characteristics 

**==> picture [182 x 174] intentionally omitted <==**

Static Drain-Source On Resistance vs Input Voltage 

**==> picture [201 x 190] intentionally omitted <==**

Derating Curve 

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Transconductance 

**==> picture [184 x 174] intentionally omitted <==**

Static Drain-Source On Resistance 

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5/11 

**VNP20N07** 

Static Drain-Source On Resistance 

**==> picture [186 x 174] intentionally omitted <==**

Capacitance Variations 

**==> picture [190 x 174] intentionally omitted <==**

Normalized On Resistance vs Temperature 

**==> picture [190 x 174] intentionally omitted <==**

## Input Charge vs Input Voltage 

**==> picture [194 x 174] intentionally omitted <==**

Normalized Input Threshold Voltage vs Temperature 

**==> picture [190 x 174] intentionally omitted <==**

Normalized On Resistance vs Temperature 

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6/11 

**VNP20N07** 

Turn-on Current Slope 

**==> picture [196 x 174] intentionally omitted <==**

Turn-off Drain-Source Voltage Slope 

**==> picture [192 x 174] intentionally omitted <==**

Switching Time Resistive Load 

**==> picture [199 x 191] intentionally omitted <==**

Turn-on Current Slope 

**==> picture [195 x 174] intentionally omitted <==**

Turn-off Drain-Source Voltage Slope 

**==> picture [192 x 174] intentionally omitted <==**

Switching Time Resistive Load 

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7/11 

**VNP20N07** 

Switching Time Resistive Load 

**==> picture [182 x 174] intentionally omitted <==**

Step Response Current Limit 

**==> picture [188 x 174] intentionally omitted <==**

Current Limit vs Junction Temperature 

**==> picture [185 x 174] intentionally omitted <==**

Source Drain Diode Forward Characteristics 

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8/11 

**VNP20N07** 

**Fig. 1:** Unclamped Inductive Load Test Circuits 

**==> picture [209 x 143] intentionally omitted <==**

**Fig. 3:** Switching Times Test Circuits For Resistive Load 

**==> picture [198 x 90] intentionally omitted <==**

**Fig. 5:** Test Circuit For Inductive Load Switching And Diode Recovery Times 

**==> picture [209 x 113] intentionally omitted <==**

**Fig. 2:** Unclamped Inductive Waveforms 

**==> picture [184 x 151] intentionally omitted <==**

**Fig. 4:** Input Charge Test Circuit 

**==> picture [195 x 129] intentionally omitted <==**

**Fig. 6:** Waveforms 

**==> picture [209 x 104] intentionally omitted <==**

9/11 

**VNP20N07** 

||**TO-220 MECHANICAL DATA**|**TO-220 MECHANICAL DATA**|**TO-220 MECHANICAL DATA**|
|---|---|---|---|
|||||
|||||
|**DIM.**|**mm.**|||
||**MIN.**|**TYP**|**MAX.**|
|A|4.40||4.60|
|b|0.61||0.88|
|b1|1.15||1.70|
|c|0.49||0.70|
|D|15.25||15.75|
|E|10||10.40|
|e|2.40||2.70|
|e1|4.95||5.15|
|F|1.23||1.32|
|H1|6.20||6.60|
|J1|2.40||2.72|
|L|13||14|
|L1|3.50||3.93|
|L20||16.40||
|L30||28.90||
|∅P|3.75||3.85|
|Q|2.65||2.95|
|Package Weight|1.9Gr. (Typ.)|||



**==> picture [292 x 206] intentionally omitted <==**

10/11 

**VNP20N07** 

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 

-  2004 STMicroelectronics - Printed in ITALY- All Rights Reserved. 

## **STMicroelectronics GROUP OF COMPANIES** 

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**http://www.st.com** 

11/11 



## Links

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- [Supplier page](https://es.farnell.com/stmicroelectronics/vnp20n07-e/mosfet-omnifet-70v-20a-to-220/dp/1739425)
---

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