# Power MOSFET, N Channel, 45 V, 1.7 A, 0.25 ohm, SOT-223, Surface Mount

![Product image](https://novapart.co/image/farnell:2354522/)

**URL**: https://novapart.co/products/VNN1NV04PTR-E/power-mosfet-n-channel-45-v-17-a-025-ohm-sot-223
**SKU**: VNN1NV04PTR-E
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.4210
**Stock**: 1000+
**Lead Time**: 131 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:1.7A; Drain Source Voltage Vds:45V; On Resistance Rds(on):0.25ohm; Rds(on) Test Voltage Vgs:5V; Threshold Voltage Vgs:5

## Specifications

| Parameter | Value |
|---|---|
| Svhc | Lead (21-Jan-2025) |
| No. Of Pins | 4Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 7W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 5V |
| Transistor Case Style | SOT-223 |
| Drain Source Voltage Vds | 45V |
| Operating Temperature Max | - |
| Continuous Drain Current Id | 1.7A |
| Drain Source On State Resistance | 0.25ohm |
| Gate Source Threshold Voltage Max | 500mV |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2354522/)

**==> picture [61 x 39] intentionally omitted <==**

## **VNN1NV04P-E, VNS1NV04P-E** 

## OMNIFET II fully autoprotected Power MOSFET 

## **Features** 

|**Parameter**|**Symbol**|**Value**|
|---|---|---|
|Max on-state resistance (per ch.)|RON|250 m|
|Current limitation (typ)|ILIMH|1.7 A|
|Drain-source clamp voltage|VCLAMP|40 V|



**==> picture [146 x 59] intentionally omitted <==**

**----- Start of picture text -----**<br>
2<br>3<br>2<br>1<br>SOT-223 SO-8<br>**----- End of picture text -----**<br>


- Linear current limitation 

- Thermal shutdown 

- Short circuit protection 

- Integrated clamp 

- Low current drawn from input pin 

- Diagnostic feedback through input pin 

- ESD protection 

- Direct access to the gate of the Power MOSFET (analog driving) 

- Compatible with standard Power MOSFET 

## **Description** 

The VNN1NV04P-E, VNS1NV04P-E are monolithic devices designed in STMicroelectronics VIPower M0-3 Technology, intended for replacement of standard Power MOSFETs from DC up to 50 kHz applications. Built in thermal shutdown, linear current limitation and overvoltage clamp protect the chip in harsh environments. 

Fault feedback can be detected by monitoring the voltage at the input pin. 

## **Table 1. Device summary** 

|**Table 1.**|**Device summary**|**Device summary**|
|---|---|---|
|**Package**|**Order codes**||
||**Tube**|**Tape and reel**|
|SOT-223|VNN1NV04P-E|VNN1NV04PTR-E|
|SO-8|VNS1NV04P-E|VNS1NV04PTR-E|



September 2013 

1/28 

Doc ID 15586 Rev 3 

_www.st.com_ 

**Contents** 

**VNN1NV04P-E, VNS1NV04P-E** 

|**Contents**|**Contents**||
|---|---|---|
|**1**|**Block**|**diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5**|
|**2**|**Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6**||
||2.1|Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6|
||2.2|Thermal data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7|
||2.3|Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7|
||2.4|Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12|
|**3**|**Protection features  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16**||
|**4**|**Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17**||
||4.1|SOT-223 thermal data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17|
||4.2|SO-8 thermal data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19|
|**5**|**Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22**||
||5.1|SOT-223 mechanical data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22|
||5.2|SO8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23|
||5.3|SOT-223 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25|
||5.4|SO8 packing information  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26|
|**6**|**Revision history  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27**||



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**VNN1NV04P-E, VNS1NV04P-E** 

**List of tables** 

## **List of tables** 

|Table|1.|Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1|
|---|---|---|
|Table|2.|Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6|
|Table|3.|Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7|
|Table|4.|Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7|
|Table|5.|SOT-223 thermal parameter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18|
|Table|6.|SO-8 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20|
|Table|7.|SO-8 mechanical data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23|
|Table|8.|Document revision history  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27|



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**List of figures** 

**VNN1NV04P-E, VNS1NV04P-E** 

## **List of figures** 

|Figure|1.|Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5|
|---|---|---|
|Figure|2.|Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5|
|Figure|3.|Current and voltage conventions  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6|
|Figure|4.|Switching time test circuit for resistive load  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9|
|Figure|5.|Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10|
|Figure|6.|Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10|
|Figure|7.|Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11|
|Figure|8.|Unclamped inductive waveforms  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11|
|Figure|9.|Source-drain diode forward characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12|
|Figure|10.|Static drain-source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12|
|Figure|11.|Derating curve  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12|
|Figure|12.|Static drain-source on resistance vs input voltage (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . 12|
|Figure|13.|Static drain-source on resistance vs input voltage (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . 12|
|Figure|14.|Transconductance  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12|
|Figure|15.|Static drain-source on resistance vs Id. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13|
|Figure|16.|Transfer characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13|
|Figure|17.|Turn-on current slope (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13|
|Figure|18.|Turn-on current slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13|
|Figure|19.|Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13|
|Figure|20.|Turn-off drain source voltage slope (part 1/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13|
|Figure|21.|Turn-off drain-source voltage slope (part 2/2)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14|
|Figure|22.|Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14|
|Figure|23.|Switching time resistive load (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14|
|Figure|24.|Switching time resistive load (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14|
|Figure|25.|Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14|
|Figure|26.|Normalized on resistance vs temperature  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14|
|Figure|27.|Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15|
|Figure|28.|Normalized current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15|
|Figure|29.|Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15|
|Figure|30.|SOT-223 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17|
|Figure|31.|SOT-223 Rthj-amb vs PCB copper area in open box free air condition  . . . . . . . . . . . . . . 17|
|Figure|32.|SOT-223 thermal impedance junction ambient single pulse  . . . . . . . . . . . . . . . . . . . . . . . 18|
|Figure|33.|SOT-223 thermal fitting model of a single channel. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18|
|Figure|34.|SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19|
|Figure|35.|SO-8 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . 19|
|Figure|36.|SO-8 thermal impedance junction ambient single pulse  . . . . . . . . . . . . . . . . . . . . . . . . . . 20|
|Figure|37.|SO-8 thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20|
|Figure|38.|SOT-223 mechanical data and package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22|
|Figure|39.|SO-8 package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24|
|Figure|40.|SOT-223 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25|
|Figure|41.|SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26|
|Figure|42.|SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26|



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**VNN1NV04P-E, VNS1NV04P-E** 

**Block diagram and pin description** 

## **1 Block diagram and pin description** 

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**----- Start of picture text -----**<br>
Figure 1. Block diagram<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
DRAIN<br>2<br>Overvoltage<br>Clamp<br>INPUT<br>Gate<br>1 Control<br>Linear<br>Current<br>Over Limiter<br>Temperature<br>3<br>SOURCE<br>**----- End of picture text -----**<br>


## **Figure 2. Configuration diagram (top view)[(a)]** 

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**----- Start of picture text -----**<br>
SOURCE  1 8 DRAIN<br>SOURCE DRAIN<br>SOURCE  DRAIN<br>INPUT  4 5 DRAIN<br>**----- End of picture text -----**<br>


a. For the pins configuration related to SOT-223 see outline at page 1. 

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**Electrical specifications** 

**VNN1NV04P-E, VNS1NV04P-E** 

## **2 Electrical specifications** 

## **Figure 3. Current and voltage conventions** 

**==> picture [324 x 148] intentionally omitted <==**

**----- Start of picture text -----**<br>
ID<br>VDS<br>DRAIN<br>IIN RIN<br>INPUT<br>SOURCE<br>VIN<br>**----- End of picture text -----**<br>


## **2.1 Absolute maximum ratings** 

Stress values that exceed those listed in the “Absolute maximum ratings” table can cause permanent damage to the device. These are stress ratings only, and operation of the device at these, or any other conditions greater than those, indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics sure program and other relevant quality documents. 

**Table 2. Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Value**|**Unit**|
|---|---|---|---|---|
|||**SOT-223**|**SO-8**||
|VDSn|Drain-source voltage (VINn=0 V)|Internally clamped||V|
|VINn|Input voltage|Internally clamped||V|
|IINn|Input current|+/-20||mA|
|RIN MINn|Minimum input series impedance|330|||
|IDn|Drain current|Internally limited||A|
|IRn|Reverse DC output current|-3||A|
|VESD1|Electrostatic discharge (R=1.5 K, C=100 pF)|4000||V|
|VESD2|Electrostatic discharge on output pins only<br>(R=330, C=150 pF)|16500||V|
|Ptot|Total dissipation at Tc=25 °C|7|8.3|W|
|Tj|Operating junction temperature|Internally limited||°C|
|Tc|Case operating temperature|Internally limited||°C|
|Tstg|Storage temperature|-55 to 150||°C|



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**Electrical specifications** 

## **2.2 Thermal data** 

|**Thermal data**|**Thermal data**||||
|---|---|---|---|---|
|**Table 3.**<br>**Thermal data**|||||
|**Symbol**|**Parameter**|**Max value**||**Unit**|
|||**SOT-223**|**SO-8**||
|Rthj-case|Thermal resistance junction-case|18||°C/W|
|Rthj-lead|Thermal resistance junction-lead||15|°C/W|
|Rthj-amb|Thermal resistance junction-ambient|70(1)|65(1)|°C/W|



1. When mounted on a standard single-sided FR4 board with 50 mm[2] of Cu (at least 35 m thick) connected to all DRAIN pins 

## **2.3 Electrical characteristics** 

## **Table 4. Electrical characteristics** 

|**Table 4.**|**Electrical characteristics**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min**|**Typ**|**Max**|**Unit**|
|**Off (-40 °C<Tj<150 °C, unless otherwise specified)**|||||||
|VCLAMP|Drain-source clamp voltage|VIN=0 V; ID=0.5 A|40|45|55|V|
|VCLTH|Drain-source clamp threshold<br>voltage|VIN=0 V; ID=2 mA|36|||V|
|VINTH|Input threshold voltage|VDS=VIN; ID=1 mA|0.5||2.5|V|
|IISS|Supply current from input pin|VDS=0 V; VIN=5 V||100|150|µA|
|VINCL|Input-source clamp<br>voltage|IIN=1 mA<br>IIN=-1 mA|6<br>-1.0|6.8|8<br>-0.3|V|
|IDSS|Zero input voltage drain<br>current (VIN=0 V)|VDS=13 V; VIN=0 V; Tj=25 °C<br>VDS=25 V; VIN=0 V|||30<br>75|µA|
|**On (-40 °C<Tj<150 °C, unless otherwise specified)**|||||||
|RDS(on)|Static drain-source on<br>resistance|VIN=5 V; ID=0.5 A; Tj=25 °C<br>VIN=5 V; ID=0.5 A|||250<br>500|m|
|**Dynamic (Tj=25 °C, unless otherwise specified)**|||||||
|gfs (1)|Forward transconductance|VDD=13 V; ID=0.5 A||2||S|
|COSS|Output capacitance|VDS=13 V; f=1 MHz; VIN=0 V||90||pF|
|**Switching (Tj=25 °C, unless otherwise specified)**|||||||
|td(on)|Turn-on delay time|VDD=15 V; ID=0.5 A<br>Vgen=5 V; Rgen=RIN MIN=330<br>(see_Figure 4_)||70|200|ns|
|tr|Rise time|||170|500|ns|
|td(off)|Turn-off delay time|||350|1000|ns|
|tf|Fall time|||200|600|ns|



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**Electrical specifications** 

**VNN1NV04P-E, VNS1NV04P-E** 

**Table 4. Electrical characteristics (continued)** 

|**Symbol**|**Parameter**|**Test conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delay time|VDD=15 V; ID=0.5 A<br>Vgen=5 V; Rgen=2.2 K<br>(see_Figure 4_)||0.25|1.0|µs|
|tr|Rise time|||1.3|4.0|µs|
|td(off)|Turn-off delay time|||1.8|5.5|µs|
|tf|Fall time|||1.2|4.0|µs|
|(dI/dt)on|Turn-on current slope|VDD=15 V; ID=1.5 A<br>Vgen=5 V; Rgen=RIN MIN=330||5||A/µs|
|Qi|Total input charge|VDD=12 V; ID=0.5 A; VIN=5 V<br>Igen=2.13 mA (see_Figure 7_)||5||nC|
|**Source drain diode (Tj=25 °C, unless otherwise specified)**|||||||
|VSD<br>(1)|Forward on voltage|ISD=0.5 A; VIN=0 V||0.8||V|
|trr|Reverse recovery time|ISD=0.5 A; dI/dt=6 A/µs<br>VDD=30 V; L=200 µH<br>(see_Figure 5_)||205||ns|
|Qrr|Reverse recovery charge|||100||nC|
|IRRM|Reverse recovery current|||0.7||A|
|**Protections (-40 °C<Tj<150 °C, unless otherwise specified)**|||||||
|Ilim|Drain current limit|VIN=5 V; VDS=13 V|1.7||3.5|A|
|tdlim|Step response current limit|VIN=5 V; VDS=13 V||2.0||µs|
|Tjsh|Over temperature shutdown||150|175|200|°C|
|Tjrs|Over temperature reset||135|||°C|
|Igf|Fault sink current|VIN=5 V; VDS=13 V; Tj=Tjsh|10|15|20|mA|
|Eas|Single pulse avalanche energy|Starting Tj=25 °C; VDD=24 V<br>VIN=5 V Rgen=RIN MIN=330<br>L=50 mH<br>(see_Figure 6_and _Figure 8_)|55|||mJ|



1. Pulsed: pulse duration = 300 µs, duty cycle 1.5 % 

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**VNN1NV04P-E, VNS1NV04P-E** 

**Electrical specifications** 

## **Figure 4. Switching time test circuit for resistive load** 

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**----- Start of picture text -----**<br>
VD<br>Rgen<br>Vgen<br>ID<br>90%<br>tr 10% tf<br>t<br>V td(on) td(off)<br>gen<br>t<br>**----- End of picture text -----**<br>


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**Electrical specifications** 

**VNN1NV04P-E, VNS1NV04P-E** 

## **Figure 5. Test circuit for diode recovery times** 

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**----- Start of picture text -----**<br>
A<br>A<br>D<br>I FAST<br>L=100uH<br>OMNIFET DIODE<br>S B<br>B<br>330<br>D<br>R VDD<br>gen<br>I<br>OMNIFET<br>V<br>gen<br>S<br>8.5 <br>**----- End of picture text -----**<br>


## **Figure 6. Unclamped inductive load test circuits** 

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**----- Start of picture text -----**<br>
RGEN<br>VIN<br>P W<br>**----- End of picture text -----**<br>


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Doc ID 15586 Rev 3 

**VNN1NV04P-E, VNS1NV04P-E** 

**Electrical specifications** 

## **Figure 7. Input charge test circuit** 

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**----- Start of picture text -----**<br>
V IN GEN 0 |<br>1 { 7]<br>—<br>|<br>ND8003<br>**----- End of picture text -----**<br>


## **Figure 8. Unclamped inductive waveforms** 

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**Electrical specifications** 

**VNN1NV04P-E, VNS1NV04P-E** 

## **2.4 Electrical characteristics curves** 

**Figure 9. Source-drain diode forward Figure 10. Static drain-source on resistance characteristics** 

**==> picture [388 x 155] intentionally omitted <==**

**----- Start of picture text -----**<br>
Vsd (mV) Rds(on) (ohms)<br>1000 4.5<br>Tj=-40ºC<br>4<br>950 Vin=2.5V<br>3.5<br>Vin=0V<br>900 3<br>2.5<br>850<br>2<br>800 1.5<br>Tj=25ºC<br>1<br>750 Tj=150ºC<br>0.5<br>700 0<br>0 2 4 6 8 10 12 14 0 0.05 0.1 0.15 0.2 0.25 0.3<br>Id (A) Id(A)<br>**----- End of picture text -----**<br>


## **Figure 11. Derating curve** 

## **Figure 12. Static drain-source on resistance vs input voltage (part 1/2)** 

**==> picture [157 x 152] intentionally omitted <==**

**----- Start of picture text -----**<br>
Rds(on) (mohms)<br>500<br>450<br>Id=0.5A<br>400<br>Tj=150ºC<br>350<br>300<br>250<br>200<br>ee Tj=25ºC<br>150<br>100 ee Tj=-40ºC<br>50<br>0<br>3 3.5 4 4.5 5 5.5 6 6.5 7<br>Vin(V)<br>**----- End of picture text -----**<br>


**Figure 13. Static drain-source on resistance vs input voltage (part 2/2)** 

**Figure 14. Transconductance** 

**==> picture [384 x 158] intentionally omitted <==**

**----- Start of picture text -----**<br>
Rds(on) (mohms) Gfs (S)<br>500 6<br>Tj=150ºC<br>450 5.5<br>Vds=13V Tj=-40ºC<br>400 5<br>Id=1.5A Tj=25ºC<br>350 Id=1A 4.5<br>4 Tj=150ºC<br>300 3.5<br>250 Tj=25ºC 3<br>200 Id=1.5A 2.5<br>Tj=-40ºC Id=1A 2<br>150<br>Id=1.5A 1.5<br>100 Id=1A 1<br>50 0.5<br>0 0<br>3 3.5 4 4.5 5 5.5 6 6.5 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2<br>Vin(V) Id(A)<br>**----- End of picture text -----**<br>


12/28 

Doc ID 15586 Rev 3 

**VNN1NV04P-E, VNS1NV04P-E** 

**Electrical specifications** 

## **Figure 15. Static drain-source on resistance Figure 16. Transfer characteristics vs Id** 

**==> picture [462 x 180] intentionally omitted <==**

**----- Start of picture text -----**<br>
Rds(on) (mohms) Idon(A)<br>500 2.25<br>450 Vin=3.5V 2 Tj=25ºC<br>400 Tj=150ºC Vin=5V 1.75 Vds=13.5V<br>350<br>1.5<br>300<br>1.25<br>250<br>Vin=3.5V 1<br>200150 Tj=25ºC Vin=3.5VVin=5V 0.75 Tj=150ºC Tj=-40ºC<br>Tj=-40ºC<br>Vin=5V 0.5<br>100<br>0.25<br>50<br>0 0<br>0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 1.5 2 2.5 3 3.5 4 4.5 5<br>1.75 2.25 2.75 3.25 3.75 4.25 4.75<br>Id(A)<br>Vin(V)<br>**----- End of picture text -----**<br>


**Figure 17. Turn-on current slope (part 1/2)** 

**Figure 18. Turn-on current slope (part 2/2)** 

**==> picture [462 x 187] intentionally omitted <==**

**----- Start of picture text -----**<br>
di/dt(A/us) di/dt(A/us)<br>6 1.4<br>5 Vin=5V 1.2 Vin=3.5V<br>Vdd=15V Vdd=15V<br>4 Id=1.5A 1 Id=1.5A<br>3 0.8<br>2 0.6<br>1 0.4<br>0 0.2<br>0 500 1000 1500 2000 2500 0 500 1000 1500 2000 2500<br>Rg(ohm) Rg(ohm)<br>**----- End of picture text -----**<br>


**Figure 19. Input voltage vs input charge** 

**Figure 20. Turn-off drain source voltage slope (part 1/2)** 

**==> picture [462 x 186] intentionally omitted <==**

**----- Start of picture text -----**<br>
Vin (V) dv/dt(V/us)<br>6 350<br>300<br>5<br>Vds=12V Vin=5V<br>Id=0.5A 250 Vdd=15V<br>4 Id=0.5A<br>200<br>3<br>150<br>2<br>100<br>1<br>50<br>0<br>0<br>0 1 2 3 4 5 6<br>0 500 1000 1500 2000 2500<br>Qg (nC)<br>Rg(ohm)<br>**----- End of picture text -----**<br>


13/28 

Doc ID 15586 Rev 3 

**Electrical specifications** 

**VNN1NV04P-E, VNS1NV04P-E** 

## **Figure 21. Turn-off drain-source voltage slope Figure 22. Capacitance variations (part 2/2)** 

**==> picture [462 x 388] intentionally omitted <==**

**----- Start of picture text -----**<br>
dv/dt(V/us) C(pF)<br>350 225<br>300 200 f=1MHz<br>Vin=3.5V Vin=0V<br>250 Vdd=15V 175<br>Id=0.5A<br>200 150<br>150 125<br>100 100<br>50 75<br>0 50<br>0 500 1000 1500 2000 2500 0 5 10 15 20 25 30 35<br>Rg(ohm) Vds(V)<br>Figure 23. Switching time resistive load  Figure 24. Switching time resistive load<br>(part 1/2) (part 2/2)<br>t(ns)<br>t(us) 550<br>2<br>500<br>1.751.5 Vdd=15V Id=0.5A td(off) 450400 tr RgVdd=15V Id=0.5A =330ohm<br>Vin=5V tr 350<br>1.25 td(off)<br>300<br>1 tf<br>250<br>tf<br>0.75 200<br>0.5 150<br>td(on) 100 td(on)<br>0.25<br>50<br>0 0<br>0 250 500 750 1000 1250 1500 1750 2000 2250 2500 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25<br>Rg(ohm) Vin(V)<br>**----- End of picture text -----**<br>


## **Figure 25. Output characteristics** 

## **Figure 26. Normalized on resistance vs temperature** 

**==> picture [462 x 183] intentionally omitted <==**

**----- Start of picture text -----**<br>
ID(A) Rds(on) (mOhm)<br>2.4 2.25<br>2.2 Vin=5.5V<br>2 Vin=4.5V 2   Vin=5V<br>1.8 Vin=3.5V 1.75 Id=0.5A<br>1.6<br>1.4 1.5<br>1.2<br>1.25<br>1<br>0.8<br>1<br>0.6<br>0.4 Vin=3V 0.75<br>0.2<br>0 0.5<br>0 1 2 3 4 5 6 7 8 9 10 11 12 -50 -25 0 25 50 75 100 125 150 175<br>VDS(V) Tc (ºC)<br>**----- End of picture text -----**<br>


14/28 

Doc ID 15586 Rev 3 

**VNN1NV04P-E, VNS1NV04P-E** 

**Electrical specifications** 

## **Figure 27. Normalized input threshold voltage Figure 28. Normalized current limit vs junction vs temperature temperature** 

**==> picture [462 x 195] intentionally omitted <==**

**----- Start of picture text -----**<br>
Vinth (V)<br>Ilim (A)<br>2<br>5<br>1.8<br>4.5<br>1.6 VdsId=1mA=Vin 4 Vds=13VVin=5V<br>1.4 3.5<br>1.2 3<br>1 2.5<br>0.8 2<br>0.6 1.5<br>0.4 1<br>0.2 0.5<br>0 0<br>-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175<br>Tc (ºC) Tc (ºC)<br>**----- End of picture text -----**<br>


## **Figure 29. Step response current limit** 

**==> picture [199 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
Tdlim(us)<br>2.4<br>2.3<br>Vin=5V<br>Rg=330ohm<br>2.2<br>2.1<br>2<br>1.9<br>5 10 15 20 25 30 35<br>Vdd(V)<br>**----- End of picture text -----**<br>


15/28 

Doc ID 15586 Rev 3 

**Protection features** 

**VNN1NV04P-E, VNS1NV04P-E** 

## **3 Protection features** 

During normal operation, the input pin is electrically connected to the gate of the internal Power MOSFET through a low impedance path. 

The device then behaves like a standard Power MOSFET and can be used as a switch from DC up to 50 kHz. The only difference from the user’s standpoint is that a small DC current IISS (typ. 100 µA) flows into the input pin in order to supply the internal circuitry. 

The device integrates: 

- ? Overvoltage clamp protection: internally set at 45 V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. 

- ? Linear current limiter circuit: limits the drain current ID to Ilim whatever the input pin voltages. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the over temperature threshold Tjsh. 

- ? Over temperature and short circuit protection: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Over temperature cutout occurs in the range 150 to 190 °C, a typical value being 170 °C. The device is automatically restarted when the chip temperature falls of about 15 °C below shutdown temperature. 

- ? Status feedback: in the case of an over temperature fault condition (Tj > Tjsh), the device tries to sink a diagnostic current Igf through the input pin in order to indicate fault condition. If driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. If the drive impedance is high enough so that the input pin driver is not able to supply the current Igf, the input pin will fall to 0 V. This will not however affect the device operation: no requirement is put on the current capability of the input pin driver except to be able to supply the normal operation drive current IISS. 

Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL logic circuit. 

16/28 

Doc ID 15586 Rev 3 

**VNN1NV04P-E, VNS1NV04P-E** 

**Package and PCB thermal data** 

## **4 Package and PCB thermal data** 

## **4.1 SOT-223 thermal data** 

## **Figure 30. SOT-223 PC board** 

**==> picture [5 x 2] intentionally omitted <==**

**----- Start of picture text -----**<br>
.<br>**----- End of picture text -----**<br>


_Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm,PCB thickness = 2 mm, Cu thickness=35 µm, Copper areas: from minimum pad layout to 0.8 cm[2] )._ 

## **Figure 31. SOT-223 Rthj-amb vs PCB copper area in open box free air condition** 

**==> picture [380 x 241] intentionally omitted <==**

**----- Start of picture text -----**<br>
140<br>footprint<br>130<br>120<br>110<br>100<br>90<br>80<br>70<br>60<br>0 0,5 1 1,5 2 2,5<br>PCB Cu heatsink area (cm^ 2) -  (refer to PCB layout)<br>**----- End of picture text -----**<br>


17/28 

Doc ID 15586 Rev 3 

**Package and PCB thermal data** 

**VNN1NV04P-E, VNS1NV04P-E** 

## **Figure 32. SOT-223 thermal impedance junction ambient single pulse** 

**==> picture [384 x 219] intentionally omitted <==**

**----- Start of picture text -----**<br>
ZTH (°C/ W)<br>1000<br>Footprint<br>100<br>2 cm [2]<br>10<br>1<br>0,1<br>0,0001 0,001 0,01 0,1 1 10 100 1000<br>Time (s)<br>**----- End of picture text -----**<br>


## **Equation 1: pulse calculation formula** 

ZTH = RTH   + ZTHtp1 –  where  = tP/T 

**Figure 33. SOT-223 thermal fitting model of a single channel** 

## **Table 5. SOT-223 thermal parameter** 

|**Area/island (cm2)**|**FP**|**2**|
|---|---|---|
|R1 (°C/W)|0.8||
|R2 (°C/W)|1.6||
|R3 (°C/W)|4.5||
|R4 (°C/W)|24||
|R5 (°C/W)|0.1||
|R6 (°C/W)|100|45|



18/28 

Doc ID 15586 Rev 3 

**VNN1NV04P-E, VNS1NV04P-E** 

**Package and PCB thermal data** 

|**Area/island (cm2)**|**FP**|**2**|
|---|---|---|
|C1 (W·s/°C)|0.00006||
|C2 (W·s/°C)|0.0005||
|C3 (W·s/°C)|0.03||
|C4 (W·s/°C)|0.16||
|C5 (W·s/°C)|1000||
|C6 (W·s/°C)|0.5|2|



## **4.2 SO-8 thermal data** 

**Figure 34. SO-8 PC board** 

_Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm,PCB thickness = 2 mm, Cu thickness=35 µm, Copper areas: from minimum pad layout to 2 cm[2] )._ 

## **Figure 35. SO-8 Rthj-amb vs PCB copper area in open box free air condition** 

**==> picture [360 x 230] intentionally omitted <==**

**----- Start of picture text -----**<br>
105<br>footprint<br>95<br>85<br>75<br>65<br>0 0,5 1 1,5 2 2,5<br>PCB Cu heatsink area (cm^ 2) -  (refer to PCB layout)<br>**----- End of picture text -----**<br>


Doc ID 15586 Rev 3 19/28 ~~a~~ 

**Package and PCB thermal data** 

**VNN1NV04P-E, VNS1NV04P-E** 

**Figure 36. SO-8 thermal impedance junction ambient single pulse** 

**==> picture [377 x 230] intentionally omitted <==**

**----- Start of picture text -----**<br>
ZTH (°C/ W)<br>1000<br>Footprint<br>100<br>2 cm [2]<br>10<br>1<br>0,1<br>0,0001 0,001 0,01 0,1 1 10 100 1000<br>Time (s)<br>**----- End of picture text -----**<br>


## **Equation 2: pulse calculation formula** 

ZTH = RTH   + ZTHtp1 –  where  = tP/T 

**Figure 37. SO-8 thermal fitting model of a single channel** 

## **Table 6. SO-8 thermal parameter** 

|**Table 6.**<br>**SO-8 thermal parameterparameterarameter**|||
|---|---|---|
|**Area/island (cm2)**|**FP**|**2**|
|R1 (°C/W)|0.8||
|R2 (°C/W)|2.6||
|R3 (°C/W)|3.5||
|R4 (°C/W)|21||



20/28 

Doc ID 15586 Rev 3 

**VNN1NV04P-E, VNS1NV04P-E** 

**Package and PCB thermal data** 

|**Table 6.**<br>**SO-8 thermalparameter(continued)**|**Table 6.**<br>**SO-8 thermalparameter(continued)**|**Table 6.**<br>**SO-8 thermalparameter(continued)**|
|---|---|---|
|**Area/island (cm2)**|**FP**|**2**|
|R5 (°C/W)|16||
|R6 (°C/W)|58|28|
|C1 (W·s/°C)|0.00006||
|C2 (W·s/°C)|0.0005||
|C3 (W·s/°C)|0.0075||
|C4 (W·s/°C)|0.045||
|C5 (W·s/°C)|0.35||
|C6 (W·s/°C)|1.05|2|



21/28 

Doc ID 15586 Rev 3 

**Package and packing information** 

**VNN1NV04P-E, VNS1NV04P-E** 

## **5 Package and packing information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[® ] specifications, grade definitions and product status are available at: _www.st.com_ . 

ECOPACK[®] is an ST trademark. 

## **5.1 SOT-223 mechanical data** 

**==> picture [278 x 11] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 38. SOT-223 mechanical data and package outline<br>**----- End of picture text -----**<br>


22/28 

Doc ID 15586 Rev 3 

**VNN1NV04P-E, VNS1NV04P-E** 

**Package and packing information** 

## **5.2 SO8 mechanical data** 

**Table 7. SO-8 mechanical data** 

|**Dim.**|**mm**|**mm**|**mm**|
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|||1.75|
|A1|0.10||0.25|
|A2|1.25|||
|b|0.28||0.48|
|c|0.17||0.23|
|D(1)|4.80|4.90|5.00|
|E|5.80|6.00|6.20|
|E1(2)|3.80|3.90|4.00|
|e||1.27||
|h|0.25||0.50|
|L|0.40||1.27|
|L1||1.04||
|k|0°||8°|
|ccc|||0.10|



1. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15 mm in total (both side). 

2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25 mm per side. 

23/28 

Doc ID 15586 Rev 3 

**Package and packing information** 

**VNN1NV04P-E, VNS1NV04P-E** 

**==> picture [177 x 11] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 39. SO-8 package dimension<br>**----- End of picture text -----**<br>


**==> picture [405 x 301] intentionally omitted <==**

**----- Start of picture text -----**<br>
0016023 D<br>**----- End of picture text -----**<br>


24/28 

Doc ID 15586 Rev 3 

**VNN1NV04P-E, VNS1NV04P-E** 

**Package and packing information** 

## **5.3 SOT-223 packing information** 

**==> picture [272 x 11] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 40. SOT-223 tape and reel shipment (suffix “TR”)<br>**----- End of picture text -----**<br>


**==> picture [385 x 421] intentionally omitted <==**

**----- Start of picture text -----**<br>
Reel dimensions<br>H: Access40rnm rin.hole Base Q.ty 1000<br>: at slot location Bulk Q.ty 1000<br>A (max) 330<br>iB B (min) 1.5<br>C (± 0.2) 13<br>D g F 20.2<br>G (+ 2 / -0) 12.4<br>N (min) 60<br>T (max) 18.4<br>Full radius Tape act T| |] athup<br>: in core for<br>H tape start<br>! 2.5mm min. width,<br>Tape dimensions Po<br>According to Electronic Industries Association<br>:<br>(EIA) Standard 481 rev. A, Feb. 1986<br>Tape width Tape Hole Spacing P0 (± 0.1)W 124 1 f—| WDA na<br>Component Spacing P 8 TAPE T i i i i it<br>=a == a | Fl<br>Hole Diameter D (+ 0.1/-0) 1.5<br>Hole Diameter D1 (min) 1.5<br>Hole Position F (± 0.05) 5.5 Es : —— OMe<br>Compartment Depth K (max) 4.5 p i<br>Hole Spacing P1 (± 0.1) 2 K User Direction of Feed<br>All dimensions are in mm.<br>/ ; End O1l\O ¢\ Oo q|O0 0d<br>Fae EE Ge EE > ce as es ee — | Y oe en<br>ANNAN NNN e r es Ce ee<br>\\ JJL L | [es] Start een<br>/} \/ Top No components Components No components<br>cover<br>tape 500mm min<br>} oe Empty components pockets 500mm min A<br>User Direction of Feed NY saled with cover tape. t —<br>User direction of feed<br>**----- End of picture text -----**<br>


25/28 

Doc ID 15586 Rev 3 

**Package and packing information** 

**VNN1NV04P-E, VNS1NV04P-E** 

## **5.4 SO8 packing information** 

## **Figure 41. SO-8 tube shipment (no suffix)** 

|**B**|**C**||**Base Q.ty**|100|
|---|---|---|---|---|
||||**Bulk Q.ty**|2000|
||||**Tube length(± 0.5)**|532|
||**A**||**A**|3.2|
||||**B**|6|
||||**C(± 0.1)**|0.6|



All dimensions are in mm. 

## **Figure 42. SO-8 tape and reel shipment (suffix “TR”)** 

|||||||||||||||**REEL DIMENSIONS**|**REEL DIMENSIONS**|**REEL DIMENSIONS**|**REEL DIMENSIONS**|**REEL DIMENSIONS**|**REEL DIMENSIONS**|**REEL DIMENSIONS**||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
||:<br>:<br>‘||40mm min.<br>Access hole<br>at slot location|||||||||||**Base Q.ty**|||2500|||||||||||
|||||||||||||||**Bulk Q.ty**|||2500|||||||||||
|||||||||||||||**A (max)**|||330|||||||||||
|||||||||||||||**B (min)**|||1.5|||||||||||
|||||||||||||||**C (± 0.2)**|||13|||||||||||
|||||||||||||||**F**|||20.2|||||||||||
|||||||||||||||**G (+ 2 / -0)**|||12.4|||||||||||
|||||||||||||||**N (min)**|||60|||||||||||
|Fulrods||||Tapes||||TTT) atnup|||||||**T (max)**|||18.4|||||||||||
|||||||||||||||All dimensions are in mm.||||||||||||||
||:<br>!||tape start<br>2.5mm min. width,|||||||||||||||||||||||||
|**TAPE DIMENSIONS**|||||||||||||||||Po|||||||||||
|According to Electronic Industries Association|||||||||||||||-|||||||||||||
|(EIA) Standard 481 rev. A, Feb. 1986||||||||||||||||||||||||||||
|**Tape width**|**W**||12|||||TOP|||}||||'||i<br>H|||||H|\|||||
|**Tape Hole Spacing**<br>**Component Spacing**<br>**Hole Diameter**<br>**Hole Diameter**|**P0 (± 0.1)**<br>**P**<br>**D (+ 0.1/-0)**<br>**D1 (min)**||4<br>8<br>1.5<br>1.5|||™||COVER<br>TAPE|||ag<br>pi}||||+<br>:<br>-ep||+<br>|<br>—<br>bob||||a<br>4<br>——<br>!<br> tah|||F)|||Ww|
|**Hole Position**|**F (± 0.05)**|**F (± 0.05)**|5.5||||||||||||||P|||||||||||
|**Compartment Depth**|**K (max)**||4.5||||K|||||||User<br>Direction<br>of||||Feed||||||||||
|**Hole Spacing**|**P1 (± 0.1)**||2|||||||||||||||||||||||||
|All dimensions are in mm.||||||||||||||||||||||||||||
||||||||End||~~onan~~||||||~~ake~~|||~~¢{o ~~||||~~o¢~~||||~~(0~~|~~(0~~|
|||||||||||||||||||||||||||||
|rr<br>: 000 <br>UserDirectionofFeed|a<br> 0|0|rn \<br> 0 f|||\|Top<br>cover<br>tape<br>\/|J|No components<br>Components<br>500mm min<br>Empty components pockets<br>saled with cover tape.<br>User direction of feed<br>.<br>|||||||||||Start<br>No components<br>500mm min<br>“|||||||||



26/28 

Doc ID 15586 Rev 3 

**VNN1NV04P-E, VNS1NV04P-E** 

**Revision history** 

## **6 Revision history** 

**Table 8. Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|16-May-2009|1|Initial release.|
|29-Sep-2009|2|Removed target specification on cover page.|
|20-Sep-2013|3|Updated Disclaimer.|



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Doc ID 15586 Rev 3 

**VNN1NV04P-E, VNS1NV04P-E** 

## **Please Read Carefully:** 

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Doc ID 15586 Rev 3 



## Links

- [View this product on Novapart](https://novapart.co/products/VNN1NV04PTR-E/power-mosfet-n-channel-45-v-17-a-025-ohm-sot-223)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/stmicroelectronics/vnn1nv04ptr-e/mosfet-n-ch-45v-0r25-1-7a-sot/dp/2354522)
---

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