# Power MOSFET, N Channel, 55 V, 24 A, 0.035 ohm, TO-252 (DPAK), Surface Mount

![Product image](https://novapart.co/image/farnell:1739408/)

**URL**: https://novapart.co/products/VND14NV04-E/power-mosfet-n-channel-55-v-24-a-0035-ohm-to-252
**SKU**: VND14NV04-E
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.3000
**Stock**: 1000+
**Lead Time**: 274 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:24A; Drain Source Voltage Vds:55V; On Resistance Rds(on):0.035ohm; Rds(on) Test Voltage Vgs:5; Available until stocks are exhausted

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 3 - 168 hours |
| Svhc | No SVHC (17-Dec-2015) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 74W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 5V |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 55V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 24A |
| Drain Source On State Resistance | 0.035ohm |
| Gate Source Threshold Voltage Max | 2.5V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:1739408/)

**==> picture [61 x 39] intentionally omitted <==**

## **VNB14NV04, VND14NV04 VND14NV04-1, VNS14NV04** "OMNIFET II" full auto rotected Power MOSFET y p 

"OMNIFET II" 

## **Features** 

|**TYPE**|**RDS(on)**|**Ilim**|**Vclamp**|
|---|---|---|---|
|VNB14NV04<br>VND14NV04<br>VND14NV04-1<br>VNS14NV04|35 mΩ|12 A|40 V|



- Linear current limitation 

**==> picture [152 x 125] intentionally omitted <==**

**----- Start of picture text -----**<br>
3 3<br>1 1 2<br>TO-252 (DPAK) TO-251 (IPAK)<br>3<br>1<br>SO-8 D [2] PAK<br>**----- End of picture text -----**<br>


- Thermal shutdown 

- Short circuit protection 

- Integrated clamp 

- Low current drawn from input pin 

- Diagnostic feedback through input pin 

- ESD protection 

- Direct access to the gate of the Power MOSFET (analog driving) 

- Compatible with standard Power MOSFET 

## **Description** 

The VNB14NV04, VND14NV04, VND14NV04-1 and VNS14NV04 are monolithic devices made using STMicroelectronics VIPower™ M0 technology, intended for replacement of standard power MOSFETS in DC to 50 KHz applications. Built-in thermal shutdown, linear current limitation and overvoltage clamp protect the chip in harsh environments. 

Fault feedback can be detected by monitoring the voltage at the input pin. 

## **Table 1. Device summary** 

|**Package**|**Tube**|**Tube (lead free)**|**Tape and reel**|**Tape and reel (lead free)**|
|---|---|---|---|---|
|D2PAK|VNB14NV04|VNB14NV04-E|VNB14NV0413TR|VNB14NV04TR-E|
|TO-252 (DPAK)|VND14NV04|VND14NV04-E|VND14NV0413TR|VND14NV04TR-E|
|TO-251 (IPAK)|VND14NV04-1|VND14NV04-1-E|-|-|
|SO-8|VNS14NV04|-|-|-|



September 2013 

Doc ID 7393 Rev 9 

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_www.st.com_ 

**Contents** 

**VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04** 

|**Contents**|**Contents**||
|---|---|---|
|**1**|**Block**|**diagram  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5**|
|**2**|**Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6**||
||2.1|Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6|
||2.2|Thermal data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7|
||2.3|Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7|
|**3**|**Protection features  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9**||
|**4**|**Package thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18**||
||4.1|DPAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18|
||4.2|SO-8 thermal data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20|
||4.3|D2PAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21|
|**5**|**Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24**||
||5.1|ECOPACK®. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24|
||5.2|TO-251 (IPAK) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24|
||5.3|D2PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25|
||5.4|TO-252 (DPAK) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27|
||5.5|SO-8 mechanical data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28|
|**6**|**Revision history  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30**||



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**List of tables** 

## **List of tables** 

|Table|1.|Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1|
|---|---|---|
|Table|2.|Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6|
|Table|3.|Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7|
|Table|4.|Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7|
|Table|5.|DPAK thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19|
|Table|6.|D2PAK thermal parameter  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22|
|Table|7.|TO-251 (IPAK) mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24|
|Table|8.|D2PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26|
|Table|9.|TO-252 (DPAK) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27|
|Table|10.|SO-8 mechanical data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28|
|Table|11.|Document revision history  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30|



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**List of figures** 

## **List of figures** 

|Figure|1.|Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5|
|---|---|---|
|Figure|2.|Current and voltage conventions  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6|
|Figure|3.|Switching time test circuit for resistive load  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10|
|Figure|4.|Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10|
|Figure|5.|Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11|
|Figure|6.|Unclamped inductive waveforms  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11|
|Figure|7.|Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11|
|Figure|8.|Source-drain diode forward characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12|
|Figure|9.|Static drain source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12|
|Figure|10.|Derating curve  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12|
|Figure|11.|Static drain-source on resistance vs. input voltage (part 1/2). . . . . . . . . . . . . . . . . . . . . . . 12|
|Figure|12.|Static drain-source on resistance vs. input voltage (part 2/2). . . . . . . . . . . . . . . . . . . . . . . 12|
|Figure|13.|Transconductance  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12|
|Figure|14.|Static drain-source on resistance vs. id  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13|
|Figure|15.|Transfer characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13|
|Figure|16.|Turn-on current slope (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13|
|Figure|17.|Turn-on current slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13|
|Figure|18.|Input voltage vs. input charge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13|
|Figure|19.|Turn-off drain source voltage slope (part 1/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13|
|Figure|20.|Turn-off drain source voltage slope (part 2/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14|
|Figure|21.|Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14|
|Figure|22.|Switching time resistive load (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14|
|Figure|23.|Switching time resistive load (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14|
|Figure|24.|Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14|
|Figure|25.|Normalized on resistance vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14|
|Figure|26.|Normalized input threshold voltage vs. temperature  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15|
|Figure|27.|Current limit vs. junction temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15|
|Figure|28.|Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15|
|Figure|29.|DPAK maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . 16|
|Figure|30.|DPAK demagnetization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16|
|Figure|31.|D2PAK maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . 17|
|Figure|32.|D2PAK demagnetization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17|
|Figure|33.|DPAK PC board(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18|
|Figure|34.|DPAK Rthj-ambvs PCB copper area in open box free air condition. . . . . . . . . . . . . . . . . . . 18|
|Figure|35.|DPAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 19|
|Figure|36.|Thermal fitting model of an OMNIFET II in DPAK. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19|
|Figure|37.|SO-8 PC board(1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20|
|Figure<br>Figure|38.<br>39.|SO-8 Rthj-ambvs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . 20<br>D2PAK PC board(1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21|
|Figure<br>Figure|40.<br>41.|D2PAK Rthj-ambvs PCB copper area in open box free air condition. . . . . . . . . . . . . . . . . . 21<br>D2PAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 22|
|Figure|42.|Thermal fitting model of an OMNIFET II in D2PAK. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22|
|Figure|43.|TO-251 (IPAK) package dimension  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24|
|Figure|44.|D2PAK package dimension  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25|
|Figure|45.|TO-252 (DPAK) package dimension  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27|
|Figure|46.|SO-8 package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28|



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**Block diagram** 

## **1 Block diagram** 

## **Figure 1. Block diagram** 

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**Electrical specification** 

## **2 Electrical specification** 

## **Figure 2. Current and voltage conventions** 

## **2.1 Absolute maximum rating** 

## **Table 2. Absolute maximum rating** 

|**Symbol**|**Parameter**|**Value**|**Value**|**Value**|**Value**|**Unit**|
|---|---|---|---|---|---|---|
|||**SO-8**|**DPAK**|**IPAK**|**D2PAK**||
|VDS<br>~~a~~<br>~~a~~|Drain-source voltage (VIN=0 V)|Internally clamped||||V|
|VIN<br>~~aes~~|Input voltage|Internally clamped||||V|
|IIN<br>~~aes~~<br>~~es~~|Input current<br>~~es~~|+/-20<br>~~es~~||||mA<br>~~es~~|
|RIN MIN<br>~~es~~<br>~~es~~<br>~~es~~|Minimum input series impedance<br>~~es~~<br>~~es~~|10<br>~~es~~<br>~~es~~||||Ω<br>~~es~~<br>~~es~~|
|ID<br>~~es~~<br>~~es~~<br>~~ee~~|Drain current<br>~~es~~<br>~~es~~|Internally limited<br>~~es~~<br>~~es~~||||A<br>~~es~~<br>~~es~~|
|IR<br>~~es~~<br>~~ee~~<br>~~ee~~|Reverse DC output current<br>~~es~~<br>~~ee~~|-15<br>~~es~~||||A<br>~~es~~|
|VESD1<br>~~ee~~<br>~~ee~~|Electrostatic discharge (R=1.5 KΩ, C=100 pF)<br>~~ee~~|4000||||V|
|VESD2<br>~~ee~~|Electrostatic discharge on output pin only<br>(R=330Ω, C=150 pF)<br>~~ee~~|16500||||V|
|Ptot<br>~~ee~~|Total dissipation at Tc=25 °C<br>~~ee~~|4.6<br>~~ee~~|74<br>~~ee~~|74<br>~~ee~~|74|W|
|EMAX<br>~~a ee~~<br>~~ee~~|Maximum switching energy (L=0.4 mH; RL=0Ω;<br>Vbat=13.5 V; Tjstart=150 °C; IL=18 A)<br>~~ee~~<br>~~ee~~|~~ee~~<br>~~ee~~|93<br>~~ee~~<br>~~ee~~|~~ee~~<br>~~ee~~|93<br>~~ee~~|mJ<br>~~ee~~|
|Tj<br>~~ee~~<br>~~ee~~|Operating junction temperature<br>~~ee~~<br>~~ee~~|Internally limited<br>~~eeee~~||||°C|
|Tc<br>~~ee~~<br>~~ee~~<br>~~es~~|Case operating temperature<br>~~ee~~<br>~~ee~~|Internally limited<br>~~ee ee~~||||°C|
|Tstg<br>~~ee~~<br>~~es~~|Storage temperature<br>~~ee~~|-55 to 150||||°C|



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**Electrical specification** 

## **2.2 Thermal data** 

## **Table 3. Thermal data** 

|**Table 3.**|**Thermal data**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Value**||||**Unit**|
|||**SO-8**|**DPAK**|**IPAK**|**D2PAK**||
|Rthj-case|Thermal resistance junction-case max||1.7|1.7|1.7|°C/W|
|Rthj-lead|Thermal resistance junction-lead max|27||||°C/W|
|Rthj-amb|Thermal resistance junction-ambient max|90(1)|65(1)|102|52(1)|°C/W|



1. When mounted on a standard single-sided FR4 board with 0.5 cm[2] of Cu (at least 35 µm thick) connected to all DRAIN pins. Horizontal mounting and no artificial air flow. 

## **2.3 Electrical characteristics** 

-40 < Tj < 150 °C unless otherwise specified. 

## **Table 4. Electrical characteristics** 

|**Table 4.**|**Electrical characteristics**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|**Off**|||||||
|VCLAMP|Drain-source clamp voltage|VIN=0 V; ID=7 A|40|45|55|V|
|VCLTH|Drain-source clamp threshold<br>voltage|VIN=0 V; ID=2 mA|36|||V|
|VINTH|Input threshold voltage|VDS=VIN; ID=1 mA|0.5||2.5|V|
|IISS|Supply current from input pin|VDS=0 V; VIN=5 V||100|150|µA|
|VINCL|Input-source clamp voltage|IIN=1 mA<br>IIN=-1 mA|6<br>-1.0|6.8|8<br>-0.3|V|
|IDSS|Zero input voltage drain current<br>(VIN=0 V)|VDS=13 V; VIN=0 V; Tj=25 °C<br>VDS=25 V; VIN=0 V|||30<br>75|µA|
|**On**|||||||
|RDS(on)|Static drain-source on resistance|Vin= 5 V ID= 7 A Tj= 25 °C<br>Vin= 5 V ID= 7 A|||35<br>70|mΩ|
|**Dynamic (Tj=25°C, unless otherwise specified)**|||||||
|gfs (1)|Forward transconductance|VDD= 13 V ID= 7 A||18||S|
|Coss|Output capacitance|VDS= 13 V f = 1 MHz VIN= 0 V||400||pF|
|**Switching**|||||||
|td(on)|Turn-on delay time|VDD= 15 V ID= 7 A<br>Vgen= 5 V Rgen= RIN MIN=10Ω<br>(see_Figure 3_)||80|250|ns|
|tr|Rise time|||350|1000|ns|
|td(off)|Turn-off delay time|||450|1350|ns|
|tf|Fall time|||150|500|ns|



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**Electrical specification** 

## **Table 4. Electrical characteristics (continued)** 

|**Symbol**|**Parameter**|**Test Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delay time|VDD= 15 V Id= 7 A<br>Vgen= 5 V Rgen= 2.2 KΩ<br>(see_Figure 3_)||1.5|4.5|µs|
|tr|Rise time|||9.7|30.0|µs|
|td(off)|Turn-off delay time||||25.0|µs|
|tf|Fall time|||10.2|30.0|µs|
|(di/dt)on|Turn-on current slope|VDD= 15 V ID= 7 A<br>Vgen= 5 V Rgen= RIN MIN=10Ω||16||A/µs|
|Qi|Total input charge|VDD= 12 V ID= 7 A Vin= 5 V;<br>Igen= 2.13 mA (see_Figure 7_)||36.8||nC|
|**Source drain diode**|||||||
|VSD<br>(1)|Forward on voltage|ISD= 7 A Vin= 0 V||0.8||V|
|trr|Reverse recovery time|ISD= 7 A; di/dt = 40 A/µs<br>VDD= 30 V L = 200 µH<br>(see test circuit,_Figure 4_)||300||ns|
|Qrr|Reverse recovery charge|||0.8||µC|
|IRRM|Reverse recovery current|||5||A|
|**Protection**|||||||
|Ilim|Drain current limit|VIN= 5 V; VDS= 13 V|12|18|24|A|
|tdlim|Step response current limit|VIN= 5 V; VDS= 13 V||45||µs|
|Tjsh|Over temperature shutdown||150|175|200|°C|
|Tjrs|Over temperature reset||135|||°C|
|Igf|Fault sink current|VIN= 5 V; VDS= 13 V; Tj= Tjsh|10|15|20|mA|
|Eas|Single pulse avalanche energy|starting Tj= 25 °C; VDD= 24 V<br>VIN= 5 V; Rgen= RIN MIN= 10Ω;<br>L = 24 mH (see_Figure 5_and<br>_Figure 6_)|400|||mJ|



1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % 

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**Protection features** 

## **3 Protection features** 

During normal operation, the input pin is electrically connected to the gate of the internal power MOSFET through a low impedance path. 

The device then behaves like a standard power MOSFET and can be used as a switch from DC up to 50 KHz. The only difference from the user’s standpoint is that a small DC current IISS (typ. 100 µA) flows into the input pin in order to supply the internal circuitry. 

The device integrates: 

- Overvoltage clamp protection: internally set at 45 V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. 

- Linear current limiter circuit: limits the drain current ID to Ilim whatever the input pin voltages. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the over temperature threshold Tjsh. 

- Over temperature and short circuit protection: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Over temperature cutout occurs in the range 150 to 190 °C, a typical value being 170 °C. The device is automatically restarted when the chip temperature falls of about 15 °C below shutdown temperature. 

- Status feedback: in the case of an over temperature fault condition (Tj > Tjsh), the device tries to sink a diagnostic current Igf through the input pin in order to indicate fault condition. If driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. If the drive impedance is high enough so that the input pin driver is not able to supply the current Igf, the input pin will fall to 0 V. This will not however affect the device operation: no requirement is put on the current capability of the input pin driver except to be able to supply the normal operation drive current IISS. 

Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit. 

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**Protection features** 

## **Figure 3. Switching time test circuit for resistive load** 

## **Figure 4. Test circuit for diode recovery times** 

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**Protection features** 

**Figure 5. Unclamped inductive load test Figure 6. Unclamped inductive waveforms circuits** 

## **Figure 7. Input charge test circuit** 

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**Protection features** 

- **Figure 8. Source-drain diode forward characteristics** 

## **Figure 9. Static drain source on resistance** 

## **Figure 10. Derating curve** 

## **Figure 11. Static drain-source on resistance vs. input voltage (part 1/2)** 

**Figure 12. Static drain-source on resistance Figure 13. Transconductance vs. input voltage (part 2/2)** 

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**Protection features** 

## **Figure 14. Static drain-source on resistance Figure 15. Transfer characteristics vs. id** 

## **Figure 16. Turn-on current slope (part 1/2)** 

## **Figure 17. Turn-on current slope (part 2/2)** 

**Figure 18. Input voltage vs. input charge** 

**Figure 19. Turn-off drain source voltage slope (part 1/2)** 

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**Protection features** 

- **Figure 20. Turn-off drain source voltage slope Figure 21. Capacitance variations (part 2/2)** 

## **Figure 22. Switching time resistive load (part Figure 23. Switching time resistive load (part 1/2) 2/2)** 

**Figure 24. Output characteristics** 

## **Figure 25. Normalized on resistance vs. temperature** 

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**Protection features** 

## **Figure 26. Normalized input threshold voltage Figure 27. Current limit vs. junction vs. temperature temperatures** 

## **Figure 28. Step response current limit** 

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**Protection features** 

## **Figure 29. DPAK maximum turn-off current versus load inductance** 

Legend: 

A= Single pulse at TJstart=150ºC 

B= Repetitive pulse at TJstart=100ºC 

C= Repetitive pulse at TJstart=125ºC 

Conditions: 

VCC=13.5 V 

Values are generated with RL=0 Ω 

In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. 

## **Figure 30. DPAK demagnetization** 

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**Protection features** 

## **Figure 31. D[2] PAK maximum turn-off current versus load inductance** 

Legend: 

A= Single pulse at TJstart=150ºC 

B= Repetitive pulse at TJstart=100ºC 

C= Repetitive pulse at TJstart=125ºC 

Conditions: 

VCC=13.5 V 

Values are generated with RL=0 Ω 

In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. 

**Figure 32. D[2] PAK demagnetization** 

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**Package thermal data** 

## **4 Package thermal data** 

## **4.1 DPAK thermal data** 

## **Figure 33. DPAK PC board[(1)]** 

1. Layout condition of Rth and Zth measurements (PCB FR4 area = 60 mm x 60 mm, PCB thickness=2 mm, Cu thickness=35 µm, Copper areas: from minimum pad lay-out to 8 cm[2] ). 

## **Figure 34. DPAK Rthj-amb vs PCB copper area in open box free air condition** 

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**Package thermal data** 

## **Figure 35. DPAK thermal impedance junction ambient single pulse** 

## **Figure 36. Thermal fitting model of an OMNIFET II in DPAK** 

## **Pulse calculation formula** 

ZTH δ = RTH ⋅ δ + ZTHtp ( 1 – δ) where δ = t ⁄ T p 

|**Area/island(cm2)**|**Footprint**|**6**|
|---|---|---|
|R1 (°C/W)|0.1||
|R2 (°C/W)|0.35||
|R3 ( °C/W)|1.20||
|R4 (°C/W)|2||
|R5 (°C/W)|15||
|R6 (°C/W)|61|24|
|C1 (W.s/°C)|0.0006||
|C2 (W.s/°C)|0.0021||
|C3 (W.s/°C)|0.05||



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**Package thermal data** 

## **Table 5. DPAK thermal parameter (continued)** 

|**Area/island(cm2)**|**Footprint**|**6**|
|---|---|---|
|C4 (W.s/°C)|0.3||
|C5 (W.s/°C)|0.45||
|C6 (W.s/°C)|0.8|5|



## **4.2 SO-8 thermal data** 

**Figure 37. SO-8 PC board[(1)]** 

1. Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB thickness=2 mm, Cu thickness=35 µm, Copper areas: 0.14 cm[2] , 0.6 cm[2] , 1.6 cm[2] ). 

## **Figure 38. SO-8 Rthj-amb vs PCB copper area in open box free air condition** 

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**Package thermal data** 

## **4.3 D[2] PAK thermal data** 

**==> picture [147 x 13] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 39. D [2] PAK PC board [(1)]<br>**----- End of picture text -----**<br>


1. Layout condition of Rth and Zth measurements (PCB FR4 area = 60 mm x 60 mm, PCB thickness=2 mm, Cu thickness=35 µm, Copper areas: from minimum pad lay-out to 8 cm[2] ). 

## **Figure 40. D[2] PAK Rthj-amb vs PCB copper area in open box free air condition** 

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**Package thermal data** 

## **Figure 41. D[2] PAK thermal impedance junction ambient single pulse** 

## **Figure 42. Thermal fitting model of an OMNIFET II in D[2] PAK** 

## **Pulse calculation formula** 

ZTH δ = RTH ⋅ δ + ZTHtp ( 1 – δ) where δ = t ⁄ T p 

**D[2] PAK thermal parameter** 

|**Area/island(cm2)**|**Footprint**|**6**|
|---|---|---|
|R1 (°C/W)|0.1||
|R2 (°C/W)|0.35||
|R3 ( °C/W)|0.3||
|R4 (°C/W)|4||
|R5 (°C/W)|9||
|R6 (°C/W)|37|22|
|C1 (W.s/°C)|0.0006||
|C2 (W.s/°C)|2.10E-03||



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**Package thermal data** 

|**Table 6.**<br>**D2PAK thermalparameter(continued)**|**Table 6.**<br>**D2PAK thermalparameter(continued)**|**Table 6.**<br>**D2PAK thermalparameter(continued)**|
|---|---|---|
|**Area/island(cm2)**|**Footprint**|**6**|
|C3 (W.s/°C)|8.00E-02||
|C4 (W.s/°C)|0.45||
|C5 (W.s/°C)|2||
|C6 (W.s/°C)|3|5|



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**Package information** 

## **5 Package information** 

## **5.1 ECOPACK[®]** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[® ] specifications, grade definitions and product status are available at: _www.st.com_ . 

ECOPACK[®] is an ST trademark. 

## **5.2 TO-251 (IPAK) mechanical data** 

## **Figure 43. TO-251 (IPAK) package dimension** 

## **Table 7. TO-251 (IPAK) mechanical data** 

|**Dim.**|**Millimeters**|**Millimeters**|**Millimeters**|
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|2.2||2.4|
|A1|0.9||1.1|
|A3|0.7||1.3|
|B|0.64||0.9|
|B2|5.2||5.4|



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**Package information** 

**Table 7. TO-251 (IPAK) mechanical data (continued)** 

|**Dim.**|**Millimeters**|**Millimeters**|**Millimeters**|
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|B3|||0.85|
|B5||0.3||
|B6|||0.95|
|C|0.45||0.6|
|C2|0.48||0.6|
|D|6||6.2|
|E|6.4||6.6|
|G|4.4||4.6|
|H|15.9||16.3|
|L|9||9.4|
|L1|0.8||1.2|
|L2||0.8|1|



## **5.3 D[2] PAK mechanical data** 

**Figure 44. D[2] PAK package dimension** 

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**Package information** 

**Table 8.** 

**D[2] PAK mechanical data** 

|**Dim.**|**Millimeters**|**Millimeters**|**Millimeters**|
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|4.4||4.6|
|A1|2.49||2.69|
|A2|0.03||0.23|
|B|0.7||0.93|
|B2|1.14||1.7|
|C|0.45||0.6|
|C2|1.23||1.36|
|D|8.95||9.35|
|D1||8||
|E|10||10.4|
|E1||8.5||
|G|4.88||5.28|
|L|15||15.85|
|L2|1.27||1.4|
|L3|1.4||1.75|
|M|2.4||3.2|
|R||0.4||
|V2|0°||8°|



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**Package information** 

## **5.4 TO-252 (DPAK) mechanical data** 

**==> picture [224 x 11] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 45. TO-252 (DPAK) package dimension<br>**----- End of picture text -----**<br>


**Table 9. TO-252 (DPAK) mechanical data** 

|**Dim.**|**Millimeters**|**Millimeters**|**Millimeters**|
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|2.20||2.40|
|A1|0.90||1.10|
|A2|0.03||0.23|
|B|0.64||0.90|
|B2|5.20||5.40|
|C|0.45||0.6|
|C2|0.48||0.6|
|D|6||6.20|
|D1||5.1||
|E|6.4||6.6|
|E1||4.7||
|e||2.28||
|G|4.4||4.6|
|H|9.35||10.1|
|L2||0.8||



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**Package information** 

**Table 9. TO-252 (DPAK) mechanical data (continued) Millimeters Dim. Min. Typ. Max.** L4 0.6 1 R 0.2 V2 0° 8° Package weight Gr. 0.29 ~~===~~ **5.5 SO-8 mechanical data Figure 46. SO-8 package dimension** 

## **Table 10. SO-8 mechanical data** 

## **Millimeters** 

|**Dim.**|**Millimeters**|**Millimeters**|**Millimeters**|
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|1.75||2.40|
|a1|0.25||0.1|
|a2|1.65|||
|b|0.85||0.35|
|b1|0.25||0.19|



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**Package information** 

**Table 10. SO-8 mechanical data (continued)** 

|**Dim.**|**Millimeters**|**Millimeters**|**Millimeters**|
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|C|0.5||0.25|
|c1||45||
|D|5||4.8|
|E|6.2||5.8|
|e||1.27||
|e3||3.81||
|F|4||3.8|
|L|1.27||0.4|
|M|0.6|||
|F|||8|



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**Revision history** 

## **6 Revision history** 

**Table 11. Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|21-Jun-2004|6|Initial release.|
|03-Apr-2009|7|Document reformatted.<br>Added_Table 1: Device summary on page 1_.<br>Updated_Section 5: Package information on page 24_|
|06-Apr-2010|8|Added part number VNS14NV04.<br>Added SO-8 package:<br>– Updated_Table 1: Device summary_<br>– Updated_Table 2: Absolute maximum rating_<br>– Updated_Table 3: Thermal data_<br>– Updated_Chapter 4: Package thermal data_<br>– Updated_Chapter 5: Package information_|
|20-Sep-2013|9|Updated Disclaimer.|



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## **Please Read Carefully:** 

Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. 

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Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. 

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. 

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