# Alphanumeric LCD, 40 x 2, Black on Yellow / Green, 5V, Parallel, English, Euro, Transflective

![Product image](https://novapart.co/image/farnell:1183157/)

**URL**: https://novapart.co/products/TRIMODS1554B/LSTN/alphanumeric-lcd-40-x-2-black-on-yellow-green-5v
**SKU**: TRIMODS1554B/LSTN
**Manufacturer**: TRIDENT
**Category**: Optoelectronics & Displays || Displays || LCD Displays || Alphanumeric LCD Displays
**Price**: €23.7700
**Stock**: 10+

## Description

Character Count x Line:40 x 2; Display Appearance:Black on Yellow / Green; Logic Voltage:5V; Interface Type:Parallel; Font Set:English, Euro; Display Mode:Transflective; Character Siz

## Specifications

| Parameter | Value |
|---|---|
| Svhc | No SVHC (17-Dec-2014) |
| Font Set | English, Euro |
| Module Size | 182mm x 33.5mm |
| Display Mode | Transflective |
| Logic Voltage | 5V |
| Product Range | - |
| Character Size | 5.56mm |
| Interface Type | Parallel |
| Lcd Display Type | STN |
| Display Appearance | Black on Yellow / Green |
| Backlighting Colour | Yellow / Green |
| Display Construction | COB |
| Character Count X Line | 40 x 2 |
| Operating Temperature Max | 50°C |
| Operating Temperature Min | 0°C |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:1183157/)

PART NUMBER CHANGED FOR RoHS VERSION 01/08/05 TRI MODGP 1554 akk versions 

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~A > San 2G EG<br>~<br>sc<br>zrs<br>&<br>g| s<br>**----- End of picture text -----**<br>


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Read Mode Timing Diagram 

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~~—ow~~ Powersupply ~~| sv | 45 | RS |~~ Select(H-Data,L=Instruction) ~~__ Register | 6 | _RAW_|~~ Read/Write _L=MPU to ~~LCMH-LCMtoMPU | 7 | ek | ate | 3s | pao | atabusbito | 9 | ppt | ata~~ busbitr ~~| 10~~ ~~**| p** psez ||~~ ~~**a** ttata~~ ~~**busbit** 32~~ ~~**|** | pps | ita busing | 12 | pps | atta busbits | 13 | ppo | ata busbit6 | 14 | ppv | ita busin? | pois | A | Anode of LEDUnit | 16 | KK | Cathode of LED unit |~~ ! eflector of Screen and DDRAM Address 

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402A 

## D. Display ON/OFF Control 

D:Display ON/OFF control bit 

When D=High, entire display is turned on. When D=Low, display is turned off,but display data remains in DDRAM. C:Cursor ON/OFF control bit When C=High, cursor is turned on. When C=Low, cursor is disappeared in current display ,but I/D register preserves its data. B:Cursor Blink ON/OFF control bit 

When B=High, cursor blink is on, which performs alternately between all the “High” data and display characters at the cursor position. When B=Low ,blink is off. 

E. Cursor or Display Shift 

Shifting of right/left cursor position or display without writing or reading of display data. This instruction is used to correct or search display data. 

During 2-line mode display,cursor moves to the 2" line after the 40" digit of the 1“ line. Note that display shift is performed simultaneously in all the lines. When displayed data is shifted repeatedly,each line is shifted individually. When display shift is performed,the contents of the address counter are not changed. 

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**----- Start of picture text -----**<br>
0 fo | Shift cursor to the left, AC is decreased by1<br>of a | Shift cursor to the right, AC is increased by]<br>1} 0] Shift all the display to the left,cursor moves according to the display<br>Shift all the display to the right,cursor moves according to the display<br>**----- End of picture text -----**<br>


12 

402A 

F. Function set 

DL: Interface data length control bit When DL=High, it means 8-bit bus mode with MPU. When DL=Low, it means 4-bit bus mode with MPU. When 4-bit bus mode, it needs to transfer 4-bit data twice. 

N:Display line number control bit When N=Low, 1-line display mode is set. When N=High, 2-line display mode is set. F:Display font type control bit When F=Low, 5x8 dots format display mode is set. When F=High, 5x11 dots format display mode. 

G. Set CGRAM Address 

Set CGRAM address to AC. 

This instruction makes CGRAM data available from MPU. 

H. Set DDRAM Address 

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**----- Start of picture text -----**<br>
© | @ | 1 | ce} acs ac | acs | ace | act | aco<br>**----- End of picture text -----**<br>


Set DDRAM address to AC. 

This instruction makes DDRAM data available from MPU. When 1-line display mode(N=Low),DDRAM address is from “OOH” to “4FH”. In 2-line display mode(N=High),DDRAM address in the 1“ line is from “00H” to “27H”,and DDRAM address in the 2" line is from “40H” to “67H”. 

13 

402A 

I. Read Busy Flag & Address 

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**----- Start of picture text -----**<br>
0 | 1 | pr | ace} acs | act} aca | ace | act | aco<br>**----- End of picture text -----**<br>


This instruction shows whether IC is in internal operation or not . If BF is “High”,internal operation is in progress and should wait until BF is to be Low,which by then the next instruction can be performed. In this instruction you can also read the value of the address counter. 

J. Write data to RAM 

Write binary 8-bit data to DDRAM/CGRAM. 

The selection of RAM from DDRAM,and CGRAM,jis set by the previous address set instruction(DDRAM address set,CGRAM address set). 

RAM set instruction can also determine the AC direction to RAM. 

After write operation, the address is automatically increased /decreased by 1,according the entry mode. 

K. Read data from RAM 

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**----- Start of picture text -----**<br>
1 Lt | pr | pe | ps pa | pa | pa | pt | o |<br>**----- End of picture text -----**<br>


Read binary 8-bit data from DDRAM/CGRAM. 

The selection of RAM is set by the previous address set instruction.If the address set instruction of RAM is not performed before this instruction, the data that has been read first is invalid, as the direction of AC is not yet determined. If RAM data is read several times without RAM address instructions set before read operation,the correct RAM data can be obtained from the second. But the first data would be incorrect,as there is no time margin to transfer RAM data. 

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~~0000x~~ 

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402A 

MOV A,#40H MOV P1,A LCALL WRITE MOV R1,#20H SETB P3.0 CLR P3.1 

MOV DPTR,#TAB2 XI: CLR A MOVC A,@A+DPTR MOV P1,A LCALL WRITE INC DPTR DJNZ R1,X1 RET 

MAIN1: MOV DPTR,#TAB1 ;Display TABI on screen MOV R1,30H MOV R2,31H LCALL LINE1 LCALL LINE2 LCALL T3 MOV DPTR,#TAB7 ;Display TAB7 on screen MOV R1,30H MOV R2,31H LCALL LINE1 LCALL LINE2 LCALL T3 MOV DPTR,#TAB8 ;Display TAB8 on screen MOV R1,30H MOV R2,31H LCALL LINE1 LCALL LINE2 LCALL T3 MOV DPTR,#TAB9 ;Display TAB9 on screen MOV R1,30H MOV R2,31H LCALL LINE1 LCALL LINE2 LCALL T3 MOV DPTR,#TAB10 ;Display TAB10 on screen MOV R1,30H 

;Display TAB10 on screen 

19 

402A 

MOV R2,31H LCALL LINE1 LCALL LINE2 LCALL T3 MOV DPTR,#TABI1 ;Display TAB11 on screen MOV R1,30H MOV R2,31H LCALL LINE1 LCALL LINE2 LCALL T3 RET LINE1: CLR P3.0 ;Write data to line 1 CLR P3.1 MOV A,#80H MOV P1,A LCALL WRITE ;Set DDRAM address SETB P3.0 CLR P3.1 NI: MOV RO,#04H LI: CLR A MOVC A,@A+DPTR MOV P1,A LCALL WRITE ;Write data to DDRAM INC DPTR DJNZ RO,L1 DJNZ R1,N1 RET LINE2: CLR P3.0 ;Write data on line 2 CLR P3.1 MOV A,#0COH MOV P1,A LCALL WRITE ;Set DDRAM address CLR P3.1 SETB P3.0 N2: MOV RO,#04H L2: CLR A MOVC A,@A+DPTR MOV P1,A LCALL WRITE ;Write data to DDRAM INC DPTR 

20 

402A 

DJNZ RO,L2 DJNZ R2,N2 RET WRITE: SETB P3.2 

;Write subprogram 

MOV R7,#01H AB: MOV R6,#0FFH AC: DJNZ R6,AC DJNZ R7,AB CLR P3.2 

RET TI: MOV R7,#40H AD: MOV R6,#0FFH AE: DJNZ R6,AE DJNZ R7,AD RET T2: MOV R7,#20H AF: MOV R6,#0FFH AG: DJNZ R6,AG DJNZ R7,AF RET 

T3: MOV R7,#03H AH: MOV R6,#8FH Al: MOV RS,#0FFH AJ: DJNZ R5,AJ DJNZ R6,AI 

;Delay subprogram | 

;Delay subprogram 2 

;Delay subprogram 3 

DJNZ R7,AH RET 

TAB1: DB OFFH,OFFH,OFFH,OFFH,OFFH,OFFH,OFFH,OFFH DB OFFH,OFFH,OFFH,OFFH,OFFH,OFFH,OFFH,OFFH DB OFFH,OFFH,OFFH,OFFH,OFFH,OFFH,OFFH,OFFH DB OFFH,OFFH,OFFH,OFFH,OFFH,OFFH,OFFH,OFFH DB OFFH,OFFH,OFFH,OFFH,OFFH,OFFH,OFFH,OFFH DB OFFH,OFFH,OFFH,OFFH,OFFH,OFFH,OFFH,OFFH DB OFFH,OFFH,OFFH,OFFH,OFFH,OFFH,OFFH,OFFH DB OFFH,OFFH,OFFH,OFFH,OFFH,OFFH,OFFH,OFFH DB OFFH,OFFH,OFFH,OFFH,OFFH,OFFH,OFFH,OFFH DB OFFH,OFFH,OFFH,OFFH,OFFH,OFFH,OFFH,OFFH TAB2: DB 1FH,00H,1FH,00H,1FH,00H,1FH,00H DB 00H, 1FH,00H,1FH,00H, 1FH,00H,1FH DB 15H,15H,15H,15H,15H,15H,15H,15H 

21 

402A 

DB 0AH,0AH,0AH,0OAH,OAH,OAH,OAH,OAH 

TAB7: 

DB 00H,00H,00H,00H,00H,00H,00H,00H DB 00H,00H,00H,00H,00H,00H,00H,00H DB 00H,00H,00H,00H,00H,00H,00H,00H DB 00H,00H,00H,00H,00H,00H,00H,00H DB 00H,00H,00H,00H,00H,00H,00H,00H DB 00H,00H,00H,00H,00H,00H,00H,00H DB 00H,00H,00H,00H,00H,00H,00H,00H DB 00H,00H,00H,00H,00H,00H,00H,00H DB 00H,00H,00H,00H,00H,00H,00H,00H DB 00H,00H,00H,00H,00H,00H,00H,00H 

TAB8: DB 01H,01H,01H,01H,01H,01H,01H,01H DB 01H,01H,01H,01H,01H,01H,01H,01H DB 01H,01H,01H,01H,01H,01H,01H,01H DB 01H,01H,01H,01H,01H,01H,01H,01H DB 01H,01H,01H,01H,01H,01H,01H,01H DB 01H,01H,01H,01H,01H,01H,01H,01H DB 01H,01H,01H,01H,01H,01H,01H,01H DB 01H,01H,01H,01H,01H,01H,01H,01H DB 01H,01H,01H,01H,01H,01H,01H,01H DB 01H,01H,01H,01H,01H,01H,01H,01H 

TAB9: DB 02H,03H,02H,03H,02H,03H,02H,03H DB 02H,03H,02H,03H,02H,03H,02H,03H DB 02H,03H,02H,03H,02H,03H,02H,03H DB 02H,03H,02H,03H,02H,03H,02H,03H DB 02H,03H,02H,03H,02H,03H,02H,03H DB 02H,03H,02H,03H,02H,03H,02H,03H DB 02H,03H,02H,03H,02H,03H,02H,03H DB 02H,03H,02H,03H,02H,03H,02H,03H DB 02H,03H,02H,03H,02H,03H,02H,03H DB 02H,03H,02H,03H,02H,03H,02H,03H 

TAB10: DB 03H,02H,03H,02H,03H,02H,03H,02H DB 03H,02H,03H,02H,03H,02H,03H,02H DB 03H,02H,03H,02H,03H,02H,03H,02H DB 03H,02H,03H,02H,03H,02H,03H,02H DB 03H,02H,03H,02H,03H,02H,03H,02H DB 03H,02H,03H,02H,03H,02H,03H,02H DB 03H,02H,03H,02H,03H,02H,03H,02H DB 03H,02H,03H,02H,03H,02H,03H,02H DB 03H,02H,03H,02H,03H,02H,03H,02H 

22 

402A 

DB 03H,02H,03H,02H,03H,02H,03H,02H TABI11: DB 31H,32H,33H,34H,35H,36H,37H,38H DB 39H,41H,42H,43H,44H,45H,46H,47H DB 31H,32H,33H,34H,35H,36H,37H,38H DB 39H,41H,42H,43H,44H,45H,46H,47H DB 31H,32H,33H,34H,35H,36H,37H,38H DB 39H,41H,42H,43H,44H,45H,46H,47H DB 31H,32H,33H,34H,35H,36H,37H,38H DB 39H,41H,42H,43H,44H,45H,46H,47H DB 31H,32H,33H,34H,35H,36H,37H,38H DB 39H,41H,42H,43H,44H,45H,46H,47H END 

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---

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