# Power MOSFET, P Channel, 400 V, 125 mA, 19 ohm, TO-243, Surface Mount

![Product image](https://novapart.co/image/farnell:2851587/)

**URL**: https://novapart.co/products/TP2540N8-G/power-mosfet-p-channel-400-v-125-ma-19-ohm-to-243
**SKU**: TP2540N8-G
**Manufacturer**: MICROCHIP
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.1000
**Stock**: 500+
**Lead Time**: 71 days (indicative)

## Description

Transistor Polarity:P Channel; Continuous Drain Current Id:-125mA; Drain Source Voltage Vds:-400V; On Resistance Rds(on):19ohm; Rds(on) Test Voltage Vgs:-10V; Threshold Voltage V

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (04-Feb-2026) |
| No. Of Pins | 3Pins |
| Channel Type | P Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 1.6W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-243 |
| Drain Source Voltage Vds | 400V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 125mA |
| Drain Source On State Resistance | 19ohm |
| Gate Source Threshold Voltage Max | 2.4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2851587/)

**TP2540** 

## _**Su ertex inc.**_ **TP2540** _**p**_ **P-Channel Enhancement-Mode** ~~=~~ **Vertical DMOS FET Features** 

## **General Description** 

- Low threshold (-2.4V max.) 

This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. 

- High input  impedance 

- Low input capacitance (60pF typical) 

- Fast switching speeds 

- Low on-resistance 

- Free from secondary breakdown 

- Low input and output leakage 

## **Applications** 

- Logic level interfaces - ideal for TTL and CMOS 

Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. 

- Solid state relays 

- Battery operated systems 

- Photo voltaic drives 

- Analog switches 

- General purpose line drivers 

|►<br>Telecom switches|
|---|
|**Ordering Information**<br>**Product Summary**|
|**Pin Configuration**<br>**GATE**<br>**SOURCE**<br>**DRAIN**<br>**Part Number**<br>**Package Option**<br>**Packing**<br>TP2540N3-G<br>3-Lead TO-92<br>1000/Bag<br>TP2540N3-G P002<br>3-Lead TO-92<br>2000/Reel<br>TP2540N3-G P003<br>TP2540N3-G P005<br>TP2540N3-G P013<br>TP2540N3-G P014<br>TP2540N8-G<br>TO-243AA(SOT-89)<br>2000/Reel<br>**BVDSS/BVDGS**<br>**RDS(ON)**<br>**(max)**<br>**ID(ON)**<br>**(min)**<br>**VGS(th)**<br>**(max)**<br>-400V<br>25Ω<br>-2.4A<br>-0.4V<br>_-G denotes a lead (Pb)-free / RoHS compliant package._<br>_Contact factory for Wafer / Die availablity._<br>_Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant._<br>**GATE**<br>**SOURCE**<br>**DRAIN**<br>**DRAIN**<br>~~=sirery~~|
|YY = Year Sealed<br>WW = Week Sealed<br> = “Green” Packaging<br>**SiTP**<br>**2 5 4 0 **<br>**Y Y W W**<br>**Absolute Maximum Ratings **<br>**Parameter**<br>**Value**<br>Drain-to-source voltage<br>BVDSS<br>Drain-to-gate voltage<br>BVDGS<br>Gate-to-source voltage<br>±20V<br>Operatingand storage temperature<br>-55OC to +150OC<br>_Absolute Maximum Ratings are those values beyond which damage to the device_<br>_may occur. Functional operation under these conditions is not implied. Continuous_<br>_operation of the device at the absolute rating level may affect device reliability. All_<br>**TO-92**<br>**Product Marking**<br>_Package may or may not include the following marks: Si or_<br>**TO-243AA (SOT-89)**<br>~~—~~|



_Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous Package may or may not include the following marks: Si or operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground._ **TO-92 Typical Thermal Resistance** W = Code for week sealed **TP5DW Package** _**θja**_ = “Green” Packaging TO-92 132[O] C/W _Package may or may not include the following marks: Si or_ **TO-243AA (SOT-89)** TO-243AA (SOT-89) 133[O] C/W ~~——=—~~ _Doc.# DSFP-TP2540_ _**Supertex inc.** B081613_ 

_**Supertex inc. www.supertex.com**_ 

**TP2540** 

## **Thermal Characteristics** 

|**Package**|**ID**<br>**(continuous)****_†_**|**ID**<br>**(pulsed)**|**Power Dissipation**<br>**@TA = 25OC**|**IDR**<br>**_†_**|**IDRM**|
|---|---|---|---|---|---|
|TO-92|-86mA|-600mA|0.74W|-86mA|-600mA|
|TO-243AA(SOT-89)|-125mA|-1.2A|1.6_‡_|-125mA|-1.2A|



- _ID (continuous) is limited by max rated Tj ._ 

_‡    Mounted on FR5 board, 25mm x 25mm x 1.57mm._ 

## **Electrical Characteristics** _(TA = 25°C unless otherwise specified)_ 

**==> picture [542 x 373] intentionally omitted <==**

**----- Start of picture text -----**<br>
Sym Parameter Min Typ Max Units Conditions<br>BVDSS Drain-to-source breakdown voltage -400 - - V VGS = 0V, ID = -2.0mA<br>VGS(th) Gate threshold voltage -1.0 - -2.4 V VGS = VDS, ID= -1.0mA<br>∆VGS(th) Change in VGS(th) with temperature - - 4.8 mV/ [O] C VGS = VDS, ID= -1.0mA<br>IGSS Gate body leakage - - -100 nA VGS = ± 20V, VDS = 0V<br>- -10 μA VGS = 0V, VDS = Max Rating<br>IDSS Zero gate voltage drain current - - -1.0 mA VDS = 0.8 Max Rating,<br>VGS = 0V, TA = 125°C<br>I On-state drain current -0.2 -0.3 - A VGS = -4.5V, VDS = -25V<br>D(ON) -0.4 -1.1 - VGS = -10V, VDS = -25V<br>R Static drain-to-source on-state resistance - 20 30 Ω VGS = -4.5V, ID = -100mA<br>DS(ON) 19 25 VGS = -10V, ID = -100mA<br>∆RDS(ON) Change in RDS(ON) with temperature - - 0.75 %/ [O] C VGS = -10V, ID = -100mA<br>GFS Forward transconductance 100 175 - mmho VDS = -25V, ID = -100mA<br>CISS Input capacitance - 60 125 VGS = 0V,<br>COSS Common source output capacitance - 20 70 pF VDS = -25V,<br>CRSS Reverse transfer capacitance - 10 25 f = 1.0 MHz<br>td(ON) Turn-on delay time - - 10<br>t Rise time - - 10 VDD = -25V,<br>td(OFF)r Turn-off delay time - - 20 ns RID = -0.4A,GEN = 25Ω<br>t Fall time - - 13<br>f<br>VSD Diode forward voltage drop - - -1.8 V VGS = 0V, ISD = -100mA<br>trr Reverse recovery time - 300 - ns VGS = 0V, ISD = -100mA<br>**----- End of picture text -----**<br>


_**Notes:**_ 

_1. All D.C. parameters 100% tested at 25[O] C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)_ 

_2. All A.C. parameters sample tested._ 

## **Switching Waveforms and Test Circuit** 

**==> picture [403 x 109] intentionally omitted <==**

**----- Start of picture text -----**<br>
0V Pulse<br>10%<br>Generator<br>INPUT<br>-10V 90% RGEN<br>t(ON) t(OFF)<br>D.U.T.<br>td(ON) tr td(OFF) tf INPUT<br>OUTPUT<br>0V<br>OUTPUT 90% 90% RL<br>10% 10%<br>VDD<br>VDD<br>**----- End of picture text -----**<br>


_**Supertex inc.**_ 

_Doc.# DSFP-TP2540 B081613_ 

_**www.supertex.com**_ 

2 

**TP2540** 

## **Typical Performance Curves** 

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**----- Start of picture text -----**<br>
BVDSS Variation with Temperature<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
On-Resistance vs. Drain Current<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
1.1  100<br>80  VGS = -4.5V<br>VGS = -10V<br>60<br>1.0<br>40<br>20<br>0.9  0<br>-50                   0                     50                   100                  150  0              -0.4             -0.8             -1.2             -1.6             -2.0<br>Tj ( [O] C) ID (amperes)<br>Transfer Characteristics V(th) and RDS Variation with Temperature<br>-2.0  2.5<br>VDS = -25 [O] C<br>1.2<br>-1.6  2.0<br>RDS(ON) @ -10V, -0.1A<br>1.1<br>TA = -55 [O] C<br>-1.2  1.5<br>1.0<br>25 [O] C<br>-0.8  1.0<br>0.9<br>-0.4  V(th)@ -1mA  0.5<br>125 [O] C<br>0.8<br>0  0<br>0              -2.0             -4.0             -6.0             -8.0              -10  -50                   0                     50                   100                  150<br>VGS (volts) Tj ( [O] C)<br>Capacitance vs. Drain-to-Source Voltage Gate Drive Dynamic Characteristics<br>200  -10<br>f = 1MHz<br>-8.0  VDS = -10V<br>150<br>-6.0<br>VDS = -40V<br>100<br>-4.0<br>CISS  190 pF<br>50<br>-2.0<br>60pF<br>CRSS<br>0  0<br>0                    -10                   -20                   -30                  -40  0               0.4               0.8              1.2              1.6              2.0<br>VDS (volts) QG (nanocoulombs)<br>COSS<br> (ohms)<br> (normalized)<br>DS(ON)<br>DSS R<br>BV<br> (normalized)  (normalized)<br> (amperes)<br>ID<br>GS(th) DS(ON)<br>V R<br> (volts)<br>GS<br>V<br>C (picofarads)<br>**----- End of picture text -----**<br>


_**Supertex inc.**_ 

_Doc.# DSFP-TP2540 B081613_ 

_**www.supertex.com**_ 

3 

**TP2540** 

## **Typical Performance Curves** _**(cont.)**_ 

## **Output Characteristics** 

## **Saturation Characteristics** 

**==> picture [458 x 650] intentionally omitted <==**

**----- Start of picture text -----**<br>
-2.0  -1.0<br>-1.6  -0.8<br>VGS = -10V<br>VGS = -10V  -8V<br>-1.2  -0.6<br>-8V  -6V<br>-0.8  -0.4<br>-6V<br>-0.4  -0.2<br>-4V<br>-4V<br>0  0<br>0                -10                -20              -30               -40               -50  0                -2.0              -4.0              -6.0              -8.0              -10<br>VDS (volts) VDS (volts)<br>Transconductance vs. Drain Current Power Dissipation vs. Ambient Temperature<br>0.5  2.0<br>VDS = -25V<br>TO-243AA<br>0.4<br>0.3<br>1.0<br>TA = -55 [O] C<br>0.2<br>25 [O] C<br>TO-92<br>125 [O] C<br>0.1<br>0  0<br>0                -0.4              -0.8              -1.2              -1.6              -2.0  0             25             50             75            100           125          150<br>ID (amperes) TA ( [O] C)<br>Maximum Rated Safe Operating Area Thermal Response Characteristics<br>-10  1.0<br>TA = 25 [O] C<br>0.8<br>TO-243AA<br>TO-243AA (pulsed)<br>-1.0  TO-92 (pulsed)  TPA D = 25= 1.6W  [O] C<br>0.6<br>TO-243AA (DC)<br>0.4<br>-0.1  TO-92 (DC)<br>0.2  TO-92<br>TC = 25 [O] C<br>PD = 1.0W<br>-0.01  0<br>-1.0                          -10                           -100                          -1000  0.001               0.01                  0.1                     1.0                    10<br>VDS (volts) tp(seconds)<br>(amperes) (amperes)<br>ID  ID<br>(watts)<br>(siemens) D<br>FS  P<br>G<br>(amperes)<br>ID<br>Thermal Resistance (normalized)<br>**----- End of picture text -----**<br>


## **Power Dissipation vs. Ambient Temperature** 

_**Supertex inc.**_ 

_Doc.# DSFP-TP2540 B081613_ 

_**www.supertex.com**_ 

4 

**TP2540** 

## **3-Lead TO-92 Package Outline (N3)** 

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D<br>A<br>Seating<br>Plane 1     2     3<br>L<br>b c<br>e1<br>e<br>**----- End of picture text -----**<br>


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Front View<br>E<br>E1<br>1 3<br>2<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
Side View<br>**----- End of picture text -----**<br>


**Bottom View** 

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**----- Start of picture text -----**<br>
Symbol A b c D E E1 e e1 L<br>MIN .170 .014 [†] .014 [†] .175 .125 .080 .095 .045 .500<br>Dimensions<br>NOM - - - - - - - - -<br>(inches)<br>MAX .210 .022 [†] .022 [†] .205 .165 .105 .105 .055 .610*<br>**----- End of picture text -----**<br>


_JEDEC Registration TO-92. * This dimension is not specified in the JEDEC drawing._ 

_† This dimension differs from the JEDEC drawing._ _**Drawings not to scale. Supertex Doc.#:** DSPD-3TO92N3, Version E041009._ 

_**Supertex inc. www.supertex.com**_ 

_Doc.# DSFP-TP2540 B081613_ 

5 

**TP2540** 

## **3-Lead TO-243AA (SOT-89) Package Outline (N8)** 

**==> picture [217 x 195] intentionally omitted <==**

**----- Start of picture text -----**<br>
D<br>D1<br>E H<br>1  2  3<br>L<br>b  b1<br>e<br>e1<br>**----- End of picture text -----**<br>


## **Top View** 

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**----- Start of picture text -----**<br>
C<br>E1<br>A<br>**----- End of picture text -----**<br>


## **Side View** 

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**----- Start of picture text -----**<br>
Symbol A b b1 C D D1 E E1 e e1 H L<br>MIN 1.40 0.44 0.36 0.35 4.40 1.62 2.29 2.00 [†] 3.94 0.73 [†]<br>Dimensions 1.50 3.00<br>NOM - - - - - - - - - -<br>(mm) BSC BSC<br>MAX 1.60 0.56 0.48 0.44 4.60 1.83 2.60 2.29 4.25 1.20<br>**----- End of picture text -----**<br>


_JEDEC Registration TO-243, Variation AA, Issue C, July 1986._ 

_**†** This dimension differs from the JEDEC drawing_ _**Drawings not to scale** ._ 

_**Supertex Doc. #:** DSPD-3TO243AAN8, Version F111010._ 

_(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.)_ 

_**Supertex inc.**_ does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” _**Supertex inc.**_ does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the _**Supertex inc.**_ (website: http//www.supertex.com) 

> ©2013 _**Supertex inc.**_ All rights reserved. Unauthorized use or reproduction is prohibited. 

_**Supertex inc.**_ 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 _**www.supertex.com**_ 

_Doc.# DSFP-TP2540 B081613_ 

6 



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---

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