# Power MOSFET, Enhanced-Mode, P Channel, 100 V, 480 mA, 2 ohm, SOT-89, Surface Mount

![Product image](https://novapart.co/image/farnell:2809917/)

**URL**: https://novapart.co/products/TP2510N8-G/power-mosfet-enhanced-mode-p-channel-100-v-480-ma
**SKU**: TP2510N8-G
**Manufacturer**: MICROCHIP
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.6380
**Stock**: 10+
**Lead Time**: 78 days (indicative)

## Description

Transistor Polarity:P Channel; Continuous Drain Current Id:-480mA; Drain Source Voltage Vds:-100V; On Resistance Rds(on):2ohm; Rds(on) Test Voltage Vgs:-10V; Threshold Voltage Vgs:-2

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (04-Feb-2026) |
| No. Of Pins | 3Pins |
| Channel Type | P Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 1.6W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | SOT-89 |
| Drain Source Voltage Vds | 100V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 480mA |
| Drain Source On State Resistance | 2ohm |
| Gate Source Threshold Voltage Max | 2.4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2809917/)

_**Su ertex inc. p**_ 

**TP2510** 

## **P-Channel Enhancement-Mode Vertical DMOS FET** 

## **Features** 

- Low threshold (-2.4V max.) 

- High input  impedance 

- Low input capacitance (125pF max.) 

- Fast switching speeds 

- Low on-resistance 

- Free from secondary breakdown 

- Low input and output leakage 

## **Applications** 

- Logic level interfaces - ideal for TTL and CMOS 

- Solid state relays 

- Battery operated systems 

- Photo voltaic drives 

- Analog switches 

## **General Description** 

This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. 

Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. 

- General purpose line drivers 

- Telecom switches 

**Ordering Information Product Summary Part Number Package Option Packing BV /BV RDS(ON) VGS(th) ID(ON) DSS DGS (max) (max) (min)** TP2510N8-G TO-243AA (SOT-89) 2000/Reel _-G denotes a lead (Pb)-free / RoHS compliant package._ -100V 3.5Ω -2.4V -1.5A ~~——~~ _Contact factory for Wafer / Die availablity. Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant._ 

**Absolute Maximum Ratings Parameter Value** Drain-to-source voltage BVDSS Drain-to-gate voltage BVDGS Gate-to-source voltage ±20V ~~a~~ Operating and storage temperature -55[O] C to +150[O] C _Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground._ 

## **Pin Configuration** 

**==> picture [116 x 89] intentionally omitted <==**

**----- Start of picture text -----**<br>
DRAIN<br>SOURCE<br>DRAIN<br>GATE<br>TO-243AA (SOT-89)<br>**----- End of picture text -----**<br>


## **Product Marking** 

**Typical Thermal Resistance** W = Code for Week Sealed **TP5AW Package** _**θja**_ TO-243AA (SOT-89) 133[O] C/W ~~rn~~ _Package may or may not include the following marks: Si or_ 

W = Code for Week Sealed = “Green” Packaging ee 

**TO-243AA (SOT-89)** 

_**Supertex inc. www.supertex.com**_ 

_Doc.# DSFP-TP2510 C081413_ 

**TP2510** 

## **Thermal Characteristics** 

**==> picture [543 x 51] intentionally omitted <==**

**----- Start of picture text -----**<br>
Package (continuous)ID [†] (pulsed)ID Power Dissipation@ TA = 25 [O] C IDR † IDRM<br>TO-243AA (SOT-89) -480mA -2.5A 1.6W -480mA -2.5A<br>**----- End of picture text -----**<br>


- _ID (continuous) is limited by max rated Tj ._ 

- _Mounted on FR5 board, 25mm x 25mm x 1.57mm._ 

## **Electrical Characteristics** _(TA = 25°C unless otherwise specified )_ 

**==> picture [542 x 374] intentionally omitted <==**

**----- Start of picture text -----**<br>
Sym Parameter Min Typ Max Units Conditions<br>BVDSS Drain-to-source breakdown voltage -100 - - V VGS = 0V, ID = -2.0mA<br>VGS(th) Gate threshold voltage -1.0 - -2.4 V VGS = VDS, ID= -1.0mA<br>∆VGS(th) Change in VGS(th) with temperature - - 5.0 mV/ [O] C VGS = VDS, ID= -1.0mA<br>IGSS Gate body leakage - - -100 nA VGS = ± 20V, VDS = 0V<br>- -10 μA VGS = 0V, VDS = Max Rating<br>IDSS Zero gate voltage drain current - - -1.0 mA VDS = 0.8 Max Rating,<br>VGS = 0V, TA = 125°C<br>I On-state drain current -0.4 -0.6 - A VGS = -5.0V, VDS = -25V<br>D(ON) -1.5 -2.5 - VGS = -10V, VDS = -25V<br>5.0 7.0 VGS = -5.0V, ID = -250mA<br>R Static drain-to-source on-state resistance - Ω<br>DS(ON) 2.0 3.5 VGS = -10V, ID = -750mA<br>∆RDS(ON) Change in RDS(ON) with temperature - - 1.7 %/ [O] C VGS = -10V, ID = -750mA<br>GFS Forward transconductance 300 360 - mmho VDS = -25V, ID = -750mA<br>CISS Input capacitance - 80 125 VGS = 0V,<br>COSS Common source output capacitance - 40 70 pF VDS = -25V,<br>CRSS Reverse transfer capacitance - 10 25 f = 1.0 MHz<br>td(ON) Turn-on delay time - - 10<br>t Rise time - - 15 VDD = -25V,<br>td(OFF)r Turn-off delay time - - 20 ns RID = -1.0A, = 25Ω<br>GEN<br>t Fall time - - 15<br>f<br>VSD Diode forward voltage drop - - -1.8 V VGS = 0V, ISD = -1.0A<br>trr Reverse recovery time - 300 - ns VGS = 0V, ISD = -1.0A<br>**----- End of picture text -----**<br>


_**Notes:**_ 

_1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)_ 

_2. All A.C. parameters sample tested._ 

## **Switching Waveforms and Test Circuit** 

**==> picture [471 x 128] intentionally omitted <==**

**----- Start of picture text -----**<br>
0V Pulse<br>10%<br>Generator<br>INPUT<br>R<br>-10V 90% GEN<br>t t<br>(ON) (OFF)<br>D.U.T.<br>td(ON) tr td(OFF) tf INPUT<br>OUTPUT<br>0V<br>OUTPUT 90% 90% RL<br>10% 10%<br>VDD<br>VDD<br>**----- End of picture text -----**<br>


_**Supertex inc.**_ 

_Doc.# DSFP-TP2510 C081413_ 

_**www.supertex.com**_ 

2 

**TP2510** 

## **Typical Performance Curves** 

## **BVDSS Variation with Temperature** 

**==> picture [200 x 192] intentionally omitted <==**

**----- Start of picture text -----**<br>
1.1<br>1.0<br>0.9<br>-50                     0                      50                     100                   150<br>Tj (°C)<br> (normalized)<br>DSS<br>BV<br>**----- End of picture text -----**<br>


## **Transfer Characteristics** 

**==> picture [197 x 192] intentionally omitted <==**

**----- Start of picture text -----**<br>
-5<br>-4<br>-3<br>-2<br>-1<br>0<br>0               -2.0              -4.0              -6.0              -8.0              -10<br>VGS (volts)<br>VDS = -25V<br>25°C<br>150°C<br>(amperes) TA = -55°C<br>ID<br>**----- End of picture text -----**<br>


## **Capacitance vs. Drain-to-Source Voltage** 

**==> picture [201 x 193] intentionally omitted <==**

**----- Start of picture text -----**<br>
200<br>f = 1MHz<br>150<br>100<br>CISS<br>50<br>CRSS<br>0<br>0                      -10                    -20                    -30                    -40<br>VDS (volts)<br>COSS<br>C (picofarads)<br>**----- End of picture text -----**<br>


**==> picture [155 x 8] intentionally omitted <==**

**----- Start of picture text -----**<br>
On-Resistance vs. Drain Current<br>**----- End of picture text -----**<br>


**==> picture [198 x 192] intentionally omitted <==**

**----- Start of picture text -----**<br>
10<br>VGS = -5V<br>8<br>VGS = -10V<br>6<br>4<br>2<br>0<br>0                -0.8              -1.6              -2.4              -3.2             -4.0<br>ID (amperes)<br>(ohms)<br>DS(ON)<br>R<br>**----- End of picture text -----**<br>


## **V(th) and RDS Variation with Temperature** 

**==> picture [224 x 416] intentionally omitted <==**

**----- Start of picture text -----**<br>
1.4 2.0<br>RDS(ON) @ -10V, -0.75A<br>1.2 1.6<br>1.0 1.2<br>0.8 0.8<br>V(th) @ -1mA<br>0.6 0.4<br>0.4 0<br>-50                     0                      50                     100                   150<br>Tj (°C)<br>Gate Drive Dynamic Characteristics<br>-10<br>142 pF<br>-8.0<br>VDS = -10V<br>-6.0<br>VDS = -40V<br>-4.0<br>71 pF<br>-2.0<br>0<br>0                                              1.0                                             2.0<br>QG (nanocoulombs)<br>(normalized) (normalized)<br>GS(th)  DS(ON)<br>V R<br>(volts)<br>GS<br>V<br>**----- End of picture text -----**<br>


_**Supertex inc.**_ 

_Doc.# DSFP-TP2510 C081413_ 

_**www.supertex.com**_ 

3 

**TP2510** 

## **Typical Performance Curves** _**(cont.)**_ 

**==> picture [109 x 10] intentionally omitted <==**

**----- Start of picture text -----**<br>
Output Characteristics<br>**----- End of picture text -----**<br>


**==> picture [202 x 193] intentionally omitted <==**

**----- Start of picture text -----**<br>
-5.0<br>-4.0<br>-3.0<br>VGS = -10V<br>-2.0<br>-8V<br>-6V<br>-1.0<br>-4V<br>-3V<br>0<br>0                -10              -20               -30               -40                -50<br>VDS (volts)<br>(amperes)<br>ID<br>**----- End of picture text -----**<br>


**==> picture [202 x 204] intentionally omitted <==**

**----- Start of picture text -----**<br>
Saturation Characteristics<br>-5.0<br>-4.0<br>-3.0<br>VGS = -10V<br>-2.0<br>-8V<br>-6V<br>-1.0<br>-4V<br>-3V<br>0<br>0               -2.0              -4.0              -6.0              -8.0               -10<br>VDS (volts)<br>(amperes)<br>ID<br>**----- End of picture text -----**<br>


## **Transconductance vs. Drain Current** 

**==> picture [210 x 10] intentionally omitted <==**

**----- Start of picture text -----**<br>
Power Dissipation vs. Ambient Temperature<br>**----- End of picture text -----**<br>


**==> picture [465 x 422] intentionally omitted <==**

**----- Start of picture text -----**<br>
0.5 2.0<br>VDS = -25V<br>TA = -55°C TO-243AA<br>0.4<br>TA = 25°C<br>0.3<br>1.0<br>TA = 125°C<br>0.2<br>0.1<br>0 0<br>0               -0.5              -1.0              -1.5              -2.0              -2.5 0             25             50             75            100           125          150<br>ID (amperes) TA (°C)<br>Maximum Rated Safe Operating Area Thermal Response Characteristics<br>-10 1.0<br>TO-243AA(pulsed)<br>0.8<br>-1.0<br>TO-243AA (DC) 0.6<br>0.4<br>-0.1<br>TO-243AA<br>TA = 25°C<br>0.2 PD = 1.6W<br>TA = 25°C<br>-0.01 0<br>-0.1                          -1.0                             -10                           -100 0.001              0.01                   0.1                    1.0                     10<br>VDS (volts) tp (seconds)<br>(watts)<br>(siemens) D<br>FS  P<br>G<br>(amperes)<br>ID<br>Thermal Resistance (normalized)<br>**----- End of picture text -----**<br>


_**Supertex inc.**_ 

_Doc.# DSFP-TP2510 C081413_ 

_**www.supertex.com**_ 

4 

**TP2510** 

## **3-Lead TO-243AA (SOT-89) Package Outline (N8)** 

**==> picture [217 x 195] intentionally omitted <==**

**----- Start of picture text -----**<br>
D<br>D1<br>E H<br>1  2  3<br>L<br>b  b1<br>e<br>e1<br>**----- End of picture text -----**<br>


**==> picture [85 x 162] intentionally omitted <==**

**----- Start of picture text -----**<br>
C<br>E1<br>A<br>**----- End of picture text -----**<br>


## **Top View** 

## **Side View** 

**==> picture [542 x 74] intentionally omitted <==**

**----- Start of picture text -----**<br>
Symbol A b b1 C D D1 E E1 e e1 H L<br>MIN 1.40 0.44 0.36 0.35 4.40 1.62 2.29 2.00 [†] 3.94 0.73 [†]<br>Dimensions 1.50 3.00<br>NOM - - - - - - - - - -<br>(mm) BSC BSC<br>MAX 1.60 0.56 0.48 0.44 4.60 1.83 2.60 2.29 4.25 1.20<br>**----- End of picture text -----**<br>


_JEDEC Registration TO-243, Variation AA, Issue C, July 1986._ _**†** This dimension differs from the JEDEC drawing_ _**Drawings not to scale** ._ 

_**Supertex Doc. #:** DSPD-3TO243AAN8, Version F111010._ 

_(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.)_ 

_**Supertex inc.**_ does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” _**Supertex inc.**_ does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the _**Supertex inc.**_ (website: http//www.supertex.com) 

> ©2013 _**Supertex inc.**_ All rights reserved. Unauthorized use or reproduction is prohibited. 

_**Supertex inc.**_ 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 _**www.supertex.com**_ 

_Doc.# DSFP-TP2510 C081413_ 

5 



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