# Thyristor, AEC-Q101, 1.2 kV, 50 mA, 25 A, 40 A, HU3PAK, 7 Pins

![Product image](https://novapart.co/image/farnell:4841452/)

**URL**: https://novapart.co/products/TN4050HP-12L2Y/thyristor-aec-q101-12-kv-50-ma-25-a-40-hu3pak-7
**SKU**: TN4050HP-12L2Y
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || Thyristors || Thyristors - SCRs
**Price**: €2.6500
**Stock**: 200+
**Lead Time**: 64 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 7Pins |
| Product Range | - |
| Thyristor Mounting | Surface Mount |
| Holding Current Max | 100mA |
| On State Rms Current | 40A |
| Thyristor Case Style | HU3PAK |
| Average On State Current | 25A |
| Gate Trigger Current Max | 50mA |
| Gate Trigger Voltage Max | 1.3V |
| Operating Temperature Max | 150°C |
| Peak Non Repetitive Surge Current | 440A |
| Peak Repetitive Off State Voltage | 1.2kV |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:4841452/)

**TN4050HP-12L2Y** 

Datasheet 

**==> picture [62 x 34] intentionally omitted <==**

## 40 A 1200 V automotive grade thyristor (SCR) 

**==> picture [144 x 136] intentionally omitted <==**

**----- Start of picture text -----**<br>
G<br>K<br>NCK K [K K K]<br>G<br>A<br>A<br>HU [3] PAK<br>A<br>**----- End of picture text -----**<br>


## **Features** 

- AEC-Q101 qualified 

- High junction temperature: 150 °C 

- AC off state voltage: +/- 1200 V 

- Nominal on-state RMS current: 40 ARMS 

- High EFT noise immunity: 1000 V/μs 

- Max. gate triggering current: 50 mA 

- ECOPACK2 compliant component 

## **Application** 

- On board charger 

- Capacitor discharge 

**Product status** TN4050HP-12L2Y 

- Overvoltage crowbar protection 

- Power supplies 

- AC switches 

- Solid state relays 

|**Product summary**|**Product summary**|
|---|---|
|**IT(RMS)**|40 A|
|**VDRM/VRRM**|1200 V|
|**VDSM/VRSM**|1400 V|
|**IGT**|50 mA|
|**Tj**|-40 to 150 °C|



## **Description** 

The TN4050HP-12L2Y is an automotive grade SCR thyristor designed for applications such as automotive on board and stationary battery chargers. 

This SCR Thyristor, rated for a 40 A RMS power switching, offers superior performances in peak voltage robustness up to 400 V sine wave pulse. Its key features allow the design of functions such as a 56 A RMS AC switch and a 50 A ACDC controlled rectifier-bridge. 

Available in HU3PAK package, it is ideal for compact SMD designs on surface mount boards or insulated metal substrate boards and and top-side cooling. 

**DS14126** - **Rev 3** - **October 2025** For further information, contact your local STMicroelectronics sales office. 

www.st.com 

**TN4050HP-12L2Y Characteristics** 

## **1 Characteristics** 

**Table 1. Absolute ratings (limiting values)** 

|**Symbol**|**Parameter**|**Parameter**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|---|---|
|IT(RMS)|RMS on-state current (180 ° conduction angle)||TC= 135 °C|40|A|
|IT(AV)|Average on-state current (180 ° conduction angle)|||25||
|ITSM|Non repetitive surge peak on-state<br>current, VR= 0 V|tp= 8.3 ms|Tjinitial = 25 °C|440|A|
|||tp= 10 ms||400||
|I2t|I2t value for fusing|tp= 10 ms|Tj= 25 °C|800|A2s|
|dl/dt|Critical rate of rise of on-state current,<br>IG= 2 x IGT, tr ≤ 100 ns|f = 50 Hz|Tj= 150 °C|200|A/µs|
|VDRM/ VRRM|Repetitive off-state voltage||Tj= 150 °C|1200|V|
|VDSM/ VRSM|Non repetitive surge peak off-state<br>voltage|tp= 10 ms|Tj= 25 °C|1400|V|
|VGM|Peak forward gate voltage|tp= 20 µs|Tj= 150 °C|10|V|
|IGM|Peak forward gate current|tp= 20 µs|Tj= 150 °C|8|A|
|VRGM|Maximum peak reverse gate voltage||Tj= 25 °C|5|V|
|PG(AV)|Average gate power dissipation||Tj= 150 °C|1|W|
|Tstg|Storage junction temperature range|||-40 to +150|°C|
|Tj|Operating junction temperature|||-40 to +150|°C|



**Table 2. Electrical characteristics (Tj = 25 °C unless otherwise specified)** 

|**Symbol**|**Test Conditions**|**Test Conditions**||**Value**|**Unit**|
|---|---|---|---|---|---|
|IGT|VD= 12 V, RL= 33 Ω||Min.|10|mA|
||||Max.|50||
|VGT|||Max.|1.3|V|
|IGD|VD= 800 V, RL= 3.3 Ω|Tj= 150 °C|Min.|3|mA|
|VGD|VD= 800 V, RL= 3.3 Ω|Tj= 150 °C|Min.|0.2|V|
|IH|IT= 500 mA, gate open||Max.|100|mA|
|IL|IG= 1.2 x IGT||Max.|125|mA|
|dV/dt|VD= 800 V, gate open|Tj= 150 °C|Min.|1000|V/µs|



**Table 3. Timing Parameters** 

|**Symbol**|**Test Conditions**|**Test Conditions**|**Test Conditions**|**Value**|**Unit**|
|---|---|---|---|---|---|
|tgt|IT= 80 A , VD= 800 V, IG= 100 mA, dIG/dt = 0.2 A/µs||Typ.|1|µs|
|tq|ITM= 25 A, VD= 800 V, dIT/dt = 10 A/µs,<br>VR= 75 V, dVD/dt = 20 V/µs, tp= 100 µs|Tj= 150 °C|Typ.|150|µs|



**DS14126** - **Rev 3** 

**page 2/12** 

**TN4050HP-12L2Y Characteristics** 

**Table 4. Static Characteristics** 

|**Symbol**|**Test Conditions**|||**Value**|**Unit**|
|---|---|---|---|---|---|
|VTM|ITM= 80 A, tP= 380 µs|Tj= 25 °C|Max.|1.55|V|
|VTO|On-state threshold voltage|Tj= 150 °C|Max.|0.83|V|
|RD|On-state dynamic resistance|Tj= 150 °C|Max.|10|mΩ|
|IDRM/IRRM|VD= VDRM, VR= VRRM|Tj= 25 °C|Max.|5|µA|
|||Tj= 125 °C||0.9|mA|
|||Tj= 150 °C||6|mA|
|IDSM/IRSM|VD= VDSM, VR= VRSM|Tj= 25 °C|Max.|10|µA|



## **Table 5. Thermal parameters** 

|**Symbol**|**Parameter**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|---|
|Rth(j-c)|Junction to case (DC)|Max.|0.4|°C/W|



**DS14126** - **Rev 3** 

**page 3/12** 

**TN4050HP-12L2Y Characteristics** 

## **1.1 Characteristics (curves)** 

**Figure 1. Maximum average power dissipation versus Figure 2. Average and D.C. on-state current versus case average on-state current temperature** 

**==> picture [221 x 151] intentionally omitted <==**

**----- Start of picture text -----**<br>
P(W)<br>45<br>40 α = 180 °  DC<br>α = 120 °<br>35 α = 90 °<br>30 α = 60 °<br>α = 30 °<br>25<br>20<br>15<br>10 360  °<br>5<br>IT(AV)(A) α<br>0<br>0 5 10 15 20 25 30 35<br>**----- End of picture text -----**<br>


**==> picture [223 x 152] intentionally omitted <==**

**----- Start of picture text -----**<br>
IT(AV)(A)<br>45<br>DC<br>40<br>35<br>30<br>α = 180 °<br>25<br>α = 120 °<br>20 α = 90 °<br>α = 60 °<br>15<br>α = 30 °<br>10<br>5<br>0 Tc(°C)<br>0 25 50 75 100 125 150<br>**----- End of picture text -----**<br>


**==> picture [513 x 191] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 3. Average and D.C. on-state current versus<br>Figure 4. On-state characteristics (maximum values)<br>ambient temperature<br>ITM(A)<br>4.0 IT(AV)(A) 1000<br>3.5<br>3.0  DC<br>100  Tj = 150 °C<br>2.5<br>α = 180 °<br>2.5<br>1.5 10<br>1.0<br>T j  max: 150 °C<br>0.5  T j  = 25 °C VT0 = 0.83 V<br>Ta( ° C) 1 VTM (V) RD = 10 mΩ<br>0.0<br>0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5<br>0 25 50 75 100 125 150<br>**----- End of picture text -----**<br>


**==> picture [513 x 193] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 5. Surge peak on-state current versus number of  Figure 6. Non repetitive surge peak on-state current for a<br>cycles sinusoidal pulse with width tp < 10 ms<br>ITSM(A) ITSM(A)<br>450 10000<br>dI/dt limitation: 200 A/µs<br>400 Non repetitive T j  = 25 °C Tj initial = 25 °C<br>350 tp=10ms<br>300 One cycle  1000<br>250 VR = 0 V ITSM<br>200<br>150 100<br>Repetitive Tc = 135 °C<br>100<br>50 Number of cycles t P (ms)<br>0 10<br>1 10 100 1000 0.01 0.10 1.00 10.00<br>**----- End of picture text -----**<br>


**DS14126** - **Rev 3** 

**page 4/12** 

**TN4050HP-12L2Y Characteristics** 

**Figure 7. Relative variation of leakage current versus junction temperature for different values of blocking voltage (typical values)** 

**==> picture [225 x 151] intentionally omitted <==**

**----- Start of picture text -----**<br>
IDRM, IRRM [ Tj ;VDRM , VRRM] / IDRM / IRRM<br>1.0E+00<br>1.0E-01<br>1.0E-02 V  DRM = V RRM = 1200 V<br>1.0E-03<br>1.0E-04<br>T (°C)<br>j<br>1.0E-05<br>25 50 75 100 125 150<br>**----- End of picture text -----**<br>


**Figure 8. Relative variation of holding and latching current versus junction temperature (typical values)** 

**==> picture [221 x 154] intentionally omitted <==**

**----- Start of picture text -----**<br>
1.8 IH, IL [ Tj ] / IH, IL [ Tj = 25 °C]<br>1.5<br> IL<br>1.3<br> IH<br>1.0<br>0.8<br>0.5<br>0.3<br>Tj(°C)<br>0.0<br>-40 -20 0 20 40 60 80 100 120 140<br>**----- End of picture text -----**<br>


**==> picture [513 x 191] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 9. Relative variation of gate trigger current and  Figure 10. Relative variation of thermal impedance<br>gate voltage versus junction temperature (typical values) junction to case versus pulse duration<br>2.0 IGT, VGT [ Tj ] / IGT, VGT [ Tj = 25 °C] 1.0E+00 K=[Zth /Rth]<br>Zth(j-c)<br> I<br>1.5 GT<br>1.0  VGT<br>0.5<br>tP(s)<br>1.0E-01<br>Tj(°C) 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 1.0E+03<br>0.0<br>-40 -20 0 20 40 60 80 100 120 140<br>**----- End of picture text -----**<br>


**Figure 11. Relative variation of static dV/dt immunity versus junction temperature** 

**==> picture [222 x 151] intentionally omitted <==**

**----- Start of picture text -----**<br>
dV/dt [ Tj ] / dV/dt [ Tj = 150 °C]<br>6<br>VD = VR = 800 V<br>5<br>4<br>3<br>2<br>1<br>Tj(°C)<br>0<br>25 50 75 100 125 150<br>**----- End of picture text -----**<br>


**DS14126** - **Rev 3** 

**page 5/12** 

**TN4050HP-12L2Y Package information** 

## **2 Package information** 

To meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions, and product status are available at: www.st.com. ECOPACK is an ST trademark. 

## **2.1 HU3PAK package information** 

- Epoxy meets UL94, V0 

## **Figure 12. HU3PAK package outline** 

**==> picture [157 x 92] intentionally omitted <==**

**----- Start of picture text -----**<br>
×<br>DM00674007_2<br>**----- End of picture text -----**<br>


_Note: This package drawing may slightly differ from the physical package. However, all the specified dimensions are guaranteed._ 

**DS14126** - **Rev 3** 

**page 6/12** 

**TN4050HP-12L2Y Package information** 

**Table 6. HU3PAK package mechanical data** 

||**Dimensions**|**Dimensions**|**Dimensions**|
|---|---|---|---|
|**Ref.**|**mm**|||
||**Min.**|**Typ.**|**Max.**|
|A|3.40|3.50|3.60|
|A1||0.05||
|b|0.50|0.60|0.70|
|b2|0.50|0.70|1.00|
|b3|0.80|0.90|1.00|
|c|0.40|0.50|0.60|
|c2|0.40|0.50|0.60|
|D|11.70|11.80|11.90|
|D1|8.80|8.955|9.10|
|E|13.90|14.00|14.10|
|E1|12.30|12.40|12.50|
|E2|7.75|7.80|7.85|
|e|BSC 1.27|||
|H|18.00|18.58|19.00|
|L|2.40|2.52|2.60|
|L1||3.05||
|L2|0.90|1.00|1.10|
|L3|BSC 0.26|||
|L4|0.075|0.125|0.175|
|L5|1.83|1.93|2.03|
|L6|2.14|2.24|2.34|
|L7|4.44|4.54|4.64|
|aaa||0.10||
|F1|2.90|3.00|3.10|
|F2|2.40|2.50|2.60|
|F3|0.25|0.35|0.45|
|N1|3.80|3.90|4.00|
|N2|0.25|0.30|0.45|
|N3|0.80|0.90|1.00|
|T|0.50|0.67|0.70|
|T2|9.18|9.38|9.43|
|θ1||0°|8°|
|θ2||0°|8°|



1. Package outline exclusive of any mold flashes dimensions. 

2. Package outline exclusive of burr dimensions. 

3. Max resin gate protrusion: 0.25 mm. 

4. The planarity of the package backside 50 micron max. 

5. BSC: basic spacing between centers 

**DS14126** - **Rev 3** 

**page 7/12** 

**TN4050HP-12L2Y Package information** 

**Figure 13. HU3PAK recommended footprint (dimensions are in mm)** 

**==> picture [271 x 180] intentionally omitted <==**

**----- Start of picture text -----**<br>
3.00 1.50<br>19.00<br>DM00674007_2<br>2.<br>4<br>6 X 1.2 5<br>7<br>14.70<br>7 X 0.90<br>**----- End of picture text -----**<br>


_Note: For packing details you can see technical note TN1173: Packing information for IPAD, protection, rectifiers, thyristors and AC Switches._ 

**DS14126** - **Rev 3** 

**page 8/12** 

**TN4050HP-12L2Y Package information** 

## **2.2 HU[3] PAK packing information** 

**Figure 14. HU[3] PAK carrier tape outline** 

**Table 7. HU[3] PAK tape and reel mechanical data** 

||**Tape**||
|---|---|---|
|||**mm**|
|**Dim.**|||
|||**Value**|
|A0||14.40 ±0.1|
|B0||19.70|
|D||1.50 ±0.1|
|E||1.75 ±0.1|
|F||15.65 ±0.1|
|I0||11.00|
|I1||11.60 ±0.1|
|I2||8.0|
|I3||7.0|
|K0||4.20|
|P0||4.00 ±0.1|
|P1||20.00 ±0.1|
|P2||2.00 ±0.1|
|T||0.40 ±0.5|
|W||32.00 ±0.3|



**DS14126** - **Rev 3** 

**page 9/12** 

**TN4050HP-12L2Y Ordering information** 

**3 Ordering information** 

## **Figure 15. Ordering information scheme** 

## **Table 8. Ordering information** 

|**Order code**|**Marking**|**Package**|**Weight**|**Base qty.**|**Delivery mode**|
|---|---|---|---|---|---|
|TN4050HP-12L2Y|TN4050HP12Y|HU3PAK|2.32 g|600|Tape and reel 13"|



**DS14126** - **Rev 3** 

**page 10/12** 

**TN4050HP-12L2Y** 

## **Revision history** 

**Table 9. Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|08-Dec-2022|1|Initial release.|
|27-May-2024|2|UpdatedTable 5. Thermal parameterswith Rth(j-c)value.|
|22-Oct-2025|3|UpdatedSection 3: Ordering information.|



**DS14126** - **Rev 3** 

**page 11/12** 

**TN4050HP-12L2Y** 

## **IMPORTANT NOTICE – READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. 

In the event of any conflict between the provisions of this document and the provisions of any contractual arrangement in force between the purchasers and ST, the provisions of such contractual arrangement shall prevail. 

The purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgment. 

The purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of the purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

If the purchasers identify an ST product that meets their functional and performance requirements but that is not designated for the purchasers' market segment, the purchasers shall contact ST for more information. 

ST and the ST logo are trademarks of ST. For additional information about ST trademarks, refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2025 STMicroelectronics – All rights reserved 

**DS14126** - **Rev 3** 

**page 12/12** 



## Links

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- [Supplier page](https://es.farnell.com/stmicroelectronics/tn4050hp-12l2y/thyristor-1-2kv-25a-hu3pak/dp/4841452)
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