# Bipolar (BJT) Single Transistor, PNP, 80 V, 8 A, 80 W, TO-220AB, Through Hole

![Product image](https://novapart.co/image/farnell:2774806/)

**URL**: https://novapart.co/products/TIP106G/bipolar-bjt-single-transistor-pnp-80-v-8-a-w-to
**SKU**: TIP106G
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || Transistors || Bipolar Transistors || Single Bipolar Junction Transistors - BJT
**Price**: €0.3390
**Stock**: 10+

## Specifications

| Parameter | Value |
|---|---|
| No. Of Pins | 3Pins |
| Power Dissipation | 80W |
| Dc Current Gain Hfe | 1000hFE |
| Transistor Mounting | Through Hole |
| Transistor Polarity | PNP |
| Transition Frequency | 4MHz |
| Transistor Case Style | TO-220AB |
| Dc Current Gain Hfe Min | 1000hFE |
| Operating Temperature Max | 150°C |
| Continuous Collector Current | 8A |
| Collector Emitter Voltage Max | 80V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2774806/)

## TIP100, TIP101, TIP102 (NPN); TIP105, TIP106, TIP107 (PNP) 

## Plastic Medium-Power Complementary Silicon Transistors 

Designed for general−purpose amplifier and low−speed switching applications. 

## **Features** 

- High DC Current Gain − 

**www.onsemi.com** 

**DARLINGTON 8 AMPERE COMPLEMENTARY SILICON POWER TRANSISTORS 60−80−100 VOLTS, 80 WATTS** 

   - hFE = 2500 (Typ) @ IC = 4.0 Adc 

- Collector−Emitter Sustaining Voltage − @ 30 mAdc VCEO(sus) = 60 Vdc (Min) − TIP100, TIP105 = 80 Vdc (Min) − TIP101, TIP106 = 100 Vdc (Min) − TIP102, TIP107 

• Low Collector−Emitter Saturation Voltage − VCE(sat) = 2.0 Vdc (Max) @ IC = 3.0 Adc 

   - = 2.5 Vdc (Max) @ IC = 8.0 Adc 

- Monolithic Construction with Built−in Base−Emitter Shunt Resistors 

- Pb−Free Packages are Available* 

**MARKING DIAGRAM** 

**==> picture [164 x 158] intentionally omitted <==**

**----- Start of picture text -----**<br>
4<br>TO−220AB<br>CASE 221A TIP10xG<br>STYLE 1 AYWW<br>STYLE 1:<br>PIN 1. BASE<br>1 f 2. COLLECTOR<br>2 3. EMITTER<br>3 4. COLLECTOR<br>TIP10x = Device Code<br>x = 0, 1, 2, 5, 6, or 7<br>A = Assembly Location<br>Y = Year<br>WW = Work Week<br>G = Pb−Free Package<br>**----- End of picture text -----**<br>


## **ORDERING INFORMATION** 

See detailed ordering and shipping information on page 3 of this data sheet. 

> *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

Publication Order Number: **TIP100/D** 

**1** 

© Semiconductor Components Industries, LLC, 2014 **November, 2014 − Rev. 14** 

## **TIP100, TIP101, TIP102 (NPN); TIP105, TIP106, TIP107 (PNP)** 

## **MAXIMUM RATINGS** 

|**MAXIMUM RATINGS**||||||
|---|---|---|---|---|---|
|**Rating**|**Symbol**|**TIP100,**<br>**TIP105**|**TIP101,**<br>**TIP106**|**TIP102,**<br>**TIP107**|**Unit**|
|Collector − Emitter Voltage|VCEO|60|80|100|Vdc|
|Collector − Base Voltage|VCB|60|80|100|Vdc|
|Emitter − Base Voltage|VEB|5.0|||Vdc|
|Collector Current −Continuous<br>−Peak|IC|8.0<br>15|||Adc|
|Base Current|IB|1.0|||Adc|
|Total Power Dissipation @ TC= 25°C<br>Derate above 25°C|PD|80<br>0.64|||W<br>W/°C|
|Unclamped Inductive Load Energy (1)|E|30|||mJ|
|Total Power Dissipation @ TA= 25°C<br>Derate above 25°C|PD|2.0<br>0.016|||W<br>W/°C|
|Operating and Storage Junction Temperature Range|TJ, Tstg|–65 to +150|||°C|
|**THERMAL CHARACTERISTICS**||||||
|**Characteristic**|**Symbol**|**Max**|||**Unit**|
|Thermal Resistance, Junction−to−Case|R�JC|1.56|||°C/W|
|Thermal Resistance, Junction−to−Ambient|R�JA|62.5|||°C/W|



Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. IC = 1.1 A, L = 50 mH, P.R.F. = 10 Hz, VCC = 20 V, RBE = 100 � 

**ELECTRICAL CHARACTERISTICS** (TC = 25 ° C unless otherwise noted) 

|**ELECTRICAL CHARACTERISTICS**(TC= 25°C unless otherwise noted)|||||
|---|---|---|---|---|
|**Characteristic**|**Symbol**|**Min**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**|||||
|Collector−Emitter Sustaining Voltage (1)<br>(IC= 30 mAdc, IB= 0)<br>TIP100, TIP105<br>TIP101, TIP106<br>TIP102, TIP107|VCEO(sus)|60<br>80<br>100|−<br>−<br>−|Vdc|
|Collector Cutoff Current<br>(VCE= 30 Vdc, IB= 0)<br>TIP100, TIP105<br>(VCE= 40 Vdc, IB= 0)<br>TIP101, TIP106<br>(VCE= 50 Vdc, IB= 0)<br>TIP102, TIP107|ICEO|−<br>−<br>−|50<br>50<br>50|�Adc|
|Collector Cutoff Current<br>(VCB= 60 Vdc, IE= 0)<br>TIP100, TIP105<br>(VCB= 80 Vdc, IE= 0)<br>TIP101, TIP106<br>(VCB= 100 Vdc, IE= 0)<br>TIP102, TIP107|ICBO|−<br>−<br>−|50<br>50<br>50|�Adc|
|Emitter Cutoff Current (VBE= 5.0 Vdc, IC= 0)|IEBO|−|8.0|mAdc|
|**ON CHARACTERISTICS (1)**|||||
|DC Current Gain<br>(IC= 3.0 Adc, VCE= 4.0 Vdc)<br>(IC= 8.0 Adc, VCE= 4.0 Vdc)|hFE|1000<br>200|20,000<br>−|−|
|Collector−Emitter Saturation Voltage<br>(IC= 3.0 Adc, IB= 6.0 mAdc)<br>(IC= 8.0 Adc, IB= 80 mAdc)|VCE(sat)|−<br>−|2.0<br>2.5|Vdc|
|Base−Emitter On Voltage (IC= 8.0 Adc, VCE= 4.0 Vdc)|VBE(on)|−|2.8|Vdc|
|**DYNAMIC CHARACTERISTICS**|||||
|Small−Signal Current Gain (IC= 3.0 Adc, VCE= 4.0 Vdc, f = 1.0 MHz)|hfe|4.0|−|−|
|Output Capacitance (VCB= 10 Vdc, IE= 0, f = 0.1 MHz)<br>TIP105, TIP106, TIP107<br>TIP100, TIP101, TIP102|Cob|−<br>−|300<br>200|pF|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 

2. Pulse Test: Pulse Width � 300 � s, Duty Cycle � 2%. 

**www.onsemi.com** 

**2** 

**TIP100, TIP101, TIP102 (NPN); TIP105, TIP106, TIP107 (PNP)** 

**==> picture [275 x 122] intentionally omitted <==**

**----- Start of picture text -----**<br>
COLLECTOR COLLECTOR<br>BASE BASE<br>≈ 8.0 k ≈ 120 ≈ 8.0 k ≈ 120<br>EMITTER EMITTER<br>**----- End of picture text -----**<br>


**Figure 1. Darlington Circuit Schematic** 

## **ORDERING INFORMATION** 

|**ORDERING INFORMATION**|||
|---|---|---|
|**Device**|**Package**|**Shipping**|
|TIP100|TO−220|50 Units / Rail|
|TIP100G|TO−220<br>(Pb−Free)|50 Units / Rail|
|TIP101|TO−220|50 Units / Rail|
|TIP101G|TO−220<br>(Pb−Free)|50 Units / Rail|
|TIP102|TO−220|50 Units / Rail|
|TIP102G|TO−220<br>(Pb−Free)|50 Units / Rail|
|TIP105|TO−220|50 Units / Rail|
|TIP105G|TO−220<br>(Pb−Free)|50 Units / Rail|
|TIP106|TO−220|50 Units / Rail|
|TIP106G|TO−220<br>(Pb−Free)|50 Units / Rail|
|TIP107|TO−220|50 Units / Rail|
|TIP107G|TO−220<br>(Pb−Free)|50 Units / Rail|



**==> picture [254 x 189] intentionally omitted <==**

**----- Start of picture text -----**<br>
TA TC<br>4.0 80<br>3.0 60<br>TC<br>2.0 40<br>1.0 20<br>TA<br>0 0<br>0 20 40 60 80 100 120 140 160<br>T, TEMPERATURE (°C)<br>PD, POWER DISSIPATION (WATTS)<br>**----- End of picture text -----**<br>


**Figure 2. Power Derating** 

**www.onsemi.com** 

**3** 

**TIP100, TIP101, TIP102 (NPN); TIP105, TIP106, TIP107 (PNP)** 

**==> picture [489 x 600] intentionally omitted <==**

**----- Start of picture text -----**<br>
5.0<br>RB & RC VARIED TO OBTAIN DESIRED CURRENT LEVELS -�30 VVCC 3.0 ts PNP NPN<br>D1, MUST BE FAST RECOVERY TYPE, eg: 2.0<br>�1N5825 USED ABOVE IB ≈ 100 mA RC<br>�MSD6100 USED BELOW IB ≈ 100 mA TUT SCOPE 1.0 tf<br>V2 RB 0.7<br>approx<br>+�8.0 V 0.5<br>0 51 D1 ≈ 8.0 k ≈ 120 0.3<br>V1 +�4.0 V 0.2 VCC = 30 V tr<br>approx-12 V 25 �s for td and tr, D1 is disconnected 0.1 IICB1/I = IB = 250B2<br>tr, tf ≤ 10 ns and V2 = 0 0.07 TJ = 25°C td @ VBE(off) = 0 V<br>DUTY CYCLE = 1.0% 0.05<br>For NPN test circuit reverse all polarities. 0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10<br>IC, COLLECTOR CURRENT (AMP)<br>Figure 3. Switching Times Test Circuit Figure 4. Switching Times<br>1.0<br>0.7<br>D = 0.5<br>0.5<br>0.3<br>0.2<br>0.2<br>0.1<br>0.1 Z�JC(t) = r(t) R�JC P(pk)<br>0.07 0.05 R� JC  = 1.56°C/W MAX<br>0.05 D CURVES APPLY FOR POWER<br>0.02<br>PULSE TRAIN SHOWN<br>0.03 t 1<br>READ TIME AT t1 t2<br>0.02 0.01 SINGLE PULSE T J(pk)  - T C  = P (pk)  Z �JC(t) DUTY CYCLE, D = t 1 /t 2<br>0.010.01 0.02 0.05 0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 100 200 500 1.0 k<br>t, TIME (ms)<br>Figure 5. Thermal Response<br>20 There are two limitations on the power handling ability of<br>10 5�ms a transistor: average junction temperature and second<br>5.0 breakdown. Safe operating area curves indicate IC − VC − V − VCE<br>100 �s limits of the transistor that must be observed for reliable<br>2.0 TJ = 150°C 1�ms d­c operation; i.e., the transistor must not be subjected to greater<br>1.0 BONDING WIRE LIMITED dissipation than the curves indicate.<br>0.5 THERMALLY LIMITED @ TC = 25°C The data of Figure 6 is based on TJ(pk) = 150°C; TCJ(pk) = 150°C; TC = 150°C; TC°C; TCC; TCC is<br>SECOND BREAKDOWN LIMITED variable depending on conditions. Second breakdown pulse<br>0.2 CURVES APPLY BELOW RATED VCEO limits are valid for duty cycles to 10% provided TJ(pk)<br>0.1 TIP100, TIP105 < 150°C.  TJ(pk) may be calculated from the data in Figure 5.°C.  TJ(pk) may be calculated from the data in Figure 5.C.  TJ(pk) may be calculated from the data in Figure 5.J(pk) may be calculated from the data in Figure 5. may be calculated from the data in Figure 5.<br>0.05 TIP101, TIP106 At high case temperatures, thermal limitations will reduce<br>TIP102, TIP107 the power that can be handled to values less than the<br>0.021.0 2.0 5.0 10 20 50 100 limitations imposed by second breakdown<br>VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)<br>μ<br>t, TIME (��s)<br>(NORMALIZED)<br>r(t), TRANSIENT THERMAL RESISTANCE<br>IC, COLLECTOR CURRENT (mA)<br>**----- End of picture text -----**<br>


There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC − VC − V − VCE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. 

The data of Figure 6 is based on TJ(pk) = 150°C; TCJ(pk) = 150°C; TC = 150°C; TC°C; TCC; TCC is variable depending on conditions. Second breakdown pulse limits are valid for duty cycles to 10% provided TJ(pk) < 150°C.  TJ(pk) may be calculated from the data in Figure 5.°C.  TJ(pk) may be calculated from the data in Figure 5.C.  TJ(pk) may be calculated from the data in Figure 5.J(pk) may be calculated from the data in Figure 5. may be calculated from the data in Figure 5. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown 

**Figure 6. Active−Region Safe Operating Area** 

**www.onsemi.com** 

**4** 

**TIP100, TIP101, TIP102 (NPN); TIP105, TIP106, TIP107 (PNP)** 

**==> picture [242 x 408] intentionally omitted <==**

**----- Start of picture text -----**<br>
10,000<br>5000 T C  = 25°C<br>3000 VCE = 4.0 Vdc<br>2000 IC = 3.0 Adc<br>1000<br>500<br>300<br>200<br>100<br>50<br>30 PNP<br>20<br>NPN<br>10<br>1.0 2.0 5.0 10 20 50 100 200 500 1000<br>f, FREQUENCY (kHz)<br>Figure 7. Small−Signal Current Gain<br>300<br>TJ = 25°C<br>200<br>Cob<br>100<br>Cib<br>70<br>50<br>PNP<br>NPN<br>30<br>0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 100<br>VR, REVERSE VOLTAGE (VOLTS)<br>hfe , SMALL-SIGNAL CURRENT GAIN<br>C, CAPACITANCE (pF)<br>**----- End of picture text -----**<br>


**Figure 8. Capacitance** 

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**5** 

**TIP100, TIP101, TIP102 (NPN); TIP105, TIP106, TIP107 (PNP)** 

**==> picture [98 x 19] intentionally omitted <==**

**----- Start of picture text -----**<br>
NPN<br>TIP100, TIP101, TIP102<br>**----- End of picture text -----**<br>


**PNP TIP105, TIP106, TIP107** 

**==> picture [485 x 614] intentionally omitted <==**

**----- Start of picture text -----**<br>
20,000 20,000<br>VCE = 4.0 V VCE = 4.0 V<br>10,000 10,000<br>5000 TJ = 150°C 70005000 TJ = 150°C<br>3000 25°C 3000 25°C<br>2000 2000 -�55°C<br>-�55°C<br>1000 1000<br>700<br>500 500<br>300 300<br>200 200<br>0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10<br>IC, COLLECTOR CURRENT (AMP) IC, COLLECTOR CURRENT (AMP)<br>Figure 9. DC Current Gain<br>3.0 3.0<br>TJ = 25°C TJ = 25°C<br>2.6 2.6<br>2.2 IC = 2.0 A 4.0 A 6.0 A 2.2 IC = 2.0 A 4.0 A 6.0 A<br>1.8 1.8<br>1.4 1.4<br>1.0 1.0<br>0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 20 30 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 20 30<br>IB, BASE CURRENT (mA) IB, BASE CURRENT (mA)<br>Figure 10. Collector Saturation Region<br>3.0 3.0<br>TJ = 25°C TJ = 25°C<br>2.5 2.5<br>2.0 2.0<br>1.5 VBE(sat) @ IC/IB = 250 1.5 VBE @ VCE = 4.0 V<br>VBE @ VCE = 4.0 V VBE(sat) @ IC/IB = 250<br>1.0 1.0<br>VCE(sat) @ IC/IB = 250 VCE(sat) @ IC/IB = 250<br>0.5 0.5<br>0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10<br>IC, COLLECTOR CURRENT (AMP) IC, COLLECTOR CURRENT (AMP)<br>hFE, DC CURRENT GAIN hFE, DC CURRENT GAIN<br>VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS) VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)<br>V, VOLTAGE (VOLTS) V, VOLTAGE (VOLTS)<br>**----- End of picture text -----**<br>


**Figure 11. “On” Voltages** 

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**6** 

**TIP100, TIP101, TIP102 (NPN); TIP105, TIP106, TIP107 (PNP)** 

## **PACKAGE DIMENSIONS** 

**TO−220** CASE 221A−09 ISSUE AH 

NOTES: 

**==> picture [233 x 186] intentionally omitted <==**

**----- Start of picture text -----**<br>
SEATING<br>−T− PLANE<br>B F C<br>T S<br>4<br>Q A<br>1 2 3 U<br>H<br>K<br>Z<br>L R<br>T V W J |<br>G<br>D<br>;<br>N<br>**----- End of picture text -----**<br>


1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 

2. CONTROLLING DIMENSION: INCH. 

3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. 

|**DIM**|**INCHES**|**INCHES**|**MILLIMETERS**|**MILLIMETERS**|
|---|---|---|---|---|
||**MIN**<br>**INCHES**|**MAX**<br>**INCHES**|**MIN**<br>**MILLIMETERS**|**MAX**<br>**MILLIMETERS**|
|**DIM**<br>**A**|**MIN**<br>0.570|**MAX**<br>0.620|**MIN**<br>14.48|**MAX**<br>15.75|
|**B**|0.380|0.415|9.66|10.53|
|**B**<br>**C**|0.380<br>0.160|0.415<br>0.190|9.66<br>4.07|10.53<br>4.83|
|**D**|0.025|0.038|0.64|0.96|
|**F**|0.142|0.161|3.61|4.09|
|**G**|0.095|0.105|2.42|2.66|
|**H**|0.110|0.161|2.80|4.10|
|**J**|0.014|0.024|0.36|0.61|
|**K**|0.500|0.562|12.70|14.27|
|**L**|0.045|0.060|1.15|1.52|
|**N**|0.190|0.210|4.83|5.33|
|**Q**|0.100|0.120|2.54|3.04|
|**Q**<br>**R**<br>SSeEe|0.100<br>0.080<br>SSeEe|0.120<br>0.110<br>SSeEe|2.54<br>2.04<br>SSeEe|3.04<br>2.79<br>SSeEe|
|**S**<br>SSeEe|0.045<br>SSeEe|0.055<br>SSeEe|1.15<br>SSeEe|1.39<br>SSeEe|
|**S**<br>**T**<br>SSeEe|0.045<br>0.235<br>SSeEe|0.055<br>0.255<br>SSeEe|1.15<br>5.97<br>SSeEe|1.39<br>6.47<br>SSeEe|
|**U**<br>SSeEe|0.000<br>SSeEe|0.050<br>SSeEe|0.00<br>SSeEe|1.27<br>SSeEe|
|**V**<br>SSeEe|0.045<br>SSeEe|---<br>SSeEe|1.15<br>SSeEe|---<br>SSeEe|
|**Z**<br>SSeEe|---<br>SSeEe|0.080<br>SSeEe|---<br>SSeEe|2.04<br>SSeEe|



ON Semiconductor and the         are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf.  SCILLC reserves the right to make changes without further notice to any products herein.  SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time.  All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.  SCILLC does not convey any license under its patent rights nor the rights of others.  SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.  Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.  SCILLC is an Equal Opportunity/Affirmative Action Employer.  This literature is subject to all applicable copyright laws and is not for resale in any manner. 

## **PUBLICATION ORDERING INFORMATION** 

## **LITERATURE FULFILLMENT** : 

Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA **Phone** : 303−675−2175 or 800−344−3860 Toll Free USA/Canada **Fax** : 303−675−2176 or 800−344−3867 Toll Free USA/Canada **Email** : orderlit@onsemi.com 

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**TIP100/D** 

**7** 



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