# Triac, 800 V, 8 A, TO-263 (D2PAK), 1.3 V, 80 A, 35 mA

![Product image](https://novapart.co/image/farnell:3605818/)

**URL**: https://novapart.co/products/T835H-8G-TR/triac-800-v-8-a-to-263-d2pak-13-80-35-ma
**SKU**: T835H-8G-TR
**Manufacturer**: STMICROELECTRONICS
**Price**: €0.5250
**Stock**: 500+
**Lead Time**: 120 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Product Range | H |
| Triac Case Style | TO-263 (D2PAK) |
| Thyristor Mounting | Surface Mount |
| Holding Current Max | 35mA |
| On State Rms Current | 8A |
| Peak On State Voltage | 1.5V |
| Gate Trigger Voltage Max | 1.3V |
| Operating Temperature Max | 150°C |
| Peak Non Repetitive Surge Current | 80A |
| Peak Repetitive Off State Voltage | 800V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3605818/)

**T835H-8G** 

Datasheet 

## 8 A - 800 V - 150 °C H-series Triac in D[2] PAK 

**==> picture [93 x 196] intentionally omitted <==**

**----- Start of picture text -----**<br>
A2<br>G<br>A1<br>A2<br>A2<br>A1<br>G<br>D²PAK<br>**----- End of picture text -----**<br>


## **Features** 

- 8 A medium current Triac 

- 800 V symmetrical blocking voltage 

- 150 °C maximum junction temperature Tj 

- Three triggering quadrants 

- High noise immunity - static dV/dt 

- Robust dynamic turn-off commutation - (dl/dt)c 

- ECOPACK2 compliant component 

- Molding resin UL94-V0 flammability certified 

## **Applications** 

- General purpose AC line load control 

- AC induction and universal motor control 

- Lighting and automation I/O control 

- Water heater, room heater and coffee machine 

- Home automation smart AC plug 

- Inrush current limiter in AC DC rectifiers 

## **Description** 

## **Product status link** 

T835H-8G 

|**Product summary**|**Product summary**|
|---|---|
|**IT(RMS)**|8 A|
|**VDRM/VRRM**|800 V|
|**VDSM/VRSM**|900 V|
|**IGT**|35 mA|
|**Tj max.**|150 °C|



Specifically designed to operate at 800 V and 150 °C, the T835H-8G Triac housed in D[2] PAK provides an enhanced thermal management: this 8 A Triac is the right choice for a compact drive of AC loads and enables the heatsink size reduction. 

D[2] PAK package is ideal for compact SMD designs on surface mount boards or insulated metal substrate boards. 

Based on the ST high temperature Snubberless technology, it offers higher specified turn off commutation and noise immunity levels up to the Tj max. 

The T835H-8G safely optimizes the control of the hardest universal motors, heaters and inductive loads for industrial control and home appliances. 

Snubberless is a trademark of STMicroelectronics. 

**DS13570** - **Rev 1** - **November 2020** For further information contact your local STMicroelectronics sales office. 

www.st.com 

**T835H-8G Characteristics** 

**1 Characteristics** 

**Table 1. Absolute maximum ratings (limiting values)** 

|**Symbol**|**Parameter**||**Value**|**Unit**|
|---|---|---|---|---|
|IT(RMS)|RMS on-state current (full sine wave)|Tc= 139 °C|8|A|
|ITSM|Non repetitive surge peak on-state current (full cycle,<br>Tjinitial = 25 °C)|t = 16.7 ms|84|A|
|||t = 20 ms|80||
|I2t|I2t value for fusing|tp= 10 ms|42|A2s|
|dl/dt|Critical rate of rise of on-state current, IG= 2 x IGT, tr<br>≤ 100 ns, f = 100 Hz|Tj= 25 °C|100|A/µs|
|VDRM/VRRM|Repetitive peak off-state voltage||800|V|
|VDSM/VRSM|Non Repetitive peak off-state voltage|tp= 10 ms, Tj= 25 °C|900|V|
|IGM|Peak gate current|tp= 20 µs, Tj= 150 °C|4|A|
|PGM|Maximum gate power dissipation||5|W|
|PG(AV)|Average gate power dissipation|Tj= 150 °C|1|W|
|Tstg|Storage temperature range||-40 to +150|°C|
|Tj|Operating junction temperature range||-40 to +150|°C|



**Table 2. Electrical characteristics (Tj = 25 °C, unless otherwise specified)** 

|**Symbol**|**Test conditions**|**Test conditions**|**Quadrants**||**Value**|**Unit**|
|---|---|---|---|---|---|---|
|IGT|VD= 12 V, RL= 30 Ω||I - II - III|Min.|5|mA|
|||||Max.|35|mA|
|VGT|VD= 12 V, RL= 30 Ω||I - II - III|Max.|1.3|V|
|VGD|VD= VDRM, RL= 3.3 kΩ|Tj= 150 °C|I - II - III|Min.|0.15|V|
|IL|IG= 1.2 x IGT||I - III|Max.|50|mA|
||||II|Max.|80|mA|
|IH (1)|IT= 500 mA, gate open|||Max.|35|mA|
|dV/dt(1)|VD= VR= 536 V, gate open||Tj= 150 °C|Min.|2000|V/µs|
|(dl/dt)c(1)|Without snubber network||Tj= 150 °C|Min.|8|A/ms|



_1. For both polarities of A2 referenced to A1._ 

**DS13570** - **Rev 1** 

**page 2/12** 

**T835H-8G Characteristics** 

## **Table 3. Static characteristics** 

|**Symbol**|**Test conditions**|**Tj**||**Value**|**Unit**|
|---|---|---|---|---|---|
|VTM (1)|ITM= 11 A, tp= 380 µs|25 °C|Max.|1.50|V|
|VTO (1)|Threshold voltage|150 °C|Max.|0.83|V|
|RD(1)|Dynamic resistance|150 °C|Max.|45|mΩ|
|IDRM/IRRM|VD= VR= VDRM= VRRM|25 °C|Max.|1.5|µA|
|||150°C||3.5|mA|
||VD= VR= 400 V, peak voltage|150 °C|Max.|1.3|mA|



_1. For both polarities of A2 referenced to A1._ 

## **Table 4. Thermal resistance** 

|**Symbol**|**Parameter**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|---|
|Rth(j-c)|Junction to case (AC)|Max.|1.2|°C/W|
|Rth(j-a)|Junction to ambient (SCU(1)= 2 cm2)|Typ.|45|°C/W|



_1. Scu : copper pad surface under tab, 35 μm copper thickness on FR4 PCB._ 

**DS13570** - **Rev 1** 

**page 3/12** 

**T835H-8G Characteristics (curves)** 

## **1.1 Characteristics (curves)** 

**Figure 1. Maximum power dissipation versus on-state Figure 2. On-state RMS current versus case temperature RMS current (full cycle) (full cycle)** 

**==> picture [222 x 149] intentionally omitted <==**

**----- Start of picture text -----**<br>
P(W)<br>10<br>α = 180°<br>8<br>6<br>4<br>2<br>180°<br>α<br>IT(RMS)(A) α<br>0<br>0 2 4 6 8<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
IT(RMS)(A)<br>9<br>8<br>7 α = 180 °<br>6<br>5<br>4<br>3<br>2<br>1<br>Tc(°C)<br>0<br>0 25 50 75 100 125 150<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
Figure 3. On-state RMS current versus ambient<br>Figure 4. On-state characteristics (maximum values)<br>temperature (free air convection)<br>ITM(A)<br>IT(RMS)(A) 100<br>4<br>Tj max.<br>3.5 Vto = 0.83 V<br>α = 180° Rd = 45 mΩ<br>3<br>2.5 Tj = 25 °C<br>10<br>2<br>Tj = 150 °C<br>1.5<br>1<br>0.5<br>Ta(°C) 1 VTM(V)<br>0<br>0 25 50 75 100 125 150 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
Figure 6. Recommended maximum case-to-ambient<br>Figure 5. Relative variation of thermal impedance versus<br>thermal resistance versus ambient temperature for<br>pulse duration<br>different peak off-state voltages<br>K = [Zth/Rth]<br>1.0E+00 Rth(c-a) (°C/W) (for heatsink sizing to avoid thermal runaway)<br>70<br>VD = V R V=400 VD = V R<br>Zth(j-c) 60 = 600 V<br>VD = V R<br>= 800 V<br>1.0E-01 50<br>Zth(j-a)<br>40<br>30<br>1.0E-02<br>20<br>10<br>1.0E-03 tp(s) Ta (°C)<br>0<br>1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 1.0E+03 20 40 60 80 100 120 140<br>**----- End of picture text -----**<br>


**DS13570** - **Rev 1** 

**page 4/12** 

**T835H-8G Characteristics (curves)** 

**Figure 7. Thermal resistance junction to ambient versus copper surface under tab** 

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**----- Start of picture text -----**<br>
Rth(j-a) (°C/W)<br>80<br>Epoxy printed circuit board FR4, eCu = 35 µm D²PAK<br>70<br>60<br>50<br>40<br>30<br>20<br>SCu(cm²)<br>10<br>0<br>0 5 10 15 20 25 30 35 40<br>**----- End of picture text -----**<br>


**Figure 8. Relative variation of leakage current versus junction temperature for different values of blocking voltage** 

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**----- Start of picture text -----**<br>
IDRM/IRRM [Tj, VDRM/VRRM] / IDRM/IRRM [Tj max.,800 V]<br>1.0E+00<br>1.0E-01<br>VD = VR  = 800 V<br>1.0E-02<br>VD = VR  = 600 V<br>1.0E-03<br>1.0E-04<br>Tj(°C)<br>1.0E-05<br>25 50 75 100 125 150<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
Figure 10. Relative variation of holding current and<br>Figure 9. Relative variation of gate trigger voltage and<br>latching current versus junction temperature (typical<br>current versus junction temperature (typical values)<br>values)<br>IGT,VGT[Tj] / IGT,VGT[Tj = 25 °C]<br>2 IH,IL [Tj] / IH,IL [Tj = 25 °C]<br>1.6<br>IGT Q3<br>1.5<br>IGT Q1-Q2 1.2<br>1 VGT<br>0.8<br>IL<br>0.5<br>0.4 IH<br>Tj (°C)<br>0 Tj (°C)<br>0<br>-50 -25 0 25 50 75 100 125 150<br>-50 -25 0 25 50 75 100 125 150<br>**----- End of picture text -----**<br>


**==> picture [513 x 193] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 11. Surge peak on-state current versus number of Figure 12. Non repetitive surge peak on-state current for a<br>cycles sinusoidal pulse with width tp < 10 ms<br>ITSM(A) ITSM(A)<br>1000<br>90<br>80  Tj initial = 25 °C<br>t =20ms<br>70 dl/dt limitation: 100 A/µs<br>Non repetitive  One cycle<br>60  Tj initial = 25 °C<br>I<br>50 TSM<br>100<br>40<br>30<br>Repetitive<br>20  Tc = 139°C<br>10<br>0 Number of cycles 10 tp(ms)<br>1 10 100 1000 0.01 0.10 1.00 10.00<br>**----- End of picture text -----**<br>


**DS13570** - **Rev 1** 

**page 5/12** 

**T835H-8G Characteristics (curves)** 

**Figure 13. Relative variation of static dV/dt immunity Figure 14. Relative variation of critical rate of decrease of versus junction temperature main current versus junction temperature** 

**==> picture [478 x 150] intentionally omitted <==**

**----- Start of picture text -----**<br>
4 dV/dt [Tj] / dV/dt [Tj = 150 °C]  14 (dl/dt)c [Tj] / (dl/dt)c [Tj = 150 °C]<br>VD = VR = 536 V 12<br>3<br>10<br>8<br>2<br>6<br>4<br>1<br>2<br>0 Tj(°C) 0 Tj(°C)<br>25 50 75 100 125 150 25 50 75 100 125 150<br>**----- End of picture text -----**<br>


**DS13570** - **Rev 1** 

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**T835H-8G Package information** 

**2** 

## **Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 

## **2.1** 

## **D²PAK package information** 

- ECOPACK2 compliant 

- Lead-free package leads finishing 

- Molding compound resin is halogen-free and meets UL94 flammability standard level V0 

## **Figure 15. D²PAK package outline** 

**==> picture [320 x 312] intentionally omitted <==**

**----- Start of picture text -----**<br>
E A E1<br>c2 E2<br>1 2 3<br>b2<br>e<br>b Max resin gate protrusion: 0.5 mm (1)<br>G<br>A1<br>A2<br>A3<br>R<br>Gauge Plane<br>c<br>V2<br>L2<br>D1<br>D<br>H<br>D2<br>L3<br>L<br>**----- End of picture text -----**<br>


- (1) Resin gate is accepted in each of position shown on the drawing, or their symmetrical. 

**DS13570** - **Rev 1** 

**page 7/12** 

**T835H-8G D²PAK package information** 

## **Table 5. D²PAK package mechanical data** 

||**Dimensions**|**Dimensions**|**Dimensions**|**Dimensions**|**Dimensions**|**Dimensions**|
|---|---|---|---|---|---|---|
|**Ref.**|**Millimeters**|||**Inches(1)**|||
||**Min.**|**Typ.**|**Max.**|**Min.**|**Typ.**|**Max.**|
|A|4.30||4.60|0.1693||0.1811|
|A1|2.49||2.69|0.0980||0.1059|
|A2|0.03||0.23|0.0012||0.0091|
|A3||0.25|||0.0098||
|b|0.70||0.93|0.0276||0.0366|
|b2|1.25||1.7|0.0492||0.0669|
|c|0.45||0.60|0.0177||0.0236|
|c2|1.21||1.36|0.0476||0.0535|
|D|8.95||9.35|0.3524||0.3681|
|D1|7.50||8.00|0.2953||0.3150|
|D2|1.30||1.70|0.0512||0.0669|
|e|2.54|||0.10000|||
|E|10.00||10.28|0.3937||0.4047|
|E1|8.30||8.70|0.3268||0.3425|
|E2|6.85||7.25|0.2697||0.2854|
|G|4.88||5.28|0.1921||0.2079|
|H|15||15.85|0.5906||0.6240|
|L|1.78||2.28|0.0701||0.0898|
|L2|1.19||1.40|0.0468||0.0551|
|L3|1.40||1.75|0.0551||0.0689|
|R||0.40|||0.0157||
|V2(2)|0°||8°|0°||8°|



_1. Dimensions in inches are given for reference only_ 

_2. Degrees_ 

**DS13570** - **Rev 1** 

**page 8/12** 

**T835H-8G D²PAK package information** 

**Figure 16. D²PAK recommended footprint (dimensions are in mm)** 

**==> picture [311 x 187] intentionally omitted <==**

**----- Start of picture text -----**<br>
16.90<br>10.30 5.08<br>=<br>1.30<br>ye. t a<br>3.70<br>8.90<br>**----- End of picture text -----**<br>


**Figure 17. D²PAK stencil definitions (dimensions are in mm)** 

**DS13570** - **Rev 1** 

**page 9/12** 

**T835H-8G Ordering information** 

**3 Ordering information** 

**Figure 18. Ordering information scheme** 

T     8   35       H   -     8      G   -   TR Series T = Triac RMS current 8 = 8 A Gate triggering current 35 = 35 mA High temperature H = High noise immunity and robust commutations Voltage 8 = 800 V Package G = D²PAK Packing TR = Tape and reel Blank = Tube 

**Table 6. Ordering information** 

|**Order code**|**Marking**|**Package**|**Weight**|**Base qty.**|**Delivery mode**|
|---|---|---|---|---|---|
|T835H-8G-TR|T835H-8G|D2PAK|1.6 g|1000|Tape and reel 13”|
|T835H-8G||||50|Tube|



**DS13570** - **Rev 1** 

**page 10/12** 

**T835H-8G** 

## **Revision history** 

**Table 7. Document revision history** 

|**Date**|**Version**|**Changes**|
|---|---|---|
|20-Nov-2020|1|Initial release.|



**DS13570** - **Rev 1** 

**page 11/12** 

**T835H-8G** 

## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2020 STMicroelectronics – All rights reserved 

**DS13570** - **Rev 1** 

**page 12/12** 



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