# Power MOSFET, N Channel, 650 V, 69 A, 0.024 ohm, TO-247, Through Hole

![Product image](https://novapart.co/image/farnell:2807331/)

**URL**: https://novapart.co/products/STW78N65M5/power-mosfet-n-channel-650-v-69-a-0024-ohm-to-247
**SKU**: STW78N65M5
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €9.3700
**Stock**: 200+
**Lead Time**: 127 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:69A; Drain Source Voltage Vds:650V; On Resistance Rds(on):0.024ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4V

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | MDmesh V |
| Qualification | - |
| Power Dissipation | 450W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-247 |
| Drain Source Voltage Vds | 650V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 69A |
| Drain Source On State Resistance | 0.024ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2807331/)

## **STW78N65M5** 

Automotive-grade N-channel 650 V, 0.024 Ω typ., 69 A, MDmesh™ V Power MOSFET in a TO-247 package 

**Datasheet** - **production data** 

## **Features** 

**Order code VDS @Tjmax. RDS(on) max. ID** STW78N65M5 710 V 0.032 Ω 69 A ~~——_—__—__~~ • Designed for automotive applications and AEC-Q101 qualified 

**==> picture [60 x 46] intentionally omitted <==**

**----- Start of picture text -----**<br>
3<br>2<br>1<br>TO-247<br>**----- End of picture text -----**<br>


- Higher VDSS rating 

- Higher dv/dt capability 

- Excellent switching performance 

- Easy to drive 

- 100% avalanche tested 

## **Figure 1.  Internal schematic diagram** 

## **Applications** 

- Switching applications 

## **Description** 

This device is an N-channel MDmesh™ V Power MOSFET based on an innovative proprietary vertical process technology, which is combined with STMicroelectronics’ well-known 

PowerMESH™ horizontal layout structure. The resulting product has extremely low onresistance, which is unmatched among siliconbased Power MOSFETs, making it especially suitable for applications which require superior power density and outstanding efficiency. 

**Table 1. Device summary** 

|**Order code**|**Marking**|**Package**|**Packaging**|
|---|---|---|---|
|STW78N65M5|78N65M5|TO-247|Tube|



_www.st.com_ 

August 2013 

DocID023457 Rev 4 

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This is information on a product in full production. 

**Contents** 

**STW78N65M5** 

|**Contents**|**Contents**|
|---|---|
|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3**|
|**2**|**Electrical characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4**|
||2.1<br>Electrical characteristics (curves)         . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6|
|**3**|**Test circuits     . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9**|
|**4**|**Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10**|
|**5**|**Revision history  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2. Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VGS|Gate- source voltage|±25|V|
|ID|Drain current (continuous) at TC= 25 °C|69|A|
|ID|Drain current (continuous) at TC= 100 °C|41.5|A|
|IDM<br>(1)|Drain current (pulsed)|276|A|
|PTOT|Total dissipation at TC= 25 °C|450|W|
|dv/dt(2)|Peak diode recovery voltage slope|15|V/ns|
|dv/dt(3)|MOSFET dv/dt ruggedness|50|V/ns|
|Tstg|Storage temperature|- 55 to 150|°C|
|Tj|Max. operating junction temperature|150|°C|



1. Pulse width limited by safe operating area 

2. ISD ≤ 69 A, di/dt = 400 A/µs, VDS peak < V(BR)DSS, VDD = 400 V 

3. VDS ≤ 520 V 

**Table 3. Thermal data** 

||**Table 3. Thermal data**|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|Rthj-case|Thermal resistance junction-case max|0.28|°C/W|
|Rthj-amb|Thermal resistance junction-ambient max|50|°C/W|



**Table 4. Avalanche characteristics** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|IAR|Max current during repetitive or single pulse avalanche<br>(pulse width limited by TJMAX)|15|A|
|EAS|Single pulse avalanche energy<br>(starting Tj= 25 °C, ID= IAR, VDD= 50 V)|2000|mJ|



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**Electrical characteristics** 

## **2 Electrical characteristics** 

(TC = 25 °C unless otherwise specified) 

**Table 5. On /off states** 

|||**Table 5. On /off states**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|V(BR)DSS|Drain-source<br>breakdown voltage<br>(VGS= 0)|ID= 1 mA|650|||V|
|IDSS|Zero gate voltage<br>drain current (VGS= 0)|VDS= 650 V<br>VDS= 650 V, TC=125 °C|||1<br>100|µA<br>µA|
|IGSS|Gate-body leakage<br>current (VDS= 0)|VGS= ± 25 V|||±100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|3|4|5|V|
|RDS(on)|Static drain-source on-<br>resistance|VGS= 10 V, ID= 34.5 A||0.024|0.032|Ω|



**Table 6. Dynamic** 

|||**Table 6. Dynamic**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|Ciss|Input capacitance|VDS= 100 V, f = 1 MHz,<br>VGS= 0|-|9000|-|pF|
|Coss|Output capacitance||-|210|-|pF|
|Crss|Reverse transfer<br>capacitance||-|9|-|pF|
|Co(tr)<br>(1)|Equivalent<br>capacitance time<br>related|VGS= 0, VDS= 0 to 520 V|-|768|-|pF|
|Co(er)<br>(2)|Equivalent<br>capacitance energy<br>related|VGS= 0, VDS= 0 to 520 V|-|205|-|pF|
|RG|Intrinsic gate<br>resistance|f = 1 MHz open drain|-|1.5|-|Ω|
|Qg|Total gate charge|VDD= 520 V, ID= 34.5 A,<br>VGS= 10 V<br>(see_Figure 16_)|-|203|-|nC|
|Qgs|Gate-source charge||-|50|-|nC|
|Qgd|Gate-drain charge||-|84|-|nC|



1. Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 

to 80% VDSS. 

2. Co(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS. 

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**Electrical characteristics** 

**Table 7. Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(V)|Voltage delay time|VDD= 400 V, ID= 40 A,<br>RG= 4.7Ω,VGS= 10 V<br>(see_Figure 17_)<br>(see_Figure 20_)|-|163|-|ns|
|tr(V)|Voltage rise time||-|14|-|ns|
|tf(i)|Current fall time||-|14|-|ns|
|tc(off)|Crossing time||-|26|-|ns|



**Table 8. Source drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain current||-||69|A|
|ISDM (1)|Source-drain current (pulsed)||-||276|A|
|VSD (2)|Forward on voltage|ISD= 69 A, VGS= 0|-||1.5|V|
|trr|Reverse recovery time|ISD= 69 A,<br>di/dt = 100 A/µs<br>VDD= 100 V (see_Figure 17_)|-|504||ns|
|Qrr|Reverse recovery charge||-|13||µC|
|IRRM|Reverse recovery current||-|49||A|
|trr|Reverse recovery time|ISD= 69 A,<br>di/dt = 100 A/µs<br>VDD= 100 V, Tj= 150 °C<br>(see_Figure 17_)|-|635||ns|
|Qrr|Reverse recovery charge||-|19||µC|
|IRRM|Reverse recovery current||-|59||A|



1. Pulse width limited by safe operating area 

2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% 

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**Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

## **Figure 2. Safe operating area Figure 3. Thermal impedance** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
ID AM15574v1<br>(A)<br>100<br>10µs<br>100µs<br>10<br>1ms<br>10ms<br>Tj=150°C<br>1 Tc=25°C<br>Single pulse<br>0.1<br>0.1 1 10 100 VDS(V)<br>DS(on)<br>Operation in this area is<br>Limited by max R<br>**----- End of picture text -----**<br>


**Figure 4. Output characteristics** 

**==> picture [201 x 167] intentionally omitted <==**

## **Figure 5. Transfer characteristics** 

**==> picture [462 x 176] intentionally omitted <==**

**----- Start of picture text -----**<br>
ID AM10393v1 ID (A) AM10394v1<br>(A) VDS=30V<br>225<br>250 VGS=10V<br>200<br>8V<br>175<br>200<br>150<br>150 125<br>7V<br>100<br>100<br>75<br>50<br>50<br>6V 25<br>0 0<br>0 5 10 15 20 25 VDS(V) 3 4 5 6 7 8 9 VGS(V)<br>**----- End of picture text -----**<br>


## **Figure 6. Gate charge vs gate-source voltage** 

## **Figure 7. Static drain-source on-resistance** 

**==> picture [462 x 177] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGS AM15575v1 RDS(on) AM10396v1<br>(V) (Ω)<br>VDD=520V VGS=10V<br>12 ID=34.5A<br>0.026<br>10<br>8<br>0.024<br>6<br>4<br>0.022<br>2<br>0 0.020<br>0 50 100 150 200 250 Qg(nC) 0 10 20 30 40 50 60 70 80 ID(A)<br>**----- End of picture text -----**<br>


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**Electrical characteristics** 

**Figure 8. Capacitance variations** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
C AM15577v1<br>(pF)<br>100000<br>10000 Ciss<br>1000<br>Coss<br>100<br>10 Crss<br>1<br>0.1 1 10 100 1000 VDS(V)<br>**----- End of picture text -----**<br>


**Figure 10. Normalized gate threshold voltage vs temperature** 

## **Figure 9. Output capacitance stored energy** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
Eoss AM10398v1<br>(µJ)<br>40<br>35<br>30<br>25<br>20<br>15<br>10<br>5<br>0<br>0 100 200 300 400 500 600 VDS(V)<br>**----- End of picture text -----**<br>


**Figure 11. Normalized on-resistance vs temperature** 

**==> picture [462 x 176] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGS(th) AM04972v1 RDS(on) AM15573v1<br>(norm) (norm)<br>1.10 ID=250µA VDS=10 V<br>VDS=VGS 2.5 ID=34.5 A<br>1.00 2<br>1.5<br>0.90<br>1<br>0.80<br>0.5<br>0.70 0<br>-50 -25 0 25 50 75 100 TJ(°C) -55 -25 5 35 65 95 125 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 12. Source-drain diode forward characteristics** 

**Figure 13. Normalized VDS vs temperature** 

**==> picture [462 x 177] intentionally omitted <==**

**----- Start of picture text -----**<br>
VSD AM04974v1 VDS AM10399v1<br>(V) TJ=-50°C (norm)<br>1.08<br>1.2 ID = 1mA<br>1.06<br>1.0<br>1.04<br>0.8 1.02<br>TJ=25°C<br>1.00<br>0.6<br>TJ=150°C 0.98<br>0.4<br>0.96<br>0.2<br>0.94<br>0 0.92<br>0 10 20 30 40 50 ISD(A) -50 -25 0 25 50 75 100 TJ(°C)<br>**----- End of picture text -----**<br>


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**Electrical characteristics** 

**Figure 14. Switching losses vs gate resistance[(1)]** 

**==> picture [228 x 172] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM15576v1<br>E (µJ)<br>VDD=400V<br>VGS=10V Eon<br>2500<br>ID=40A<br>2000<br>1500<br>Eoff<br>1000<br>500<br>0<br>0 10 20 30 40 RG(Ω)<br>**----- End of picture text -----**<br>


1. Eon including reverse recovery of a SiC diode 

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**Test circuits** 

## **3 Test circuits** 

**==> picture [464 x 563] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 15. Switching times test circuit for  Figure 16. Gate charge test circuit<br>resistive load<br>VDD<br>12V 47kΩ<br>1kΩ<br>100nF<br>RL 2200 3.3<br>μF μF<br>VDD IG=CONST<br>VD Vi=20V=VGMAX 100Ω D.U.T.<br>VGS<br>2200<br>RG D.U.T. μF 2.7kΩ VG<br>PW<br>47kΩ<br>1kΩ<br>PW<br>AM01468v1 AM01469v1<br>eA et<br>Figure 17. Test circuit for inductive load  Figure 18. Unclamped inductive load test circuit<br>switching and diode recovery times<br>L<br>A A A<br>D<br>FAST L=100μH VD<br>G D.U.T. DIODE 2200 3.3<br>S B 3.3 1000 μF μF VDD<br>25 Ω B B D μF μF VDD ID<br>G<br>RG S<br>Vi D.U.T.<br>Pw<br>AM01470v1 AM01471v1<br>Seinen<br>Figure 19. Unclamped inductive waveform Figure 20. Switching time waveform<br>V(BR)DSS id i* i: tH iS } : Concept waveform for Inductive Load Turn-of f<br>VD<br>90%Vds i : i : 90%Id<br>IDM<br>— Vgs : i i i<br>FEEa Lo<br>ID<br>vast) ~—$ \E ii :<br>VDD VDD 10%Vds i i ti i 10%Id<br>Vds : H ii !<br>AM01472v1 Teross -over AM05540v1<br>**----- End of picture text -----**<br>


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**Package mechanical data** 

## **4 Package mechanical data** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _www.st.com_ . ECOPACK is an ST trademark. 

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**Package mechanical data** 

**Table 9. TO-247 mechanical data** 

||**Table 9. TO-247 mechanical data**|**Table 9. TO-247 mechanical data**|**Table 9. TO-247 mechanical data**|
|---|---|---|---|
|**Dim.**|**mm.**|||
||**Min.**|**Typ.**|**Max.**|
|A|4.85||5.15|
|A1|2.20||2.60|
|b|1.0||1.40|
|b1|2.0||2.40|
|b2|3.0||3.40|
|c|0.40||0.80|
|D|19.85||20.15|
|E|15.45||15.75|
|e|5.30|5.45|5.60|
|L|14.20||14.80|
|L1|3.70||4.30|
|L2||18.50||
|∅P|3.55||3.65|
|∅R|4.50||5.50|
|S|5.30|5.50|5.70|



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**Package mechanical data** 

## **Figure 21. TO-247 drawing** 

**==> picture [405 x 398] intentionally omitted <==**

**----- Start of picture text -----**<br>
0075325_G<br>**----- End of picture text -----**<br>


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**Revision history** 

## **5 Revision history** 

**Table 10. Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|16-Jul-2012|1|First release.|
|22-Jan-2013|2|Modified: RDS(on)on first page, ID, IDMon_Table 2_, note_2_on_Table 2_,<br>typical values on_Table 6_,_7_, max and typical values on_Table 8_,<br>_Figure 2_,_6_,_8_,_9_,_11_and_14_|
|07-Aug-2013|3|– Minor text changes<br>– Modified:_Applications_in first page<br>– Added: MOSFET dv/dt ruggedness parameter in_Table 2_<br>– Added:_Table 4: Avalanche characteristics_<br>– Modified:_Figure 15_,_16_,_17_and_18_|
|08-Aug-2013|4|– Minor text changes<br>– Modified:_Figure 14_|



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## Links

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- [Supplier page](https://es.farnell.com/stmicroelectronics/stw78n65m5/mosfet-n-ch-auto-650v-69a-to-247/dp/2807331)
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