# Power MOSFET, N Channel, 650 V, 75 A, 0.036 ohm, TO-247, Through Hole
**URL**: https://novapart.co/products/STW75N65DM6-4/power-mosfet-n-channel-650-v-75-a-0036-ohm-to-247
**SKU**: STW75N65DM6-4
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €7.5400
**Stock**: 100+
**Lead Time**: 2 days (indicative)
## Specifications
| Parameter | Value |
|---|---|
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 4Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 480W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-247 |
| Drain Source Voltage Vds | 650V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 75A |
| Drain Source On State Resistance | 0.036ohm |
| Gate Source Threshold Voltage Max | 4.75V |
## Datasheet
📄 [Download PDF](https://novapart.co/datasheet/farnell:3929070/)
**STW75N65DM6-4**
## Datasheet
N-channel 650 V, 33 mΩ typ., 75 A MDmesh DM6 Power MOSFET in a TO247-4 package
**==> picture [55 x 51] intentionally omitted <==**
**==> picture [144 x 163] intentionally omitted <==**
**----- Start of picture text -----**
2 [34]
1
TO247-4
Drain(1, TAB)
Gate(4)
Driver
source (3)
Power
source (2)
AM10177v2Z
**----- End of picture text -----**
## **Features**
|**Order code**|**VDS**|**RDS(on) max.**|**ID**|
|---|---|---|---|
|STW75N65DM6-4|650 V|36 mΩ|75 A|
- Fast-recovery body diode
- Lower RDS(on) per area vs previous generation
- Low gate charge, input capacitance and resistance
- 100% avalanche tested
- Extremely high dv/dt ruggedness
- Zener-protected
- Excellent switching performance thanks to the extra driving source pin
## **Applications**
- Switching applications
## **Description**
This high-voltage N-channel Power MOSFET is part of the MDmesh DM6 fastrecovery diode series. Compared with the previous MDmesh fast generation, DM6 combines very low recovery charge (Qrr), recovery time (trr) and excellent improvement in RDS(on) per area with one of the most effective switching behaviors available in the market for the most demanding high-efficiency bridge topologies and ZVS phase-shift converters.
## **Product status link**
STW75N65DM6-4
|**Product summary**|**Product summary**|
|---|---|
|**Order code**|STW75N65DM6-4|
|**Marking**|75N65DM6|
|**Package**|TO247-4|
|**Packing**|Tube|
**DS13832** - **Rev 1** - **September 2021** For further information contact your local STMicroelectronics sales office.
www.st.com
**STW75N65DM6-4 Electrical ratings**
## **1 Electrical ratings**
**Table 1. Absolute maximum ratings**
|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VGS|Gate-source voltage|±25|V|
|ID|Drain current (continuous) at TC= 25 °C|75|A|
||Drain current (continuous) at TC= 100 °C|47||
|IDM (1)|Drain current (pulsed)|280|A|
|PTOT|Total power dissipation at TC= 25 °C|480|W|
|dv/dt(2)|Peak diode recovery voltage slope|100|V/ns|
|di/dt(2)|Peak diode recovery current slope|1000|A/μs|
|dv/dt(3)|MOSFET dv/dt ruggedness|100|V/ns|
|TSTG|Storage temperature range|-55 to 150|°C|
|TJ|Operating junction temperature range||°C|
_1. Pulse width limited by safe operating area._
_2. ISD ≤ 75 A, VDS (peak) < V(BR)DSS, VDD = 400 V._
_3. VDS ≤ 520 V._
## **Table 2. Thermal data**
|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|RthJC|Thermal resistance, junction-to-case|0.26|°C/W|
|RthJA|Thermal resistance, junction-to-ambient|50|°C/W|
**Table 3. Avalanche characteristics**
|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|IAR|Avalanche current, repetitive or not repetitive (tplimited by TJmax)|9|A|
|EAS|Single pulse avalanche energy (starting TJ= 25 °C, ID= IAR; VDD= 50 V)|1.9|J|
**DS13832** - **Rev 1**
**page 2/12**
**STW75N65DM6-4 Electrical characteristics**
## **2 Electrical characteristics**
TC = 25 °C unless otherwise specified
**Table 4. On/off states**
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown voltage|VGS= 0 V, ID= 1 mA|650|||V|
|IDSS|Zero gate voltage drain current|VGS= 0 V, VDS= 650 V|||5|μA|
|||VGS= 0 V, VDS= 650 V, TC= 125 °C(1)|||100||
|IGSS|Gate-body leakage current|VDS= 0 V, VGS= ±25 V|||±5|μA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 μA|3.25|4|4.75|V|
|RDS(on)|Static drain-source on resistance|VGS= 10 V, ID= 37.5 A||33|36|mΩ|
_1. Specified By Design – Not tested in production._
**Table 5. Dynamic characteristics**
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 100 V, f = 1 MHz, VGS= 0 V|-|5700|-|pF|
|Coss|Output capacitance||-|280|-|pF|
|Crss|Reverse transfer capacitance||-|3|-|pF|
|Coss eq.(1)|Equivalent output capacitance|VDS= 0 to 520 V, VGS= 0 V|-|960|-|pF|
|RG|Intrinsic gate resistance|f = 1 MHz, ID= 0 A|-|1.5|-|Ω|
|Qg|Total gate charge|VDD= 520 V, ID= 77 A, VGS= 0 to
10 V (seeFigure 14. Test circuit for gate
charge behavior)|-|118|-|nC|
|Qgs|Gate-source charge||-|38|-|nC|
|Qgd|Gate-drain charge||-|47|-|nC|
_1. Coss eq is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS._
**Table 6. Switching times**
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delay time|VDD= 325 V, ID= 38.5 A,
RG= 4.7 Ω , VGS= 10 V
(seeFigure 13. Switching times
test circuit for resistive loadand
Figure 18. Switching time waveform)|-|40|-|ns|
|tr|Rise time||-|18|-|ns|
|td(off)|Turn-off delay time||-|130|-|ns|
|tf|Fall time||-|10|-|ns|
**DS13832** - **Rev 1**
**page 3/12**
**STW75N65DM6-4 Electrical characteristics**
## **Table 7. Source-drain diode**
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain current||-||75|A|
|ISDM (1)|Source-drain current (pulsed)||-||280|A|
|VSD (2)|Forward on voltage|VGS= 0 V, ISD= 75 A|-||1.6|V|
|trr|Reverse recovery time|ISD= 77 A, di/dt = 100 A/μs, VDD= 60 V
(seeFigure 15. Test circuit for inductive
load switching and diode recovery times)|-|149||ns|
|Qrr|Reverse recovery charge||-|0.92||µC|
|IRRM|Reverse recovery current||-|10.4||A|
|trr|Reverse recovery time|ISD= 77 A, di/dt = 100 A/μs,
VDD= 60 V, TJ= 150 °C
(seeFigure 15. Test circuit for inductive
load switching and diode recovery times)|-|280||ns|
|Qrr|Reverse recovery charge||-|4.12||µC|
|IRRM|Reverse recovery current||-|24||A|
_1. Pulse width is limited by safe operating area._
_2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%._
**DS13832** - **Rev 1**
**page 4/12**
**STW75N65DM6-4 Electrical characteristics (curves)**
## **2.1 Electrical characteristics (curves)**
**==> picture [436 x 391] intentionally omitted <==**
**----- Start of picture text -----**
Figure 1. Safe operating area Figure 2. Maximum transient thermal impedanceMaximum transient thermal impedance
(A)ID SS IDM FSS GADG210920210955SOA (°C/W)ZthJC Serre GADG200920210949ZTH
Sesiiaeesiiiieeeenie te erste ener eer enact
10 [2] tp=1 µs
ani eet Siti ntti tei Se Seat
LSa aiaosseat tp=10 µs 10 [-1] FEeee duty=0.5 HHHAo 0.4
CCT SCANT NENT Seeresee c eceeericall ae
10 [1] 0.3
RDS(on) max. tp=100 µs 0.1 0.2
10 [0] moot 0.05 mT eC Te
V(BR)DSS 10 [-2] RthJC = 0.26 °C/W
tp=1ms duty = t on / T
10 10 [-2][-1] tNS=asri Si TT sin JC ≤ 150 °C= g 25 le pulse °C EEE +| tp=10 ms 10 [-3] SeerYTlireIY Single pulse N teeTIE TE _ t on T | i(Il i
maine final val J
10 [-1] 10 [0] 10 [1] 10 [2] VDS (V) 10 [-6] 10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] tp (s)
Figure 3. Typical output characteristics Figure 4. Typical transfer characteristics
ID GADG200920210949OCH IDD GADG200920210949TCH
(A) (A)
TTTT IIIT Le TTTTILITIITIILU
VGS=9, 10 V VDS=20 VDS=20 V=20 V
250 250
o Zn VGS=8 V POE a
200 200
Saaey Van2cauaae PEEVE))
150 Pf 150 PPE”
VGS=7 V
Pf a
100 100
HEE EEE FREE AEEEEE
50 50
VGS=6 V
y SUEREEEE ECHEGEECHEEE
0 PEEP——_ 0 n>
0 4 8 12 16 20 VDS (V) 4 5 6 7 8 9 VGSGS (V)
DS(on)
Operation in this area
is limited by R
**----- End of picture text -----**
**Figure 2. Maximum transient thermal impedanceMaximum transient thermal impedance**
**==> picture [187 x 165] intentionally omitted <==**
**----- Start of picture text -----**
IDD GADG200920210949TCH
(A)
TTTTILITIITIILU
VDS=20 VDS=20 V=20 V
250
POE a
200
PEEVE))
150 PPE”
a
100
FREE AEEEEE
50
ECHEGEECHEEE
0 n>
4 5 6 7 8 9 VGSGS (V)
**----- End of picture text -----**
**Figure 5. Typical gate charge characteristics**
**Figure 6. Typical drain-source on-resistance**
**==> picture [435 x 167] intentionally omitted <==**
**----- Start of picture text -----**
VDS GADG200920210950QVG VGS RDS(on) GADG200920210951RID
(V) VDD= 520 V Lit ey yy yy yy (V) (mΩ)
600 ID = 77 A Qg 12 VGS= 10 V
Pe cee 35 HE EEEELLE
SA COCO
500 10
Po a 34 POCO
400 Qgs Qgd 8
33
VGS
300 PA 6 EEE EEer eee
i aa Hatt
32
200 4
oe, sSERSHSEEEE/\ PES
31
100 2
fo VDS PCE
0 YORE 0 30 EEEEECEECEELHEEE
0 20 40 60 80 100 120 Qg (nC) 0 10 20 30 40 50 60 70 ID (A)
**----- End of picture text -----**
**DS13832** - **Rev 1**
**page 5/12**
**STW75N65DM6-4 Electrical characteristics (curves)**
**==> picture [513 x 198] intentionally omitted <==**
**----- Start of picture text -----**
Figure 7. Typical capacitance characteristics Figure 8. Typical output capacitance stored energy
C GADG200920210950CVR EOSS GADG200920210953EOS
(pF) (µJ)
50
10 [4] Ciss
40
10 [3]
Coss 30
10 [2]
20
f = 1 MHz C rss
10 [1]
10
10 [0] 0
10 [-1] 10 [0] 10 [1] 10 [2] VDS (V) 0 100 200 300 400 500 600 VDS (V)
**----- End of picture text -----**
**==> picture [513 x 198] intentionally omitted <==**
**----- Start of picture text -----**
Figure 9. Normalized gate threshold vs temperature Figure 10. Normalized on-resistance vs. temperature
VGS(th) GADG210920211257VTH RDS(on) GADG200920210952RON
(norm.) (norm.)
ID =250 µA VDS=10 V
1.1 2.5
1.0 2.0
0.9 1.5
0.8 1.0
0.7 0.5
0.6 0.0
-75 -25 25 75 125 Tj (°C) -75 -25 25 75 125 Tj (°C)
**----- End of picture text -----**
**==> picture [513 x 198] intentionally omitted <==**
**----- Start of picture text -----**
Figure 11. Normalized breakdown voltage vs temperature Figure 12. Typical reverse diode forward characteristics
V(BR)DSS GADG200920210952BDV VSD GADG200920210953SDF
(norm.) (V)
1.10 ID=1 mA 1.2 TJ = -50 °C
1.1
1.05 1.0 TJ = 25 °C
1.00 0.9
0.8
0.95 TJ = 150 °C
0.7
0.90
0.6
0.85 0.5
-75 -25 25 75 125 Tj (°C) 0 10 20 30 40 50 60 70 ISD (A)
**----- End of picture text -----**
**DS13832** - **Rev 1**
**page 6/12**
**STW75N65DM6-4 Test circuits**
## **3 Test circuits**
**==> picture [513 x 184] intentionally omitted <==**
**----- Start of picture text -----**
Figure 14. Test circuit for gate charge behavior
Figure 13. Switching times test circuit for resistive load
VDD
RL
RL 2200 3.3
µF µF
VD + VDD VGS IG= CONST 100 Ω D.U.T.
VGS
RG D.U.T. pulse width 2200 + 2.7 kΩ VG
μF
PW 47 kΩ
GND1 GND2 1 kΩ
(driver signal) (power)
AM15855v1 GND1 GND2
GADG180720181011SA
**----- End of picture text -----**
**==> picture [513 x 182] intentionally omitted <==**
**----- Start of picture text -----**
Figure 15. Test circuit for inductive load switching and
Figure 16. Unclamped inductive load test circuit
diode recovery times
A A A L
D
FAST L=100µH
G D.U.T. DIODE VD
2200 3.3
25Ω S B B B D 3.3µF + 1000µF VDD + µF µF VDD
ID
G
RG S
D.U.T.
Vi D.U.T.
GND1 GND2 Pw
GND1 GND2 AM15858v1
AM15857v1
**----- End of picture text -----**
**==> picture [513 x 184] intentionally omitted <==**
**----- Start of picture text -----**
Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform
ton toff
V(BR)DSS td(on) tr td(off) tf
VD
90% 90%
IDM
ID 0 10% VDS 10%
VDD VDD VGS 90%
0 10%
AM01472v1 AM01473v1
**----- End of picture text -----**
**DS13832** - **Rev 1**
**page 7/12**
**STW75N65DM6-4 Package information**
## **4 Package information**
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
## **4.1 TO-247 package information**
**Figure 19. TO247-4 package outline**
**==> picture [162 x 60] intentionally omitted <==**
**==> picture [42 x 43] intentionally omitted <==**
**==> picture [45 x 6] intentionally omitted <==**
**----- Start of picture text -----**
8405626_Rev_3
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**DS13832** - **Rev 1**
**page 8/12**
**STW75N65DM6-4 TO247-4 package information**
**Table 8. TO247-4 mechanical data**
|**Di**|**mm**|**mm**|**mm**|
|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|
|A|4.90|5.00|5.10|
|A1|2.31|2.41|2.51|
|A2|1.90|2.00|2.10|
|b|1.16||1.29|
|b1|1.15|1.20|1.25|
|b2|0||0.20|
|c|0.59||0.66|
|c1|0.58|0.60|0.62|
|D|20.90|21.00|21.10|
|D1|16.25|16.55|16.85|
|D2|1.05|1.20|1.35|
|D3|24.97|25.12|25.27|
|E|15.70|15.80|15.90|
|E1|13.10|13.30|13.50|
|E2|4.90|5.00|5.10|
|E3|2.40|2.50|2.60|
|e|2.44|2.54|2.64|
|e1|4.98|5.08|5.18|
|L|19.80|19.92|20.10|
|P|3.50|3.60|3.70|
|P1|||7.40|
|P2|2.40|2.50|2.60|
|Q|5.60||6.00|
|S||6.15||
|T|9.80||10.20|
|U|6.00||6.40|
|aaa||0.04|0.10|
**DS13832** - **Rev 1**
**page 9/12**
**STW75N65DM6-4**
## **Revision history**
## **Table 9. Document revision history**
|**Date**|**Revision**|**Changes**|
|---|---|---|
|24-Sep-2021|1|First release.|
**DS13832** - **Rev 1**
**page 10/12**
**STW75N65DM6-4 Contents**
## **Contents**
|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2**|
|---|---|
|**2**|**Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3**|
||**2.1**
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5|
|**3**|**Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7**|
|**4**|**Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8**|
||**4.1**
TO-247 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8|
|**Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10**||
**DS13832** - **Rev 1**
**page 11/12**
**STW75N65DM6-4**
## **IMPORTANT NOTICE – PLEASE READ CAREFULLY**
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2021 STMicroelectronics – All rights reserved
**DS13832** - **Rev 1**
**page 12/12**
## Links
- [View this product on Novapart](https://novapart.co/products/STW75N65DM6-4/power-mosfet-n-channel-650-v-75-a-0036-ohm-to-247)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/stmicroelectronics/stw75n65dm6-4/mosfet/dp/3929070)
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