# Power MOSFET, N Channel, 600 V, 50 A, 0.052 ohm, TO-247, Through Hole

![Product image](https://novapart.co/image/farnell:3367087/)

**URL**: https://novapart.co/products/STW58N60DM2AG/power-mosfet-n-channel-600-v-50-a-0052-ohm-to-247
**SKU**: STW58N60DM2AG
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €4.0200
**Stock**: 500+
**Lead Time**: 127 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | MDmesh DM2 |
| Qualification | AEC-Q101 |
| Power Dissipation | 360W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-247 |
| Drain Source Voltage Vds | 600V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 50A |
| Drain Source On State Resistance | 0.052ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3367087/)

## **STW58N60DM2AG** 

Automotive-grade N-channel 600 V, 0.052 Ω typ., 50 A MDmesh™ DM2 Power MOSFET in a TO-247 package 

Datasheet - production data 

**Features Order code VDS RDS(on) ID PTOT max.** STW58N60DM2AG 600 V 0.060 Ω 50 A 360 W ~~yy~~ 

**==> picture [62 x 54] intentionally omitted <==**

**----- Start of picture text -----**<br>
3<br>2<br>1<br>TO-247<br>**----- End of picture text -----**<br>


- Designed for automotive applications and AEC-Q101 qualified 

- Fast-recovery body diode 

- Extremely low gate charge and input capacitance 

- Low on-resistance 

- 100% avalanche tested 

- Extremely high dv/dt ruggedness 

**Figure 1: Internal schematic diagram** 

**==> picture [179 x 164] intentionally omitted <==**

**----- Start of picture text -----**<br>
D(2)<br>G(1)<br>S(3) AM15572v1_no_tab<br>**----- End of picture text -----**<br>


- Zener-protected 

## **Applications** 

- Switching applications 

## **Description** 

This high voltage N-channel Power MOSFET is part of the MDmesh™ DM2 fast recovery diode series. It offers very low recovery charge (Qrr) and time (trr) combined with low RDS(on), rendering it suitable for the most demanding high efficiency converters and ideal for bridge topologies and ZVS phase-shift converters. 

**Table 1: Device summary Order code Marking Package Packing** STW58N60DM2AG 58N60DM2 TO-247 Tube ~~a~~ 

This is information on a product in full production. 

_www.st.com_ 

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|**Contents**<br>**STW58N60DM2AG**|**Contents**<br>**STW58N60DM2AG**|
|---|---|
|**Contents**||
|**1**|**Electrical ratings ............................................................................... 3**|
|**2**|**Electrical characteristics ................................................................. 4**|
||2.1<br>Electrical characteristics (curves) ...................................................... 6|
|**3**|**Test circuits ...................................................................................... 8**|
|**4**|**Package information ........................................................................ 9**|
||4.1<br>TO-247 package information ............................................................. 9|
|**5**|**Revision history .............................................................................. 11**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2: Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VGS|Gate-source voltage|±25|V|
|ID|Drain current (continuous) at Tcase= 25 °C|50|A|
||Drain current (continuous) at Tcase= 100 °C|31||
|IDM<br>_(1)_|Drain current (pulsed)|200|A|
|PTOT|Total dissipation at Tcase= 25 °C|360|W|
|dv/dt_(2)_|Peak diode recoveryvoltage slope|50|V/ns|
|dv/dt_(3)_|MOSFET dv/dt ruggedness|50||
|Tstg|Storage temperature|-55 to 150|°C|
|Tj|Operating junction temperature|||



## **Notes:** 

(1) Pulse width is limited by safe operating area. 

(2) ISD ≤ 50 A, di/dt=800 A/μs; VDS peak < V(BR)DSS, VDD = 80% V(BR)DSS. 

(3) VDS ≤ 480 V. 

## **Table 3: Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistancejunction-case|0.35|°C/W|
|Rthj-amb|Thermal resistance junction-ambient|50||



## **Table 4: Avalanche characteristics** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|IAS<br>_(1)_|Avalanche current, repetitive or not repetitive|12|A|
|EAS<br>_(2)_|Singlepulse avalanche energy|800|mJ|



## **Notes:** 

> (1) Pulse width limited by Tjmax. 

> (2) starting Tj = 25 °C, ID = IAS, VDD = 50 V. 

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**Electrical characteristics** 

## **2 Electrical characteristics** 

(Tcase = 25 °C unless otherwise specified) 

**Table 5: Static** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown<br>voltage|VGS= 0 V, ID= 1 mA|600|||V|
|IDSS|Zero gate voltage drain<br>current|VGS= 0 V, VDS= 600 V|||10|µA|
|||VGS= 0 V, VDS= 600 V,<br>Tcase= 125 °C|||100||
|IGSS|Gate-body leakage<br>current|VDS= 0 V, VGS= ±25 V|||±5|µA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250µA|3|4|5|V|
|RDS(on)|Static drain-source on-<br>resistance|VGS= 10 V, ID= 25 A||0.052|0.060|Ω|



**Table 6: Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 100 V, f = 1 MHz, VGS= 0 V|-|4100|-|pF|
|Coss|Output<br>capacitance||-|190|-||
|Crss|Reverse transfer<br>capacitance||-|3.2|-||
|Coss eq.|Equivalent output<br>capacitance|VDS= 0 to 480 V, VGS= 0 V|-|325|-|pF|
|RG|Intrinsic gate<br>resistance|f = 1 MHz, ID= 0 A|-|4.2|-|Ω|
|Qg|Totalgate charge|VDD= 480 V, ID= 50 A, VGS= 10 V<br>(see_Figure 15: "Gate charge test_<br>_circuit"_)|-|90|-|nC|
|Qgs|Gate-source<br>charge||-|18|-||
|Qgd|Gate-drain charge||-|44|-||



## **Table 7: Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on<br>delaytime|VDD= 300 V, ID= 25 A RG= 4.7 Ω (see<br>_Figure 14: "Switching times test circuit for_<br>_resistive load"_and_Figure 19: "Switching time_<br>_waveform"_)|-|24|-|ns|
|tr|Rise time||-|60|-||
|td(off)|Turn-off<br>delaytime||-|130|-||
|tf|Fall time||-|12|-||



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**Electrical characteristics** 

|||**Table 8: Source-drain diode**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|ISD|Source-drain<br>current||-||50|A|
|ISDM|Source-drain<br>current<br>(pulsed)||-||200|A|
|VSD<br>_(1)_|Forward on<br>voltage|VGS= 0 V, ISD= 50 A|-||1.6|V|
|trr|Reverse<br>recoverytime|ISD= 50 A, di/dt = 100 A/µs, VDD= 60 V<br>(see_Figure 16: "Test circuit for inductive_<br>_load switching and diode recovery times"_)|-|140||ns|
|Qrr|Reverse<br>recovery<br>charge||-|0.7||µC|
|IRRM|Reverse<br>recovery<br>current||-|10.6||A|
|trr|Reverse<br>recovery time|ISD= 50 A, di/dt = 100 A/µs, VDD= 60 V,<br>Tj= 150 °C (see_Figure 16: "Test circuit for_<br>_inductive load switching and diode_<br>_recovery times"_)|-|245||ns|
|Qrr|Reverse<br>recovery<br>charge||-|2.6||µC|
|IRRM|Reverse<br>recovery<br>current||-|21||A|



## **Notes:** 

(1) Pulse test: pulse duration = 300 µs, duty cycle 1.5%. 

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**Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**==> picture [373 x 183] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 2: Safe operating area<br>Figure 3: Thermal impedance<br>**----- End of picture text -----**<br>


**==> picture [386 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 4: Output characteristics  Figure 5: Transfer characteristics<br>**----- End of picture text -----**<br>


**==> picture [409 x 170] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 6: Gate charge vs gate-source voltage  Figure 7: Static drain-source on-resistance<br>**----- End of picture text -----**<br>


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**Electrical characteristics** 

**==> picture [389 x 180] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 9: Normalized gate threshold voltage<br>Figure 8: Capacitance variations<br>vs temperature<br>**----- End of picture text -----**<br>


**==> picture [398 x 180] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 10: Normalized on-resistance vs  Figure 11: Normalized V(BR)DSS vs<br>temperature  temperature<br>**----- End of picture text -----**<br>


**==> picture [408 x 179] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 13: Source- drain diode forward<br>Figure 12: Output capacitance stored energy<br>characteristics<br>**----- End of picture text -----**<br>


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**Test circuits** 

## **3 Test circuits** 

**Figure 14: Switching times test circuit for resistive load** 

**==> picture [207 x 79] intentionally omitted <==**

**Figure 16: Test circuit for inductive load switching and diode recovery times** 

**==> picture [213 x 129] intentionally omitted <==**

**Figure 18: Unclamped inductive waveform** 

**Figure 15: Gate charge test circuit** 

**==> picture [200 x 148] intentionally omitted <==**

**Figure 17: Unclamped inductive load test circuit** 

**==> picture [161 x 146] intentionally omitted <==**

**Figure 19: Switching time waveform** 

**==> picture [32 x 32] intentionally omitted <==**

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**Package information** 

## **4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _**www.st.com**_ . ECOPACK[®] is an ST trademark. 

## **4.1 TO-247 package information** 

**Figure 20: TO-247 package outline** 

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**Package information** 

**Table 9: TO-247 package mechanical data** 

|**Dim.**||**mm.**||
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|4.85||5.15|
|A1|2.20||2.60|
|b|1.0||1.40|
|b1|2.0||2.40|
|b2|3.0||3.40|
|c|0.40||0.80|
|D|19.85||20.15|
|E|15.45||15.75|
|e|5.30|5.45|5.60|
|L|14.20||14.80|
|L1|3.70||4.30|
|L2||18.50||
|ØP|3.55||3.65|
|ØR|4.50||5.50|
|S|5.30|5.50|5.70|



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**Revision history** 

## **5 Revision history** 

**Table 10: Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|12-Jun-2015|1|First release.|
|20-Jul-2015|2|Updated title and features.<br>Minor text changes.|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

- © 2015 STMicroelectronics – All rights reserved 

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- [Supplier page](https://es.farnell.com/stmicroelectronics/stw58n60dm2ag/mosfet-aec-q101-n-ch-600v-50a/dp/3367087)
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