# Power MOSFET, N Channel, 600 V, 52 A, 0.045 ohm, TO-247, Through Hole

![Product image](https://novapart.co/image/farnell:3132769/)

**URL**: https://novapart.co/products/STW56N60M2-4/power-mosfet-n-channel-600-v-52-a-0045-ohm-to-247
**SKU**: STW56N60M2-4
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €4.0500
**Stock**: 100+
**Lead Time**: 127 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:52A; Drain Source Voltage Vds:600V; On Resistance Rds(on):0.045ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:

## Specifications

| Parameter | Value |
|---|---|
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 4Pins |
| Channel Type | N Channel |
| Product Range | MDmesh M2 |
| Qualification | - |
| Power Dissipation | 350W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-247 |
| Drain Source Voltage Vds | 600V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 52A |
| Drain Source On State Resistance | 0.045ohm |
| Gate Source Threshold Voltage Max | 3V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3132769/)

## **STW56N60M2-4** 

N-channel 600 V, 0.045 Ω typ., 52 A MDmesh™ M2 Power MOSFET in a TO247-4 package 

Datasheet - production data 

**Features Order code VDS @ TJmax RDS(on) max ID** STW56N60M2-4 650 V 0.055 Ω 52 A ~~ee~~  Excellent switching performance thanks to the extra driving source pin  Extremely low gate charge 

- Excellent output capacitance (Coss) profile 

- 100% avalanche tested 

- Zener-protected 

**Figure 1: Internal schematic diagram** 

## **Applications** 

- Switching applications 

## **Description** 

This device is an N-channel Power MOSFET developed using MDmesh™ M2 technology. Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters. 

||**Table 1: Device summary**|**Table 1: Device summary**|||
|---|---|---|---|---|
|**Order code**|**Marking**||**Package**|**Packaging**|
|STW56N60M2-4|56N60M2||TO247-4|Tube|



This is information on a product in full production. 

_www.st.com_ 

January 2015 DocID026751 Rev 3 

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|**Contents**<br>**STW56N60M2-4**|**Contents**<br>**STW56N60M2-4**|
|---|---|
|**Contents**||
|**1**|**Electrical ratings ............................................................................. 3**|
|**2**|**Electrical characteristics ................................................................ 4**|
||2.1<br>Electrical characteristics (curves) ...................................................... 6|
|**3**|**Test circuits ..................................................................................... 8**|
|**4**|**Package mechanical data ............................................................... 9**|
||4.1<br>TO247-4 package information ........................................................... 9|
|**5**|**Revision history ............................................................................ 11**|



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**Electrical ratings** 

## **1 Electrical ratings** 

||**Table 2: Absolute maximum ratings**|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|VGS|Gate- source voltage|±25|V|
|ID|Drain current (continuous) at TC= 25 °C|52|A|
|ID|Drain current (continuous) at TC= 100 °C|33|A|
|IDM_(1)_|Drain current (pulsed)|208|A|
|PTOT|Total dissipation at TC= 25 °C|350|W|
|dv/dt_(2)_|Peak diode recoveryvoltage slope|15|V/ns|
|dv/dt_(3)_|MOSFET dv/dt ruggedness|50|V/ns|
|Tstg|Storage temperature|- 55 to 150|°C|
|Tj|Max. operating junction temperature|150|°C|



## **Notes:** 

(1)Pulse width limited by safe operating area 

(2)ISD ≤ 52 A, di/dt = 400 A/µs, VDS(peak) < V(BR)DSS, VDD = 400 V 

(3)VDS ≤ 480 V 

||**Table 3: Thermal data**|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|Rthj-amb|Thermal resistancejunction-ambient max|50|°C/W|
|Rthj-case|Thermal resistancejunction-case max|0.36|°C/W|



||**Table 4: Avalanche characteristics**|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|IAR|Max current during repetitive or single pulse avalanche (pulse width limited<br>byTJMAX)|7.5|A|
|EAS|Single pulse avalanche energy<br>(starting Tj= 25 °C, ID= IAR, VDD= 50 V)|1100|mJ|



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**Electrical characteristics** 

## **2 Electrical characteristics** 

(TC = 25 °C unless otherwise specified) 

|(TC= 25|°C unless otherwise specified)|°C unless otherwise specified)|||||
|---|---|---|---|---|---|---|
||**Table 5: On /offstates**||||||
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|V(BR)DSS|Drain-source breakdown<br>voltage|ID= 1 mA, VGS= 0|600|||V|
|IDSS|Zero gate voltage<br>drain current (VGS= 0)|VDS= 600 V<br>VDS= 600 V, TC=125 °C|||1<br>100|µA<br>µA|
|IGSS|Gate-body leakage<br>current (VDS= 0)|VGS= ± 25 V|||± 10|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250µA|2|3|4|V|
|RDS(on)|Static drain-source on-<br>resistance|VGS= 10 V, ID= 26 A||0.045|0.055|Ω|



||**Table 6: Dynamic**|**Table 6: Dynamic**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|Ciss|Input capacitance|VDS= 100 V, f = 1 MHz,<br>VGS= 0|-|3750|-|pF|
|Coss|Output capacitance||-|175|-|pF|
|Crss|Reverse transfer capacitance||-|6.6|-|pF|
|Co(er)_(1)_|Equivalent output capacitance|VGS= 0, VDS= 0 to 480V|-|740|-|pF|
|RG|Intrinsicgate resistance|f = 1 MHz open drain|-|4.7|-|Ω|
|Qg|Totalgate charge|VDD= 480 V, ID= 52 A,<br>VGS= 10 V|-|91|-|nC|
|Qgs|Gate-source charge||-|13.5|-|nC|
|Qgd|Gate-drain charge||-|41|-|nC|



## **Notes:** 

(1)Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS 

|||**Table 7:Switching times**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|td(on)|Turn-on delaytime|VDD= 300 V, ID= 26 A,<br>RG= 4.7 Ω, VGS= 10 V|-|18|-|ns|
|tr|Rise time||-|26.5|-|ns|
|td(off)|Turn-off delaytime||-|119|-|ns|
|tf|Fall time||-|14|-|ns|



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**Electrical characteristics** 

||**Table 8: Source draindiode**|**Table 8: Source draindiode**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|ISD|Source-drain current||-||52|A|
|ISDM_(1)_|Source-drain current (pulsed)||-||208|A|
|VSD_(2)_|Forward on voltage|ISD= 52 A, VGS= 0|-||1.6|V|
|trr|Reverse recoverytime|ISD= 52 A,<br>di/dt = 100 A/µs<br>VDD= 100 V|-|496||ns|
|Qrr|Reverse recoverycharge||-|10||µC|
|IRRM|Reverse recoverycurrent||-|41||A|
|trr|Reverse recoverytime|ISD= 52 A,<br>di/dt = 100 A/µs<br>VDD= 60 V, Tj= 150 °C|-|632||ns|
|Qrr|Reverse recoverycharge||-|14||µC|
|IRRM|Reverse recoverycurrent||-|45||A|



## **Notes:** 

(1)Pulse width limited by safe operating area 

(2)Pulsed: pulse duration = 300 µs, duty cycle 1.5% 

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**Electrical characteristics** 

## **2.2 Electrical characteristics (curves)** 

**==> picture [359 x 10] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 2: Safe operating area  Figure 3: Thermal impedance<br>**----- End of picture text -----**<br>


**Figure 4: Output characteristics** 

**Figure 5: Transfer characteristics** 

**Figure 6: Gate charge vs gate-source voltage** 

**Figure 7: Static drain-source on-resistance** 

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**Electrical characteristics** 

**Figure 8: Capacitance variations** 

**Figure 10: Normalized on-resistance** 

**==> picture [203 x 160] intentionally omitted <==**

**Figure 12: Source-drain diode forward characteristics** 

**==> picture [193 x 160] intentionally omitted <==**

**Figure 9: Normalized gate threshold voltage vs temperature** 

**Figure 11: Normalized V(BR)DSS vs temperature** 

**==> picture [209 x 160] intentionally omitted <==**

**Figure 13: Output capacitance stored energy** 

**==> picture [194 x 160] intentionally omitted <==**

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**Test circuits** 

## **3 Test circuits** 

**==> picture [219 x 19] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 14: Switching times test circuit for resistive<br>load<br>**----- End of picture text -----**<br>


**Figure 15: Gate charge test circuit** 

**==> picture [202 x 88] intentionally omitted <==**

**----- Start of picture text -----**<br>
2200 3.3<br>RL<br>µF µF<br>+ VDD<br>— VD<br>VGS<br>RG D.U.T.<br>|<br>PW<br>GND1 GND2<br>(driver signal) (power)<br>**----- End of picture text -----**<br>


**Figure 16:  Test circuit for inductive load switching and diode recovery times** 

**Figure 17:  Unclamped inductive load test circuit** 

**==> picture [430 x 127] intentionally omitted <==**

**----- Start of picture text -----**<br>
A A A L<br>D<br>FAST L=100µH<br>G D.U.T. DIODE VD<br>2200 3.3<br>25Ω S B B (e) B D 3.3µF + 1000µF VDD + µF µF VDD<br>ID<br>G<br>RG S<br>) D.U.T. —<br>Vi D.U.T.<br>GND1 GND2 Pw<br>GND1 GND2 AM15858v1<br>**----- End of picture text -----**<br>


**Figure 18: Unclamped inductive waveform Figure 19: Switching time waveform** 

**==> picture [428 x 144] intentionally omitted <==**

**----- Start of picture text -----**<br>
V(BR)DSS t on toff<br>t d(on) t r t d(off) t f<br>VD<br>90% 90%<br>I DM<br>10%<br>I D 0 10% VDS<br>VDD VDD<br>90%<br>VGS<br>AM01472v1 0 10% AM01473v1<br>**----- End of picture text -----**<br>


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**Package mechanical** data 

## **4 Package mechanical data** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _**www.st.com**_ . ECOPACK[®] is an ST trademark. 

## **4.1 TO247-4 package information** 

**Figure 20: TO247-4 package outline** 

**==> picture [407 x 481] intentionally omitted <==**

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**Package mechanical** data 

|**echanical** data|||**STW56N60M2-4**|
|---|---|---|---|
||**Table 9: TO247-4 mechanical data**|||
|||**mm.**||
|**Dim.**||||
||**Min.**|**Typ.**|**Max.**|
|||||
|A|4.90|5.00|5.10|
|A1|2.31|2.41|2.51|
|A2|1.90|2.00|2.10|
|b|1.16||1.29|
|b1|1.15|1.20|1.25|
|b2|0||0.20|
|c|0.59||0.66|
|c1|0.58|0.60|0.62|
|D|20.90|21.00|21.10|
|D1|16.25|16.55|16.85|
|D2|1.05|1.20|1.35|
|D3|24.97|25.12|25.27|
|E|15.70|15.80|15.90|
|E1|13.10|13.30|13.50|
|E2|4.90|5.00|5.10|
|E3|2.40|2.50|2.60|
|e|2.44|2.54|2.64|
|e1|4.98|5.08|5.18|
|L|19.80|19.92|20.10|
|P|3.50|3.60|3.70|
|P1|||7.40|
|P2|2.40|2.50|2.60|
|Q|5.60||6.00|
|S||6.15||
|T|9.80||10.20|
|U|6.00||6.40|



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**Revision history** 

## **5 Revision history** 

||**Table 10: Document revision history**|**Table 10: Document revision history**|
|---|---|---|
|**Date**|**Revision**|**Changes**|
|25-Jul-2014|1|Initial release.|
|01-Dec-2014|2|Document status promoted from preliminary to production data.<br>Added_Section 2.1: "Electrical characteristics (curves)"_.|
|29-Jan-2015|3|Updated_Figure 1: "Internal schematic diagram"_.|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

- © 2015 STMicroelectronics – All rights reserved 

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