# Power MOSFET, N Channel, 650 V, 33 A, 0.074 ohm, TO-247, Through Hole

![Product image](https://novapart.co/image/farnell:3498800/)

**URL**: https://novapart.co/products/STW50N65DM6/power-mosfet-n-channel-650-v-33-a-0074-ohm-to-247
**SKU**: STW50N65DM6
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €3.6500
**Stock**: 50+
**Lead Time**: 2 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | MDmesh DM6 |
| Qualification | - |
| Power Dissipation | 250W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-247 |
| Drain Source Voltage Vds | 650V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 33A |
| Drain Source On State Resistance | 0.074ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3498800/)

**STW50N65DM6** 

Datasheet 

N-channel 650 V, 74 mΩ typ., 33 A MDmesh DM6 Power MOSFET in a TO-247 package 

## **Features** 

|**Order code**<br>~~ES~~|**VDS**<br>~~ee~~|**RDS(on) max.**<br>~~ee~~|**ID**|
|---|---|---|---|
|STW50N65DM6<br>~~ES~~|650 V<br>~~ee~~|91 mΩ<br>~~ee~~|33 A|



- Fast-recovery body diode 

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3<br>2<br>1<br>TO-247<br>**----- End of picture text -----**<br>


- Lower RDS(on) per area vs previous generation 

- Low gate charge, input capacitance and resistance 

- 100% avalanche tested 

- Extremely high dv/dt ruggedness 

- Zener-protected 

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D(2, TAB)<br>**----- End of picture text -----**<br>


## **Applications** 

G(1) S(3) AM01475V1 

**Product status link** ~~_o_~~ 

|**Product summary**<br>~~a~~|**Product summary**<br>~~a~~|
|---|---|
|**Order code**|STW50N65DM6|
|**Marking**|50N65DM6|
|**Package**|TO-247|
|**Packing**|Tube|



- Switching applications 

## **Description** 

This high-voltage N-channel Power MOSFET is part of the MDmesh DM6 fastrecovery diode series. Compared with the previous MDmesh fast generation, DM6 combines very low recovery charge (Qrr), recovery time (trr) and excellent improvement in RDS(on) per area with one of the most effective switching behaviors available in the market for the most demanding high-efficiency bridge topologies and ZVS phase-shift converters. 

**DS13174** - **Rev 1** - **November 2019** For further information contact your local STMicroelectronics sales office. 

www.st.com 

**STW50N65DM6 Electrical ratings** 

## **1** 

## **Electrical ratings** 

**Table 1. Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VGS|Gate-source voltage|±25|V|
|ID|Drain current (continuous) at TC= 25 °C|33|A|
|ID|Drain current (continuous) at TC= 100 °C|21|A|
|ID (1)|Drain current (pulsed)|120|A|
|PTOT|Total power dissipation at TC= 25 °C|250|W|
|dv/dt(2)|Peak diode recovery voltage slope|50|V/ns|
|dv/dt(3)|MOSFET dv/dt ruggedness|100|V/ns|
|Tstg|Storage temperature range|-55 to 150|°C|
|TJ|Operating junction temperature range|||



_1. Pulse width limited by safe operating area_ 

_2. ISD ≤ 33 A, di/dt ≤900 A/μs; VDS (peak) < V(BR)DSS, VDD= 400V_ 

_3. VDS ≤ 520V_ 

## **Table 2. Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistance junction-case|0.5|°C/W|
|Rthj-amb|Thermal resistance junction-ambient|50|°C/W|



## **Table 3. Avalanche characteristics** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|IAR|Avalanche current, repetitive or not repetitive (pulse width limited by Tjmax)|9|A|
|EAS|Single pulse avalanche energy (starting Tj= 25 °C, ID= IAR, VDD= 50 V)|560|mJ|



**DS13174** - **Rev 1** 

**page 2/13** 

**STW50N65DM6 Electrical characteristics** 

## **2 Electrical characteristics** 

TC = 25 °C unless otherwise specified 

**Table 4. On/off-state** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown<br>voltage|VGS= 0 V, ID= 1 mA|650|||V|
|IDSS|Zero gate voltage drain current|VGS= 0 V, VDS= 650 V|||5|µA|
|||VGS= 0 V, VDS= 650 V<br>TC= 125 °C(1)|||100|µA|
|IGSS|Gate body leakage current|VDS= 0 V, VGS= ±25 V|||±5|µA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|3.25|4|4.75|V|
|RDS(on)|Static drain-source on-<br>resistance|VGS= 10 V, ID= 16.5 A||74|91|mΩ|



_1. Defined by design, not subject to production test._ 

**Table 5. Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 100 V, f = 1 MHz, VGS= 0 V|-|2300|-|pF|
|Coss|Output capacitance||-|165|-|pF|
|Crss|Reverse transfer capacitance||-|3|-|pF|
|Coss eq. (1)|Equivalent output capacitance|VDS= 0 to 520 V, VGS= 0 V||414||pF|
|Rg|Intrinsic gate resistance|f = 1 MHz, ID= 0 A|-|1.7|-|Ω|
|Qg|Total gate charge|VDD= 520 V, ID= 33 A<br>VGS= 0 to 10 V (seeFigure 14. Test<br>circuit for gate charge behavior)|-|52.5|-|nC|
|Qgs|Gate-source charge||-|14.5|-|nC|
|Qgd|Gate-drain charge||-|22.5|-|nC|



_1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as COSS when VDS increases from 0 to 80% VDSS_ 

**Table 6. Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delay time|VDD= 325 V, ID= 16.5 A, RG= 4.7 Ω<br>VGS= 10 V (seeFigure 13. Test circuit<br>for resistive load switching timesand<br>Figure 18. Switching time waveform)|-|19.2|-|ns|
|tr|Rise time||-|12|-|ns|
|td(off)|Turn-off delay time||-|59.6|-|ns|
|tf|Fall time||-|9.6|-|ns|



**DS13174** - **Rev 1** 

**page 3/13** 

**STW50N65DM6 Electrical characteristics** 

## **Table 7. Source-drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain current||-||33|A|
|ISDM (1)|Source-drain current (pulsed)||-||120|A|
|VSD (2)|Forward on voltage|VGS= 0 V, ISD= 33 A|-||1.6|V|
|trr|Reverse recovery time|ISD= 33 A, di/dt = 100 A/µs,VDD= 60 V<br>(seeFigure 15. Test circuit for inductive<br>load switching and diode recovery times)|-|130||ns|
|Qrr|Reverse recovery charge||-|0.65||µC|
|IRRM|Reverse recovery current||-|10||A|
|trr|Reverse recovery time|ISD= 33 A, di/dt = 100 A/µs VDD= 60 V,<br>Tj= 150 °C (seeFigure 15. Test circuit<br>for inductive load switching and diode<br>recovery times)|-|226||ns|
|Qrr|Reverse recovery charge||-|2.32||µC|
|IRRM|Reverse recovery current||-|20.6||A|



_1. Pulse width limited by safe operating area_ 

_2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%_ 

**DS13174** - **Rev 1** 

**page 4/13** 

**STW50N65DM6 Electrical characteristics (curves)** 

## **2.1 Electrical characteristics (curves)** 

**Figure 1. Safe operating area** 

**Figure 2. Maximum transient thermal impedance** 

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ID GADG261120190945SOA Zthj-c GADG211120191320ZTH<br>(A)  IDM (°C/W) 0.4 0.3<br>duty = 0.5<br>10  [2 ] ee tp =1 µs Saami sere<br>Sea AN XN | | 10  [-1 ] co Sn<br>10  [1 ] tp =10 µs 0.2<br>0.1<br>10  [0 ] yan R DS(on)  max. \ \ A 0.5 !<br>et ae tp =100 µs 10  [-2 ] NE A Single pulse RthJ-C = 0.5°C/W<br>V(BR)DSS<br>10  [-1 ] TT a CJ ≤ 150 °C= 25 °C tp =10 ms \\ea | tp =1 ms eSFC a= ton<br>10  [-2 ] single pulse 10  [-3 ]<br>10  mail [-1 ] 10  [0 ] 10  moti [1 ] 10  [2 ] VDS (V) 10  [-6 ] 10  [-5 ] 10  [-4 ] 10  [-3 ] 10  [-2 ] Co 10  | [-1 ] tp (s)<br>Figure 3. Typical output characteristics Figure 4. Typical transfer characteristics<br>ID GADG090720191225OCH ID GADG090720191225TCH<br>(A)  a VGS = 9, 10 V (A)  SSS<br>100 aa a 100 PEEP yr<br>ee PEEP<br>VGS = 8 V VDS = 20 V<br>80 80<br>an) Ao VGS = 7 V FES<br>60 60<br>40 Peete 40<br>VGS = 6 V<br>20 20<br>0 Pett VGS = 5 V 0 2<br>0 4 8 por 12 16 VDS (V) 4 5 C 6 7 8 9 VGS (V)<br>Typical gate charge characteristics Figure 6. Typical drain-source on-resistanceTypical drain-source on-resistance<br>VDS GADG090720191225QVG VGS RDS(on) GADG090720191226RID<br>(V) VDD = 520 V, ID = 33 A (V) (mΩ)<br>600 12 80<br>Qg<br>PEEEECE Oe P EEPOOrrr<br>500 10 78<br>REE EERE EEE<br>Pf PEPE rae<br>400 POA Qgs EEE Qgd  ya 8 76 PEEP V  EEE GS = 10 V a<br>300 6 74<br>carTS pfpee<br>200 4 72<br>100 2 70<br>[Ee] pet<br>0 sia anne [Mae] 0 68 =<br>0 PCO 10 20 30 40 50 60 Qg (nC) 0 PEER 5 10 rere 15 20 25 30 ID (A)<br>DS(on)<br>Operation in this area<br>is limited by R<br>**----- End of picture text -----**<br>


**Figure 6. Typical drain-source on-resistanceTypical drain-source on-resistance** 

**Figure 5. Typical gate charge characteristics** 

**DS13174** - **Rev 1** 

**page 5/13** 

**STW50N65DM6 Electrical characteristics (curves)** 

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Figure 7. Typical capacitance characteristics Figure 8. Typical output capacitance stored energy<br>C  GADG090720191226CVR EOSS GADG090720191228EOS<br>(pF)  (µJ)<br>24<br>10  [4 ]<br>20<br>CISS<br>10  [3 ]<br>16<br>12<br>10  [2 ] f = 1 MHz COSS<br>8<br>10  [1 ] CRSS<br>4<br>10  [0 ] 0<br>10  [-1 ] 10  [0 ] 10  [1 ] 10  [2 ] VDS (V) 0 100 200 300 400 500 600 VDS (V)<br>**----- End of picture text -----**<br>


**==> picture [513 x 178] intentionally omitted <==**

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Figure 9. Normalized gate threshold vs temperature Figure 10. Normalized on-resistance vs temperature<br>VGS(th) GADG090720191229VTH RDS(on) GADG090720191229RON<br>(norm.)  (norm.)<br>1.1 2.5<br>1.0 2.0<br>ID = 250 µA<br>VGS = 10 V<br>0.9 1.5<br>0.8 1.0<br>0.7 0.5<br>0.6 0.0<br>-75 -25 25 75 125 Tj (°C) -75 -25 25 75 125 Tj (°C)<br>**----- End of picture text -----**<br>


**==> picture [513 x 178] intentionally omitted <==**

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Figure 11. Normalized breakdown voltage vs temperature Figure 12. Typical reverse diode forward characteristics<br>V(BR)DSS GADG090720191230VTH VSD GADG090720191230SDF<br>(norm.) (V)<br>1.1<br>1.10 Tj = -50 °C<br>ID = 1 mA 1.0<br>1.05<br>0.9<br>Tj = 25°C<br>1.00<br>0.8<br>0.95 Tj = 150°C<br>0.7<br>0.90<br>0.6<br>0.85 0.5<br>-75 -25 25 75 125 Tj (°C) 0 5 10 15 20 25 30 ISD (A)<br>**----- End of picture text -----**<br>


**DS13174** - **Rev 1** 

**page 6/13** 

**STW50N65DM6 Test circuits** 

**3 Test circuits** 

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Figure 13. Test circuit for resistive load switching times<br>Figure 14. Test circuit for gate charge behavior<br>VDD<br>RL<br>RL 2200 3.3<br>VD + μF μF VDD VGS IG= CONST 100 Ω D.U.T.<br>pulse width +<br>VGS RG D.U.T. 2200 2.7 kΩ VG<br>pulse width μF<br>47 kΩ<br>1 kΩ<br>AM01469v10<br>AM01468v1<br>**----- End of picture text -----**<br>


**==> picture [513 x 189] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 15. Test circuit for inductive load switching and<br>Figure 16. Unclamped inductive load test circuit<br>diode recovery times<br>A A A L<br>G D D.U.T. fastdiode 100 µH VD 2200 3.3<br>25 Ω S B B B D µF3.3 + 1000µF VDD ID + µF µF VDD<br>G D.U.T.<br>+ RG S Vi D.U.T.<br>_ pulse width<br>AM01471v1<br>AM01470v1<br>**----- End of picture text -----**<br>


**==> picture [513 x 177] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 18. Switching time waveform<br>Figure 17. Unclamped inductive waveform<br>ton toff<br>V(BR)DSS td(on) tr td(off) tf<br>VD<br>90% 90%<br>IDM<br>10% VDS 10%<br>ID 0<br>VDD VDD<br>VGS 90%<br>AM01472v1 0 10%<br>AM01473v1<br>**----- End of picture text -----**<br>


**DS13174** - **Rev 1** 

**page 7/13** 

**STW50N65DM6 Package information** 

**4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 

**DS13174** - **Rev 1** 

**page 8/13** 

**STW50N65DM6 TO-247 package information** 

## **4.1 TO-247 package information** 

**Figure 19. TO-247 package outline** 

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0075325_9<br>**----- End of picture text -----**<br>


**DS13174** - **Rev 1** 

**page 9/13** 

**STW50N65DM6 TO-247 package information** 

**Table 8. TO-247 package mechanical data** 

|**Di**|**mm**|**mm**|**mm**|
|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|
|A|4.85||5.15|
|A1|2.20||2.60|
|b|1.0||1.40|
|b1|2.0||2.40|
|b2|3.0||3.40|
|c|0.40||0.80|
|D|19.85||20.15|
|E|15.45||15.75|
|e|5.30|5.45|5.60|
|L|14.20||14.80|
|L1|3.70||4.30|
|L2||18.50||
|ØP|3.55||3.65|
|ØR|4.50||5.50|
|S|5.30|5.50|5.70|



**DS13174** - **Rev 1** 

**page 10/13** 

**STW50N65DM6** 

## **Revision history** 

**Table 9. Document revision history** 

|**Date**|**Version**|**Changes**|
|---|---|---|
|26-Nov-2019|1|First release.|



**DS13174** - **Rev 1** 

**page 11/13** 

**STW50N65DM6 Contents** 

## **Contents** 

|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2**|
|---|---|
|**2**|**Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3**|
||**2.1**<br>Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5|
|**3**|**Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7**|
|**4**|**Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8**|
||**4.1**<br>TO-247 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8|
|**Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11**||



**DS13174** - **Rev 1** 

**page 12/13** 

**STW50N65DM6** 

## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2019 STMicroelectronics – All rights reserved 

**DS13174** - **Rev 1** 

**page 13/13** 



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- [Supplier page](https://es.farnell.com/stmicroelectronics/stw50n65dm6/mosfet-n-ch-650v-33a-to-247/dp/3498800)
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