# Power MOSFET, N Channel, 600 V, 42 A, 0.06 ohm, TO-247, Through Hole

![Product image](https://novapart.co/image/farnell:2807328/)

**URL**: https://novapart.co/products/STW48N60M2/power-mosfet-n-channel-600-v-42-a-006-ohm-to-247
**SKU**: STW48N60M2
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €3.4500
**Stock**: 200+
**Lead Time**: 127 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:42A; Drain Source Voltage Vds:600V; On Resistance Rds(on):0.06ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:3V; Power

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | MDmesh M2 |
| Qualification | - |
| Power Dissipation | 300W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-247 |
| Drain Source Voltage Vds | 600V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 42A |
| Drain Source On State Resistance | 0.06ohm |
| Gate Source Threshold Voltage Max | 3V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2807328/)

## **STW48N60M2** 

N-channel 600 V, 0.06 Ω typ., 42 A MDmesh™ M2 Power MOSFET in a TO-247 package 

Datasheet - production data 

## **Features** 

**Order code VDS @ TJmax. RDS(on) max. ID** STW48N60M2 650 V 0.07 Ω 42 A ~~——~~  Extremely low gate charge 

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3<br>2<br>1<br>TO-247<br>**----- End of picture text -----**<br>


- Excellent output capacitance (COSS) profile 

- 100% avalanche tested 

- Zener-protected 

## **Applications** 

- Switching applications 

**Figure 1: Internal schematic diagram** 

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D(2, TAB)<br>G(1)<br>S(3)<br>AM01476v1<br>**----- End of picture text -----**<br>


## **Description** 

This device is an N-channel Power MOSFET developed using MDmesh™ M2 technology. Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters. 

**Table 1: Device summary Order code Marking Package Packing** STW48N60M2 48N60M2 TO-247 Tube ~~———————~~ 

This is information on a product in full production. 

_www.st.com_ 

January 2017 

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|**Contents**<br>**STW48N60M2**|**Contents**<br>**STW48N60M2**|
|---|---|
|**Contents**||
|**1**|**Electrical ratings ............................................................................. 3**|
|**2**|**Electrical characteristics ................................................................ 4**|
||2.1<br>Electrical characteristics (curves) ...................................................... 6|
|**3**|**Test circuits ..................................................................................... 8**|
|**4**|**Package information ....................................................................... 9**|
||4.1<br>TO-247 package information ............................................................. 9|
|**5**|**Revision history ............................................................................ 11**|



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**Electrical** ratings 

## **1 Electrical ratings** 

**Table 2: Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VGS|Gate-source voltage|± 25|V|
|ID|Drain current (continuous) at TC= 25 °C|42|A|
|ID|Drain current (continuous) at TC= 100 °C|26|A|
|IDM_(1)_|Drain current (pulsed)|168|A|
|PTOT|Total dissipation at TC= 25 °C|300|W|
|dv/dt_(2)_|Peak diode recoveryvoltage slope|15|V/ns|
|dv/dt_(3)_|MOSFET dv/dt ruggedness|50|V/ns|
|Tstg|Storage temperature range|- 55 to 150|°C|
|Tj|Operating junction temperature range|||



## **Notes:** 

(1)Pulse width limited by safe operating area. 

(2)ISD ≤ 42 A, di/dt ≤ 400 A/µs; VDS(peak) < V(BR)DSS, VDD = 400 V 

(3)VDS ≤ 480 V 

## **Table 3: Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistancejunction-case max.|0.42|°C/W|
|Rthj-amb|Thermal resistancejunction-ambient max.|50|°C/W|



## **Table 4: Avalanche characteristics** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|IAR|Avalanche current, repetitive or not repetitive (pulse width<br>limited byTjmax.)|7|A|
|EAS|Single pulse avalanche energy (starting Tj= 25 °C, ID= IAR;<br>VDD= 50 V)|1|J|



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**Electrical characteristics** 

## **2 Electrical characteristics** 

(TC = 25 °C unless otherwise specified) 

**Table 5: On /off-states** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source<br>breakdown voltage|VGS= 0, ID= 1 mA|600|||V|
|IDSS|Zero-gate voltage<br>drain current|VGS= 0, VDS= 600 V|||1|µA|
|||VGS= 0, VDS= 600 V,<br>TC= 125 °C_(1)_|||100|µA|
|IGSS|Gate-body leakage<br>current|VDS= 0, VGS= ± 25 V|||±10|µA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250µA|2|3|4|V|
|RDS(on)|Static drain-source<br>on-resistance|VGS= 10 V, ID= 21 A||0.06|0.07|Ω|



## **Notes:** 

(1)Defined by design, not subject to production test. 

**Table 6: Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VGS= 0, VDS= 100 V, f = 1 MHz|-|3060|-|pF|
|Coss|Output capacitance||-|143|-|pF|
|Crss|Reverse transfer<br>capacitance||-|4.3|-|pF|
|Coss<br>eq._(1)_|Equivalent output<br>capacitance|VGS= 0, VDS= 0 to 480 V|-|630|-|pF|
|RG|Intrinsic gate<br>resistance|f = 1 MHz, ID= 0|-|4.6|-|Ω|
|Qg|Totalgate charge|VDD= 480 V, ID= 42 A,<br>VGS= 10 V<br>(see_Figure 15: "Test circuit for_<br>_gate charge behavior"_)|-|70|-|nC|
|Qgs|Gate-source charge||-|10.5|-|nC|
|Qgd|Gate-drain charge||-|31|-|nC|



## **Notes:** 

(1)Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. 

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**Electrical** characteristics 

||**Table 7: Switching times**|**Table 7: Switching times**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|td(on)|Turn-on delaytime|VDD= 300 V, ID= 21 A,<br>RG= 4.7 Ω, VGS= 10 V<br>(see_Figure 14: "Test circuit for_<br>_resistive load switching times"_and<br>_Figure 19: "Switching time waveform"_)|-|18.5|-|ns|
|tr|Rise time||-|17|-|ns|
|td(off)|Turn-off-delaytime||-|13|-|ns|
|tf|Fall time||-|119|-|ns|



**Table 8: Source-drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain<br>current||-||42|A|
|ISDM_(1)_|Source-drain<br>current (pulsed)||-||168|A|
|VSD_(2)_|Forward on voltage|VGS= 0, ISD= 21 A|-||1.6|V|
|trr|Reverse recovery<br>time|ISD= 42 A, di/dt = 100 A/µs<br>VDD= 60 V (see_Figure 17:_<br>_"Unclamped inductive load test_<br>_circuit"_)|-|487||ns|
|Qrr|Reverse recovery<br>charge||-|9.1||µC|
|IRRM|Reverse recovery<br>current||-|37.5||A|
|trr|Reverse recovery<br>time|ISD= 42 A, di/dt = 100 A/µs<br>VDD= 60 V, Tj= 150 °C<br>(see_Figure 17: "Unclamped inductive_<br>_load test circuit"_)|-|605||ns|
|Qrr|Reverse recovery<br>charge||-|12.5||µC|
|IRRM|Reverse recovery<br>current||-|41.5||A|



## **Notes:** 

(1)Pulse width limited by safe operating area. 

(2)Pulsed: pulse duration = 300 µs, duty cycle 1.5%. 

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## **Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**Figure 2: Safe operating area** 

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**Figure 3: Thermal impedance** 

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**Figure 4: Output characteristics** 

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**Figure 5: Transfer characteristics** 

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**Figure 6: Gate charge vs gate-source voltage** 

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**Figure 7: Static drain-source on-resistance** 

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**Electrical** characteristics 

**Figure 8: Capacitance variations** 

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**Figure 9: Output capacitance stored energy** 

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Figure 10: Normalized gate threshold voltage vs<br>Figure 11: Normalized on-resistance vs temperature<br>temperature<br>**----- End of picture text -----**<br>


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Figure 13: Source-drain diode forward<br>Figure 12: Normalized V(BR)DSS vs temperature<br>characteristics<br>**----- End of picture text -----**<br>


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**Test circuits** 

## **3 Test circuits** 

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**----- Start of picture text -----**<br>
Figure 14: Test circuit for resistive load  Figure 15: Test circuit for gate charge<br>switching times  behavior<br>Figure 17: Unclamped inductive load test<br>Figure 16: Test circuit for inductive load  circuit<br>switching and diode recovery times<br>Figure 19: Switching time waveform<br>Figure 18: Unclamped inductive waveform<br>**----- End of picture text -----**<br>


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**Package** information 

## **4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 

## **4.1 TO-247 package information** 

**Figure 20: TO-247 package outline** 

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0075325_8<br>**----- End of picture text -----**<br>


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**Package information** 

**Table 9: TO-247 package mechanical data** 

|**Dim.**||**mm**||
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|4.85||5.15|
|A1|2.20||2.60|
|b|1.0||1.40|
|b1|2.0||2.40|
|b2|3.0||3.40|
|c|0.40||0.80|
|D|19.85||20.15|
|E|15.45||15.75|
|e|5.30|5.45|5.60|
|L|14.20||14.80|
|L1|3.70||4.30|
|L2||18.50||
|ØP|3.55||3.65|
|ØR|4.50||5.50|
|S|5.30|5.50|5.70|



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**Revision** history 

## **5 Revision history** 

**Table 10: Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|09-Jun-2014|1|First release.|
|01-Sep-2014|2|Document status promoted from preliminary to production data.<br>Added_Section 2.1: "Electrical characteristics curves"_.<br>Minor text changes.|
|19-Jan-2017|3|Updated_Table 2: "Absolute maximum ratings"_,_Table 4:_<br>_"Avalanche characteristics"_,_Table 5: "On /off-states"_and_Table 7:_<br>_"Switching times"_.<br>Updated_Section 2.1: "Electrical characteristics (curves)"_.|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

- © 2017 STMicroelectronics – All rights reserved 

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