# Power MOSFET, N Channel, 550 V, 45 A, 0.1 ohm, TO-247, Through Hole

![Product image](https://novapart.co/image/farnell:1291995/)

**URL**: https://novapart.co/products/STW45NM50/power-mosfet-n-channel-550-v-45-a-01-ohm-to-247
**SKU**: STW45NM50
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €5.9000
**Stock**: 1000+
**Lead Time**: 127 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:45A; Drain Source Voltage Vds:550V; On Resistance Rds(on):0.1ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4V; Power

## Specifications

| Parameter | Value |
|---|---|
| Msl | - |
| Svhc | Lead (21-Jan-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 417W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-247 |
| Drain Source Voltage Vds | 550V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 45A |
| Drain Source On State Resistance | 0.1ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:1291995/)

## **STW45NM50** 

N-channel 500 V, 0.08 Ω typ., 45 A MDmesh™ Power MOSFET in a TO-247 package 

Datasheet - production data 

## **Features** 

**Order code VDS RDS(on) max ID** STW45NM50 500 V 0.1 Ω 45 A ~~a~~ 

- 100% avalanche tested 

- High dv/dt and avalanche capabilities 

**==> picture [62 x 53] intentionally omitted <==**

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3<br>2<br>1<br>TO-247<br>**----- End of picture text -----**<br>


- Low input capacitance and gate charge 

- Low gate input resistance 

## **Applications** 

- Switching applications 

**Figure 1: Internal schematic diagram** 

## **Description** 

This N-channel Power MOSFET is developed using STMicroelectronics' revolutionary MDmesh™ technology, which associates the multiple drain process with the company's PowerMESH™ horizontal layout. This device offer extremely low on-resistance, high dv/dt and excellent avalanche characteristics. Utilizing ST's proprietary strip technique, this Power MOSFET boasts an overall dynamic performance which is superior to similar products on the market. 

**Table 1: Device summary** 

|**Order code**|**Marking**|**Package**|**Packaging**|
|---|---|---|---|
|STW45NM50|W45NM50|TO-247|Tube|



This is information on a product in full production. 

_www.st.com_ 

July 2016 

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|**Contents**<br>**STW45NM50**|**Contents**<br>**STW45NM50**|
|---|---|
|**Contents**||
|**1**|**Electrical ratings ............................................................................. 3**|
|**2**|**Electrical characteristics ................................................................ 4**|
||2.1<br>Electrical characteristics (curves) ...................................................... 6|
|**3**|**Test circuits ..................................................................................... 8**|
|**4**|**Package information ....................................................................... 9**|
||4.1<br>TO-247 package information ............................................................. 9|
|**5**|**Revision history ............................................................................ 11**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2: Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VGS|Gate-source voltage|±30|V|
|ID|Drain current (continuous) at TC= 25 °C|45|A|
|ID|Drain current (continuous) at TC= 100 °C|28.4|A|
|IDM_(1)_|Drain current (pulsed)|180|A|
|PTOT|Total dissipation at TC= 25 °C|390|W|
|dv/dt_(2)_|Peak diode recoveryvoltage slope|15|V/ns|
|Tstg|Storage temperature range|-55 to 150|°C|
|Tj|Operating junction temperature range|||



## **Notes:** 

(1)Pulse width limited by safe operating area. 

(2)ISD ≤ 45 A, di/dt ≤ 400 A/µs, VDS(peak) ≤ V(BR)DSS, VDD ≤ 80% V(BR)DSS 

## **Table 3: Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistancejunction-case|0.32|°C/W|
|Rthj-amb|Thermal resistancejunction-ambient|30|°C/W|



## **Table 4: Avalanche characteristics** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|IAR|Avalanche current, repetitive or not-repetitive<br>(pulse width limited by Tj max)|15|A|
|EAS|Single pulse avalanche energy<br>(startingTJ=25 °C, ID=IAR, VDD=50 V)|700|mJ|



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**Electrical characteristics** 

## **2 Electrical characteristics** 

(TCASE = 25 °C unless otherwise specified) 

**Table 5: On/off states** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source<br>breakdown voltage|ID= 1 mA, VGS= 0 V|500|||V|
|IDSS|Zero gate voltage drain<br>current|VGS= 0 V, VDS= 500 V|||10|µA|
|||VGS= 0 V, VDS= 500 V,<br>TC= 125 °C_(1)_|||100||
|IGSS|Gate-bodyleakage current|VDS= 0 V, VGS= ±30 V|||±100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|3|4|5|V|
|RDS(on)|Static drain-source on-<br>resistance|VGS= 10 V, ID= 22.5 A||0.08|0.1|Ω|
|**Notes:**<br>(1)Defined b|y design, not subject to production test.<br>**Table 6: Dynamic**||||||
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|Ciss|Input capacitance|VDS= 25 V, f = 1 MHz,<br>VGS= 0 V|-|3290|-|pF|
|Coss|Output capacitance||-|865|-|pF|
|Crss|Reverse transfer<br>capacitance||-|140|-|pF|
|Coss eq._(1)_|Equivalent output<br>capacitance|VGS= 0 V, VDS= 0 to 400 V|-|270|-|pF|
|Qg|Totalgate charge|VDD= 400 V, ID= 45 A,<br>VGS= 10 V (see_Figure 14:_<br>_"Test circuit for gate charge_<br>_behavior"_)|-|113|-|nC|
|Qgs|Gate-source charge||-|17|-|nC|
|Qgd|Gate-drain charge||-|82|-|nC|
|RG|Gate input resistance|f = 1 MHz, ID= 0 A|-|1.7|-|Ω|



## **Notes:** 

(1)Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDS 

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**Electrical characteristics** 

## **Table 7: Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delaytime|VDD= 250 V, ID= 22.5 A, RG= 4.7 Ω,<br>VGS= 10 V (see_Figure 15: "Test_<br>_circuit for inductive load switching and_<br>_diode recovery times"_)|-|29.1|-|ns|
|tr|Rise time||-|73.6|-|ns|
|tr(Voff)|Off-voltage rise<br>time|VDD= 400 V, ID= 45 A, RG= 4.7 Ω,<br>VGS= 10 V (see_Figure 15: "Test_<br>_circuit for inductive load switching and_<br>_diode recovery times"_)|-|20.8|-|ns|
|tf|Fall time||-|58.3|-|ns|
|tc|Cross-over time||-|67.6|-|ns|



|||**Table 8: Source-drain diode**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|ISD|Source-drain current||-||45|A|
|ISDM_(1)_|Source-drain current<br>(pulsed)||-||180|A|
|VSD_(2)_|Forward on voltage|ISD= 45 A, VGS= 0 V|-||1.5|V|
|trr|Reverse recoverytime|ISD= 45 A, di/dt = 100 A/µs<br>VDD= 60 V (see_Figure 15: "Test_<br>_circuit for inductive load_<br>_switching and diode recovery_<br>_times"_)|-|454||ns|
|Qrr|Reverse recovery<br>charge||-|9380||nC|
|IRRM|Reverse recovery<br>current||-|41.3||A|
|trr|Reverse recoverytime|ISD= 45 A, di/dt = 100 A/µs<br>VDD= 100 V, Tj= 150 °C (see<br>_Figure 15: "Test circuit for_<br>_inductive load switching and_<br>_diode recovery times"_)|-|567||ns|
|Qrr|Reverse recovery<br>charge||-|12700||nC|
|IRRM|Reverse recovery<br>current||-|44.8||A|



## **Notes:** 

(1)Pulse width limited by safe operating area. 

(2)Pulsed: pulse duration = 300 µs, duty cycle 1.5% 

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## **Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**Figure 2: Safe operating area** 

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Figure 3: Thermal impedance<br>**----- End of picture text -----**<br>


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**Figure 4: Output characteristics Figure 5: Transfer characteristics** 

**Figure 6: Gate charge vs gate-source voltage** 

**Figure 7: Static drain-source on resistance** 

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**Electrical characteristics** 

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Figure 9: Normalized gate threshold voltage vs<br>Figure 8: Capacitance variations<br>temperature<br>**----- End of picture text -----**<br>


**Figure 10: Normalized on-resistance vs temperature Figure 11: Normalized V(BR)DSS vs temperature** 

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**Figure 12: Source-drain diode forward characteristics** 

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**Test circuits** 

## **3 Test circuits** 

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**----- Start of picture text -----**<br>
Figure 14: Test circuit for gate charge<br>Figure 13: Test circuit for resistive load<br>behavior<br>switching times<br>Figure 15: Test circuit for inductive load<br>switching and diode recovery times<br>Figure 16: Unclamped inductive load test<br>circuit<br>Figure 17: Unclamped inductive waveform  Figure 18: Switching time waveform<br>**----- End of picture text -----**<br>


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**Package information** 

## **4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _**www.st.com**_ . ECOPACK[®] is an ST trademark. 

## **4.1 TO-247 package information** 

**Figure 19: TO-247 package outline** 

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**Package information** 

**Table 9: TO-247 package mechanical data** 

|**Dim.**||**mm**||
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|4.85||5.15|
|A1|2.20||2.60|
|b|1.0||1.40|
|b1|2.0||2.40|
|b2|3.0||3.40|
|c|0.40||0.80|
|D|19.85||20.15|
|E|15.45||15.75|
|e|5.30|5.45|5.60|
|L|14.20||14.80|
|L1|3.70||4.30|
|L2||18.50||
|ØP|3.55||3.65|
|ØR|4.50||5.50|
|S|5.30|5.50|5.70|



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**Revision history** 

## **5 Revision history** 

**Table 10: Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|30-Mar-2005|4|Modified value on_Source drain diode_|
|23-Jul-2009|5|Modified values on_Switching times_|
|18-Jul-2016|6|Modified:_Table 2: "Absolute maximum ratings"_,_Table 3: "Thermal_<br>_data"_,_Table 4: "Avalanche characteristics"_,_Table 5: "On/off_<br>_states"_,_Table 6: "Dynamic"_,_Table 7: "Switching times"_and_Table_<br>_8: "Source-drain diode"_<br>Modified:_Section 5.1: "Electrical characteristics (curves)"_<br>Updated:_Section 7.1: "TO-247 package information"_|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

- © 2016 STMicroelectronics – All rights reserved 

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- [Supplier page](https://es.farnell.com/stmicroelectronics/stw45nm50/mosfet-n-ch-550v-45a-to-247/dp/1291995)
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