# Power MOSFET, N Channel, 800 V, 2.5 A, 2.1 ohm, TO-251, Through Hole

![Product image](https://novapart.co/image/farnell:2807312/)

**URL**: https://novapart.co/products/STU4N80K5/power-mosfet-n-channel-800-v-25-a-21-ohm-to-251
**SKU**: STU4N80K5
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.4910
**Stock**: 1000+
**Lead Time**: 2 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:2.5A; Drain Source Voltage Vds:800V; On Resistance Rds(on):2.1ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4V; Powe

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | MDmesh K5 |
| Qualification | - |
| Power Dissipation | 60W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-251 |
| Drain Source Voltage Vds | 800V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 2.5A |
| Drain Source On State Resistance | 2.1ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2807312/)

## **STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

N-channel 800 V, 2.1 Ω typ., 3 A MDmesh™ K5  Power MOSFETs in DPAK, TO-220FP, TO-220 and IPAK packages 

**Datasheet** - **production data** 

## **Features** 

**==> picture [172 x 137] intentionally omitted <==**

**----- Start of picture text -----**<br>
TAB<br>3<br>1<br>DPAK 3<br>2<br>1<br>TAB © TO-220FP<br>TAB<br>2 3 oeSS 1 2 3<br>1<br>IPAK<br>TO-220<br>**----- End of picture text -----**<br>


|**Features**|**Features**||||
|---|---|---|---|---|
|**Order code**|**VDS**|**RDS(on)max.**|**ID**|**PTOT**|
|STD4N80K5|800 V|2.5Ω|3 A|60 W|
|STF4N80K5||||20 W|
|STP4N80K5||||60 W|
|STU4N80K5|||||



- Industry’s lowest RDS(on) x area 

- Industry’s best figure of merit (FoM) 

- Ultra low gate charge 

- 100% avalanche tested 

**Figure 1.  Internal schematic diagram** 

- Zener-protected 

## **Applications** 

- Switching applications 

## **Description** 

**==> picture [33 x 5] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM01476v1<br>**----- End of picture text -----**<br>


These very high voltage N-channel Power MOSFETs are designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. 

**Table 1. Device summary** 

|**Order code**|**Marking**|**Packages**|**Packaging**|
|---|---|---|---|
|STD4N80K5|4N80K5|DPAK|Tape and reel|
|STF4N80K5||TO-220FP|Tube|
|STP4N80K5||TO-220||
|STU4N80K5||IPAK||



_www.st.com_ 

February 2015 

DocID025105 Rev 3 

1/23 

This is information on a product in full production. 

**Contents** 

**STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

|**Contents**|**Contents**|
|---|---|
|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3**|
|**2**|**Electrical characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4**|
||2.1<br>Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6|
|**3**|**Test circuits     . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9**|
|**4**|**Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10**|
||4.1<br>DPAK(TO-252), package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11|
||4.2<br>TO-220FP, package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14|
||4.3<br>TO-220, package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16|
||4.4<br>IPAK(TO-251), package information  . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18|
|**5**|**Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20**|
|**6**|**Revision history  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22**|



2/23 

DocID025105 Rev 3 

**STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2. Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Value**|**Value**|**Unit**|
|---|---|---|---|---|---|
|||**DPAK,**<br>**IPAK**|**TO-220FP**|**TO-220**||
|VDS|Drain-source voltage|800|||V|
|VGS|Gate- source voltage|±30|||V|
|ID|Drain current (continuous) at TC= 25 °C|3|3(1)|3|A|
|ID|Drain current (continuous) at TC= 100 °C|1.7|1.7(1)|1.7|A|
|IDM<br>(2)|Drain current (pulsed)|12|12(1)|12|A|
|PTOT|Total dissipation at TC= 25 °C|60|20|60|W|
|IAR|Avalanche current, repetitive or not-<br>repetitive (pulse width limited by TJmax)|1|||A|
|EAS|Single pulse avalanche energy<br>(starting TJ= 25 °C, ID= IAR, VDD= 50 V)|74.5|||mJ|
|dv/dt(3)|Peak diode recovery voltage slope|4.5|||V/ns|
|dv/dt(4)|MOSFET dv/dt ruggedness|50|||V/ns|
|VISO|Insulation withstand voltage (RMS) from all<br>three leads to external heat sink<br>(t = 1 s, TC= 25 °C)||2500||V|
|TJ|Operating junction temperature|-55 to 150|||°C|
|Tstg|Storage temperature||||°C|



1. Limited by maximum junction temperature 

2. Pulse width limited by safe operating area 

3. ISD < 3 A, di/dt < 100 A/µs, VDS(peak) ≤ V(BR)DSS 

4. VDS ≤ 640 V 

**Table 3. Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Value**|**Value**|**Unit**|
|---|---|---|---|---|---|
|||**DPAK,**<br>**IPAK**|**TO-220FP**|**TO-220**||
|Rthj-case|Thermal resistance junction-case max|2.08|6.25|2.08|°C/W|
|Rthj-amb|Thermal resistance junction-ambient max||62.5||°C/W|
|Rthj-pcb<br>(1)|Thermal resistance junction-pcb max|50|||°C/W|



1. When mounted on 1inch² FR-4 board, 2 oz Cu 

DocID025105 Rev 3 

3/23 

**STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

**Electrical characteristics** 

## **2 Electrical characteristics** 

(Tcase =25 °C unless otherwise specified) 

**Table 4. On /off states** 

|||**Table 4. On /off states**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|V(BR)DSS|Drain-source<br>breakdown voltage|ID= 1 mA, VGS= 0|800|||V|
|IDSS|Zero gate voltage<br>drain current (VGS= 0)|VDS= 800 V|||1|µA|
|||VDS= 800 V, TC=125 °C|||50|µA|
|IGSS|Gate-body leakage<br>current (VDS= 0)|VGS= ± 20 V|||±10|µA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 100 µA|3|4|5|V|
|RDS(on)|Static drain-source on-<br>resistance|VGS= 10 V, ID= 1.5 A||2.1|2.5|Ω|



**Table 5. Dynamic** 

|||**Table 5. Dynamic**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|Ciss|Input capacitance|VDS= 100 V, f = 1 MHz,<br>VGS= 0|-|175|-|pF|
|Coss|Output capacitance||-|18|-|pF|
|Crss|Reverse transfer<br>capacitance||-|0.5|-|pF|
|Co(tr)<br>(1)|Equivalent<br>capacitance time<br>related|VDS= 0 to 640 V, VGS= 0|-|26|-|pF|
|Co(er)<br>(2)|Equivalent<br>capacitance energy<br>related|VDS= 0 to 640 V, VGS= 0|-|11|-|pF|
|Rg|Gate input resistance|f=1 MHz, ID= 0|-|15|-|Ω|
|Qg|Total gate charge|VDD= 640 V, ID= 3 A,<br>VGS= 10 V<br>_(see Figure 19)_|-|10.5|-|nC|
|Qgs|Gate-source charge||-|2|-|nC|
|Qgd|Gate-drain charge||-|7.5|-|nC|



1. Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS 

2. Energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS 

4/23 

DocID025105 Rev 3 

**STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

**Electrical characteristics** 

**Table 6. Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delay time|VDD= 400 V, ID= 1.5 A,<br>RG= 4.7Ω,VGS= 10 V<br>_(see Figure 18)_|-|16.5|-|ns|
|tr|Rise time||-|15|-|ns|
|td(off)|Turn-off-delay time||-|36|-|ns|
|tf|Fall time||-|21|-|ns|



**Table 7. Source drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain current||-||3|A|
|ISDM<br>(1)|Source-drain current (pulsed)||||12|A|
|VSD<br>(2)|Forward on voltage|ISD= 3 A, VGS= 0|-||1.5|V|
|trr|Reverse recovery time|ISD= 3 A, di/dt = 100 A/µs<br>VDD= 60 V<br>_(see Figure 20)_|-<br>-<br>-|242||ns|
|Qrr|Reverse recovery charge|||1.42||µC|
|IRRM|Reverse recovery current|||12||A|
|trr|Reverse recovery time|ISD= 3 A, di/dt = 100 A/µs<br>VDD= 60 V TJ= 150 °C<br>_(see Figure 20)_|-<br>-<br>-|373||ns|
|Qrr|Reverse recovery charge|||1.98||µC|
|IRRM|Reverse recovery current|||10.5||A|



1. Pulse width limited by safe operating area 

2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% 

**Table 8. Gate-source Zener diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)GSO|Gate-source breakdown<br>voltage|IGS= ± 1 mA, ID=0|30|-||V|



The built-in back-to-back Zener diodes have been specifically designed to enhance the ESD capability of the device. The Zener voltage is appropriate for efficient and cost-effective intervention to protect the device integrity. These integrated Zener diodes thus eliminate the need for external components. 

DocID025105 Rev 3 

5/23 

**STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

**Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**Figure 2. Safe operating area for DPAK and Figure 3. Thermal impedance for DPAK and IPAK IPAK** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
ID AM15986v1<br>(A) Tj=150°C<br>Tc=25°C<br>Single pulse<br>10<br>10µs<br>1 100µs<br>1ms<br>10ms<br>0.1<br>0.01<br>0.1 1 10 100 VDS(V)<br>DS(on)<br>Operation in this area is<br>Limited by max R<br>**----- End of picture text -----**<br>


**==> picture [165 x 167] intentionally omitted <==**

**Figure 4. Safe operating area for TO-220FP** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
ID AM15987v1<br>(A) Tj=150°C<br>Tc=25°C<br>Single pulse<br>10<br>10µs<br>1<br>100µs<br>1ms<br>0.1 10ms<br>0.01<br>0.1 1 10 100 VDS(V)<br>DS(on)<br>Operation in this area is<br>Limited by max R<br>**----- End of picture text -----**<br>


**Figure 5. Thermal impedance for TO-220FP** 

**==> picture [173 x 167] intentionally omitted <==**

**Figure 6. Safe operating area for TO-220** 

**Figure 7. Thermal impedance for TO-220** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
ID AM15988v1<br>(A) Tj=150°C<br>Tc=25°C<br>Single pulse<br>10<br>10µs<br>100µs<br>1<br>1ms<br>10ms<br>0.1<br>0.01<br>0.1 1 10 100 VDS(V)<br>DS(on)<br>Operation in this area is<br>Limited by max R<br>**----- End of picture text -----**<br>


6/23 

DocID025105 Rev 3 

**STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

**Electrical characteristics** 

**Figure 8. Output characteristics** 

**Figure 9. Transfer characteristics** 

**==> picture [427 x 167] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM15989v1 AM15990v1<br>ID (A) ID (A)<br>VGS=10, 11 V<br>5 5 VDS=20V<br>9V<br>4 4<br>3 3<br>8V<br>2 2<br>7V<br>1 1<br>6V<br>0 0<br>0 4 8 12 16 VDS(V) 5 6 7 8 9 10 VGS(V)<br>**----- End of picture text -----**<br>


**Figure 10. Gate charge vs gate-source voltage** 

**Figure 11. Static drain-source on-resistance** 

**==> picture [193 x 167] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGS AM15991v1<br>VDS (V)<br>(V)<br>12 VDS VDD=640V 600<br>ID=3A<br>10 500<br>8 400<br>6 300<br>4 200<br>2 100<br>0 0<br>0 2 4 6 8 10 Qg(nC)<br>**----- End of picture text -----**<br>


**Figure 12. Capacitance variations** 

**Figure 13. Normalized gate threshold voltage vs temperature** 

**==> picture [201 x 167] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGS(th) AM15639v1<br>(norm) ID=100µA<br>VDS=VGS<br>1<br>0.8<br>0.6<br>0.4<br>-50 0 50 100 TJ(°C)<br>**----- End of picture text -----**<br>


DocID025105 Rev 3 

7/23 

**STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

**Electrical characteristics** 

**Figure 14. Normalized on-resistance vs temperature** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
RDS(on) AM15640v1<br>(norm) VGS=10V<br>ID=1.5 A<br>2.4<br>2<br>1.6<br>1.2<br>0.8<br>0.4<br>-50 0 50 100 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 16. Normalized VDS vs temperature** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDS AM15642v1<br>(norm)<br>1.1 ID = 1mA<br>1.06<br>1.02<br>0.98<br>0.94<br>0.9<br>-50 0 50 100 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 15. Source-drain diode forward characteristics** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
VSD AM15994v1<br>(V)<br>1 TJ=-50°C<br>0.9<br>TJ=25 ° C<br>0.8<br>0.7<br>TJ=150°C<br>0.6<br>0.5<br>0.5 1 1.5 2 2.5 ISD(A)<br>**----- End of picture text -----**<br>


**Figure 17. Maximum avalanche energy vs. starting TJ** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM15995v1<br>EAS (mJ)<br>60<br>40<br>20<br>0<br>0 40 80 120 TJ(°C)<br>**----- End of picture text -----**<br>


8/23 

DocID025105 Rev 3 

**STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

**Test circuits** 

## **3 Test circuits** 

**Figure 18. Switching times test circuit for resistive load** 

**Figure 19. Gate charge test circuit** 

**==> picture [462 x 162] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDD<br>12V 47kΩ<br>1kΩ<br>100nF<br>RL 2200 3.3<br>μF μF<br>VDD IG=CONST<br>VD Vi=20V=VGMAX 100Ω D.U.T.<br>VGS<br>2200<br>RG D.U.T. μF 2.7kΩ VG<br>PW<br>47kΩ<br>1kΩ<br>PW<br>AM01468v1 AM01469v1<br>**----- End of picture text -----**<br>


**Figure 20. Test circuit for inductive load Figure 21. Unclamped inductive load test circuit switching and diode recovery times** 

**==> picture [462 x 346] intentionally omitted <==**

**----- Start of picture text -----**<br>
L<br>A A A<br>D<br>FAST L=100μH VD<br>G D.U.T. DIODE 2200 3.3<br>S B 3.3 1000 μF μF VDD<br>25 Ω B B D μF μF VDD ID<br>G<br>RG S<br>Vi D.U.T.<br>Pw<br>AM01470v1 AM01471v1<br>Figure 22. Unclamped inductive waveform Figure 23. Switching time waveform<br>V(BR)DSS ton toff<br>VD tdon tr tdoff tf<br>90% 90%<br>IDM<br>10%<br>ID 0 10% VDS<br>VDD VDD 90%<br>VGS<br>AM01472v1 0 10% AM01473v1<br>**----- End of picture text -----**<br>


DocID025105 Rev 3 

9/23 

**STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

**Package information** 

## **4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _www.st.com_ . ECOPACK[®] is an ST trademark. 

10/23 

DocID025105 Rev 3 

**STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

**Package information** 

## **4.1 DPAK(TO-252), package information** 

**==> picture [190 x 11] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 24. DPAK (TO-252) type A outline<br>**----- End of picture text -----**<br>


**==> picture [405 x 557] intentionally omitted <==**

**----- Start of picture text -----**<br>
���������<br>**----- End of picture text -----**<br>


DocID025105 Rev 3 

11/23 

**STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

**Package information** 

## **Figure 25. DPAK (TO-252) mechanical data** 

||**Figure 25. DPAK(TO-252) mechanical data**|**Figure 25. DPAK(TO-252) mechanical data**|**Figure 25. DPAK(TO-252) mechanical data**|
|---|---|---|---|
|**Dim.**|**mm**|||
||**Min.**|**Typ.**|**Max.**|
|A|2.20||2.40|
|A1|0.90||1.10|
|A2|0.03||0.23|
|b|0.64||0.90|
|b4|5.20||5.40|
|c|0.45||0.60|
|c2|0.48||0.60|
|D|6.00||6.20|
|D1||5.10||
|E|6.40||6.60|
|E1||4.70||
|e||2.28||
|e1|4.40||4.60|
|H|9.35||10.10|
|L|1.00||1.50|
|L1||2.80||
|L2||0.80||
|L4|0.60||1.00|
|R||0.20||
|V2|0°||8°|



12/23 

DocID025105 Rev 3 

**STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

**Package information** 

## **Figure 26. DPAK (TO-252) footprint[(a)]** 

**==> picture [405 x 356] intentionally omitted <==**

**----- Start of picture text -----**<br>
�����������<br>**----- End of picture text -----**<br>


- a. All dimensions are in millimeters 

DocID025105 Rev 3 

13/23 

**STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

**Package information** 

## **4.2 TO-220FP, package information** 

**==> picture [136 x 11] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 27. TO-220FP outline<br>**----- End of picture text -----**<br>


**==> picture [405 x 576] intentionally omitted <==**

**----- Start of picture text -----**<br>
7012510_Rev_K_B<br>**----- End of picture text -----**<br>


14/23 

DocID025105 Rev 3 

**STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

**Package information** 

**Table 9. TO-220FP mechanical data** 

||**Table 9. TO-220FP mechanical data**|**Table 9. TO-220FP mechanical data**|**Table 9. TO-220FP mechanical data**|
|---|---|---|---|
|**Dim.**|**mm**|||
||**Min.**|**Typ.**|**Max.**|
|A|4.4||4.6|
|B|2.5||2.7|
|D|2.5||2.75|
|E|0.45||0.7|
|F|0.75||1|
|F1|1.15||1.70|
|F2|1.15||1.70|
|G|4.95||5.2|
|G1|2.4||2.7|
|H|10||10.4|
|L2||16||
|L3|28.6||30.6|
|L4|9.8||10.6|
|L5|2.9||3.6|
|L6|15.9||16.4|
|L7|9||9.3|
|Dia|3||3.2|



DocID025105 Rev 3 

15/23 

**STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

**Package information** 

## **4.3 TO-220, package information** 

## **Figure 28. TO-220 type A outline** 

16/23 

DocID025105 Rev 3 

**STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

**Package information** 

**Table 10. TO-220 type A mechanical data** 

||**Table 10. TO-220 type A mechanical data**|**Table 10. TO-220 type A mechanical data**|**Table 10. TO-220 type A mechanical data**|
|---|---|---|---|
|**Dim.**|**mm**|||
||**Min.**|**Typ.**|**Max.**|
|A|4.40||4.60|
|b|0.61||0.88|
|b1|1.14||1.70|
|c|0.48||0.70|
|D|15.25||15.75|
|D1||1.27||
|E|10||10.40|
|e|2.40||2.70|
|e1|4.95||5.15|
|F|1.23||1.32|
|H1|6.20||6.60|
|J1|2.40||2.72|
|L|13||14|
|L1|3.50||3.93|
|L20||16.40||
|L30||28.90||
|∅P|3.75||3.85|
|Q|2.65||2.95|



DocID025105 Rev 3 

17/23 

**STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

**Package information** 

## **4.4 IPAK(TO-251), package information** 

## **Figure 29. IPAK (TO-251) type A outline** 

**==> picture [405 x 456] intentionally omitted <==**

**----- Start of picture text -----**<br>
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**Package information** 

**Table 11. IPAK (TO-251) type A mechanical data** 

|**DIM**|**mm.**|**mm.**|**mm.**|
|---|---|---|---|
||**min.**|**typ.**|**max.**|
|A|2.20||2.40|
|A1|0.90||1.10|
|b|0.64||0.90|
|b2|||0.95|
|b4|5.20||5.40|
|B5||0.30||
|c|0.45||0.60|
|c2|0.48||0.60|
|D|6.00||6.20|
|E|6.40||6.60|
|e||2.28||
|e1|4.40||4.60|
|H||16.10||
|L|9.00||9.40|
|L1|0.80||1.20|
|L2||0.80|1.00|
|V1||10°||



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**STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

**Packaging mechanical data** 

## **5 Packaging mechanical data** 

**Table 12. DPAK (TO-252) tape and reel mechanical data** 

||**Tape**|**Tape**||**Reel**|**Reel**|
|---|---|---|---|---|---|
|**Dim.**|**mm**||**Dim.**|**mm**||
||**Min.**|**Max.**||**Min.**|**Max.**|
|A0|6.8|7|A||330|
|B0|10.4|10.6|B|1.5||
|B1||12.1|C|12.8|13.2|
|D|1.5|1.6|D|20.2||
|D1|1.5||G|16.4|18.4|
|E|1.65|1.85|N|50||
|F|7.4|7.6|T||22.4|
|K0|2.55|2.75||||
|P0|3.9|4.1||Base qty.|2500|
|P1|7.9|8.1||Bulk qty.|2500|
|P2|1.9|2.1||||
|R|40|||||
|T|0.25|0.35||||
|W|15.7|16.3||||



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**STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

**Packaging mechanical data** 

## **Figure 30. Tape for DPAK (TO-252)** 

**==> picture [399 x 316] intentionally omitted <==**

**----- Start of picture text -----**<br>
10 pitches cumulative<br>tolerance on tape +/- 0.2 mm<br>Top cover P0 D P2<br>T tape<br>E<br>1 co0 00 00 5 @ 00<br>F<br>K0 W<br>B1 B0<br>A E IR I R IBIE<br>For machine ref. only A0 P1 D1<br>including draft and<br>radii concentric around B0 —<br>User direction of feed<br>R<br>SCH<br>— Bending radius<br>User direction of feed<br>AM08852v1<br>**----- End of picture text -----**<br>


## **Figure 31. Reel for DPAK (TO-252)** 

**==> picture [377 x 249] intentionally omitted <==**

**----- Start of picture text -----**<br>
T<br>REEL DIMENSIONS<br>40mm min.<br>Access hole<br>At sl ot location<br>B<br>D<br>C<br>N<br>A<br>Full radius Tape slot  G measured at hub<br>in core for<br>tape start 25 mm min.<br>width<br>AM08851v2<br>**----- End of picture text -----**<br>


DocID025105 Rev 3 21/23 ~~oo~~ 

**STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

**Revision history** 

## **6 Revision history** 

**Table 13. Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|09-Aug-2013|1|First release|
|13-Dec-2013|2|– Added: IPAK package<br>– Added:_Table 11_and_Figure 29_<br>– Minor text changes|
|04-Feb-2015|3|– Updated title and description in cover page.<br>– Updated_Table 2.: Absolute maximum ratings_,_Table 5.: Dynamic_<br>and_Table 7.: Source drain diode_.<br>– Updated_4: Package information_and_5: Packaging mechanical_<br>_data_.<br>– Minor text changes.|



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DocID025105 Rev 3 

**STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5** 

## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

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Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2015 STMicroelectronics – All rights reserved 

DocID025105 Rev 3 

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## Links

- [View this product on Novapart](https://novapart.co/products/STU4N80K5/power-mosfet-n-channel-800-v-25-a-21-ohm-to-251)
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- [Supplier page](https://es.farnell.com/stmicroelectronics/stu4n80k5/mosfet-n-ch-800v-2-5a-to-251/dp/2807312)
---

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