# Thyristor Diode Module, 1.2 kV, 38 A, 1.3 V Vgt, 0.05 A Igt , 525 A Itsm
**URL**: https://novapart.co/products/STTD6050H-12M2Y/thyristor-diode-module-12-kv-38-a-13-v-vgt-005-igt
**SKU**: STTD6050H-12M2Y
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || Thyristors || Thyristors - SCR Modules
**Price**: €13.9100
**Stock**: 10+
**Lead Time**: 373 days (indicative)
## Specifications
| Parameter | Value |
|---|---|
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 9Pins |
| Product Range | - |
| Scr Module Type | Bridge Rectifier, Single Phase - SCR / Diode |
| Thyristor Mounting | Surface Mount |
| On State Rms Current | 60A |
| Thyristor Case Style | ACEPACK SMIT |
| Average Forward Current | 38A |
| Gate Trigger Current Max | 50mA |
| Gate Trigger Voltage Max | 1.3V |
| Operating Temperature Max | 150°C |
| Repetitive Peak Reverse Voltage | 1.2kV |
| Peak Repetitive Off State Voltage | 1.2kV |
## Datasheet
📄 [Download PDF](https://novapart.co/datasheet/farnell:3775638/)
**STTD6050H-12M2Y**
Datasheet
## 60 A 1200 V half-controlled bridge rectifier in ACEPACK SMIT module
## **Features**
- AEC-Q101 qualified
- • 1200 V symmetrical blocking voltage • High junction temperature: 150 °C • High noise immunity, static dV/dt: 1000 V/μs • Embed two TN6050HP-12 and two STBR6012 dies • Module qualified according to AQG324 recommendation • SMD with isolated top cooled tab • Terminal pins opposite to cooling side – Fully automatic PCB mounting to heat sink
- • Moisture Sensitivity Level : Level 3 – IPC/JEDEC J-STD-033
- • 4000 V insulated tab-to-lead package – UL recognized, File E81734
- • Large creepage distance to meet IEC 60664-1 – 250 VAC, material group 2, pollution degree 3 – 600 VAC, material group 2, pollution degree 2
- • Smaller footprint than four TO-247 • ECOPACK2 compliant component
|**Product status**|**Product status**|
|---|---|
|Internal||
|||
|**Product summary**||
|**IT(RMS)**,**IF(RMS)**|60 A|
|**IOUT(AV)**|75 A|
|**VDRM/VRRM**|1200 V|
|**VDSM/VRSM**|1400 V|
|**IGT**|50 mA|
|**Tj max.**|150 °C|
## **Applications**
- Single-phase controlled bridge rectifier
- • On-board and stationary chargers • AC DC converter for motor drive, UPS and SMPS • AC input converter current up to 85 ARMS
- Output full wave DC current up to 75 AAV
## **Description**
The STTD6050H-12M2Y is a top cooled surface mount module that integrates a single-phase half-controlled bridge rectifier. It is rated at 1200 V and delivers an output full wave DC current up to 75 AAV. Each single embedded device has a rated current of 60 ARMS and a symmetric blocking voltage of 1200 V.
With its top cooling pad opposite to the printed circuit board this device allows the PCB-module-heat sink stack to be automatically assembled.
This provides a low profile and compact converter in the field of on-board charger, charging station, motor drive, UPS and AC-DC power supplies.
Based on the ST high temperature automotive planar technology, it offers higher specified noise immunity of 1000 V/µs up to the 150 °C junction temperature Tj, and an over-voltage robustness VDSM up to 1400 V.
**DS13702** - **Rev 2** - **April 2021** For further information contact your local STMicroelectronics sales office.
www.st.com
**STTD6050H-12M2Y Characteristics**
## **1 Characteristics**
**Table 1. Diode and SCR absolute maximum ratings (limiting values)**
|**Symbol**|**Parameter**|**Parameter**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|---|---|
|IT(RMS), IF(RMS)|RMS on-state current, sine half wave||TC_SCR= 106 °C
TC_DIODE= 110 °C
TC(AV)= 106 °C|60|A|
|IT(AV), IF(AV)|Average on-state current, sine half wave|||38|A|
|IOUT(AV)|Average output current, sine full wave|||75|A|
|ITSM, IFSM|Non repetitive surge peak on-state current,
VR= 0 V, IG= 100 mA|tp= 8.3 ms|Tjinitial = 25 °C|525|A|
|||tp= 10 ms||500||
|I2t|I2t value for fusing|tp= 10 ms|Tj= 25 °C|1250|A2s|
|dl/dt|Critical rate of rise of on-state SCR current
IG= 2 x IGT, tr ≤ 100 ns|f = 100 Hz|Tj= 150 °C|200|A/µs|
|VDRM/ VRRM|Repetitive off-state voltage(1)||Tj= -40 °C to 150 °C|1200|V|
|VDSM/ VRSM|Non repetitive surge peak off-state
voltage(1)|tp= 10 ms|Tj= 25 °C|1400|V|
|VGM|Peak forward SCR gate voltage|tp= 20 µs|Tj= 150 °C|10|V|
|IGM|Peak forward SCR gate current|tp= 20 µs|Tj= 150 °C|8|A|
|VRGM|Peak SCR gate voltage||Tj= 25 °C|5|V|
|PG(AV)|Average SCR gate power dissipation||Tj= 150 °C|1|W|
|Tstg|Storage junction temperature range|||-40 to +150|°C|
|Tj|Operating junction temperature range|||-40 to +150|°C|
|VINS|RMS tab-to-leads insulation voltage, 1 minute, f = 50 - 60 Hz|||4|kV|
_1. VDRM and VDSM apply to SCR only._
**Table 2. SCR electrical characteristics, per single SCR**
|**Symbol**|**Test Conditions(1)**|**Test Conditions(1)**||**Value**|**Unit**|
|---|---|---|---|---|---|
|**SCR triggering characteristics**||||||
|IGT|VD= 12 V, RL= 33 Ω|Tj= 25 °C|Min.|10|mA|
||||Max.|50||
|VGT|VD= 12 V, RL= 33 Ω|Tj= 25 °C|Max.|1.3|V|
|VGD|VD= 2/3 VDRM, RL= 3.3 kΩ|Tj= 150 °C|Min.|0.2|V|
|IH|IT= 500 mA, gate open|Tj= 25 °C|Max.|100|mA|
|IL|IG= 1.2 x IGT|Tj= 25 °C|Max.|125|mA|
|**SCR dynamic characteristics**||||||
|tGT|IT= 60 A , VD= 800 V, IG= 100 mA,
dIG/dt = 0.2 A/µs|Tj= 25 °C|Typ.|1|µs|
|tQ|IT= 38 A, VD= 800 V, dIT/dt = 10 A/µs,
VR= 75 V, dVD/dt = 20 V/µs, tp= 100 µs|Tj= 150 °C|Typ.|150|µs|
|dV/dt|VD= 800 V, gate open|Tj= 150 °C|Min.|1000|V/µs|
**DS13702** - **Rev 2**
**page 2/18**
**STTD6050H-12M2Y Characteristics**
|**Symbol**|**Test Conditions(1)**|**Test Conditions(1)**|**Test Conditions(1)**|**Value**|**Unit**|
|---|---|---|---|---|---|
|**SCR static characteristics**||||||
|VTM|ITM= 60 A, tP= 380 µs|Tj= 25 °C|Max.|1.3|V|
|||Tj= 150 °C|Max.|1.3|V|
|VTOT|SCR on-state threshold voltage|Tj= 150 °C|Max.|0.8|V|
|RDT|SCR on-state dynamic resistance|Tj= 150 °C|Max.|7.45|mΩ|
|IDRMT/IRRMT|VD= VDRM, VR= VRRM|Tj= 25 °C|Max.|5|µA|
|||Tj= 150 °C|Max.|7.5|mA|
|IDSMT/IRSMT|VD= VDSM, VR= VRSM|Tj= 25 °C|Max.|10|µA|
|**SCR losses evaluation**||||||
|PLT|VTOTx IT(AV)+ RDTx IT(RMS)2||||W|
_1. Refer to application note AN4608 for parameter definition_
**Table 3. Diode Electrical Characteristics, per single diode**
|**Symbol**|**Test Conditions**|**Test Conditions**|**Test Conditions**|**Value**|**Unit**|
|---|---|---|---|---|---|
|**Diode static characteristics**||||||
|VF|IF= 60 A, tP= 380 µs, duty cycle δ < 2%|Tj= 25 °C|Max.|1.3|V|
|||Tj= 150 °C|Max.|1.2|V|
|VTOD|On-state rectifier threshold|Tj= 150 °C|Max.|0.96|V|
|RDD|On-state rectifier dynamic resistance|Tj= 150 °C|Max.|4|mΩ|
|IRRMD|VR= VRRM, tp= 5 ms, duty cycle δ < 2%|Tj= 25 °C|Max.|5|µA|
|||Tj= 150 °C|Max.|250||
|IRSMD|VR= VRSM|Tj= 25 °C|Max.|25|µA|
|**Diode losses evaluation**||||||
|PLD|VTODx IT(AV)+ RDDx IT(RMS)2||||W|
**Table 4. Thermal characteristics**
|**Symbol**|**Parameter**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|---|
|Rth(j-c) T|Junction to case (DC), per SCR(1)|Max.|0.75|°C/W|
|Rth(j-c) D|Junction to case (DC), per diode(1)|Max.|0.75|°C/W|
_1. The case temperature is measured right underneath the device die on cooling pad_
For more information, please refer to the following application note related to the thermal management:
- AN5384: ACEPACK SMIT module package guidelines for mounting and thermal management
**DS13702** - **Rev 2**
**page 3/18**
**STTD6050H-12M2Y Characteristics (curves)**
## **1.1 Characteristics (curves)**
**==> picture [513 x 192] intentionally omitted <==**
**----- Start of picture text -----**
Figure 1. Diode forward on-state characteristics Figure 2. SCR on-state characteristics (maximum values),
(maximum value), Tj = 25 °C and 150 °C Tj = 25 °C and 150 °C
IF(A) 1000 ITM(A)
1.0E+03
Tj max:
V
T0 [ = 0.8 V]
1.0E+02 RD = 7.45 mΩ Tj = 150 °C
100
1.0E+01
Tj = 150 °C
1.0E+00
10
1.0E-01 T j = 25 °C
1.0E-02 VF(V) 1 Tj = 25 °C VTM(V)
0.0 0.5 1.0 1.5 2.0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5
**----- End of picture text -----**
**Figure 3. Diode maximum average power dissipation versus average half-wave on-state current, a = 30 ° to 180 °**
**==> picture [218 x 143] intentionally omitted <==**
**----- Start of picture text -----**
P(W)
55
α = 180 °
50
α = 120 °
45 α = 90 °
40
α = 60 °
35
30 α = 30 °
25
20
15
360 °
10
5 α IT(AV)(A)
0
0 10 20 30 40
**----- End of picture text -----**
**Figure 4. SCR maximum average power dissipation versus average half-wave on-state current, a = 30 ° to 180 °**
**==> picture [224 x 144] intentionally omitted <==**
**----- Start of picture text -----**
P(W)
65
α = 180 °
60
55 α = 120 °
50 α = 90 °
45 α = 60 °
40 α = 30 °
35
30
25
20
15 360 °
10
5 α IT(AV)(A)
0
0 10 20 30 40 50
**----- End of picture text -----**
**==> picture [513 x 192] intentionally omitted <==**
**----- Start of picture text -----**
Figure 5. Diode average on-state current versus case Figure 6. SCR average on-state current versus case
temperature temperature
50IT(AV)(A) 50 IT(AV)(A)
360 °
40 α = 180 ° α 40 α = 180 °
α = 120 ° α = 120 °
30 α = 90 ° 30 α = 90 °
α = 60 ° α = 60 °
20 20
α = 30 ° α = 30 °
10 10
0 Tc(°C) 0 Tc(°C)
0 25 50 75 100 125 150 0 25 50 75 100 125 150
**----- End of picture text -----**
**DS13702** - **Rev 2**
**page 4/18**
**STTD6050H-12M2Y Characteristics (curves)**
**Figure 7. Diode relative variation of thermal impedance Figure 8. SCR relative variation of thermal impedance junction to case versus pulse duration, 1 ms to 1 s junction to case versus pulse duration, 1 ms to 1 s**
**==> picture [222 x 145] intentionally omitted <==**
**----- Start of picture text -----**
Zth(j-c) / Rth(j-c)
1.0
Single pulse
tP(s)
0.1
1.E-03 1.E-02 1.E-01 1.E+00
**----- End of picture text -----**
**==> picture [227 x 144] intentionally omitted <==**
**----- Start of picture text -----**
K = [Zth/ Rth]
1.0E+00
Zth(j-c)
tp(s)
1.0E-01
1.0E-03 1.0E-02 1.0E-01 1.0E+00
**----- End of picture text -----**
**Figure 9. SCR relative variation of gate trigger current and gate trigger voltage versus junction temperature (typical values)**
**==> picture [224 x 142] intentionally omitted <==**
**----- Start of picture text -----**
IGT, VGT [ Tj ] / IGT, VGT [ Tj = 25 °C]
2.0
1.5 IGT
1.0
VGT
0.5
T (°C)
j
0.0
-50 -25 0 25 50 75 100 125 150
**----- End of picture text -----**
**Figure 10. SCR relative variation of holding and latching current versus junction temperature (typical values)**
**==> picture [225 x 139] intentionally omitted <==**
**----- Start of picture text -----**
IH, IL [ Tj ] / IH, IL [ Tj = 25 °C]
2.0
1.6 IH
1.2
IL
0.8
0.4
T (°C)
j
0.0
-50 -25 0 25 50 75 100 125 150
**----- End of picture text -----**
**Figure 11. Diode non repetitive surge peak on-state current for a sinusoidal pulse (tp < 10 ms) , Vr = 0 V**
**==> picture [225 x 142] intentionally omitted <==**
**----- Start of picture text -----**
I FSM (t p ) / I FSM (10ms)
4.0
3.5
3.0
2.5
2.0
1.5
tP(ms)
1.0
0.1 1.0 10.0
**----- End of picture text -----**
**Figure 12. SCR non repetitive surge peak on-state current for a sinusoidal pulse (tp < 10 ms) , Vr = 0 V**
**==> picture [228 x 156] intentionally omitted <==**
**----- Start of picture text -----**
ITSM(A)
10000
Tj initial = 25 °C
1000
dl/dt limitation: 200 A/µs ITSM
100
tp(ms)
10
1.E-02 1.E-01 1.E+00 1.E+01
**----- End of picture text -----**
**DS13702** - **Rev 2**
**page 5/18**
**STTD6050H-12M2Y Characteristics (curves)**
**==> picture [513 x 205] intentionally omitted <==**
**----- Start of picture text -----**
Figure 13. SCR and diode surge peak forward Figure 14. SCR and Diode junction capacitance versus
current versus number of half cycles, Vr = 0 V and reverse voltage applied, gate open, in discrete package
Tj initial = 25 °C (typical values)
ITSM(A) 1000C(pF)
550
500 F = 1 MHz
Vosc= 30 mV RMS
450 Non repetitive Tj = 25 °C tp=10ms Tj = 25 °C
400
One cycle
350 SCR
300 100
250
200
Repetitive Tc = 107 °C Diode
150
100
50 Number of cycles VR(V)
0 10
1 10 100 1000 10 100 1000
**----- End of picture text -----**
**Figure 15. SCR relative variation of the static dV/dt immunity versus junction temperature (typical values)**
**==> picture [224 x 141] intentionally omitted <==**
**----- Start of picture text -----**
6 dV/dt [T j] / dV/dt [T j=150 °C]
VD=VR= 2/3 VDRM
5
4
3
2
1
Tj(°C)
0
25 50 75 100 125 150
**----- End of picture text -----**
**DS13702** - **Rev 2**
**page 6/18**
**STTD6050H-12M2Y Application**
## **2 Application**
## **2.1 Solid state Inrush current limitation topologies using STTD6050H-12M2Y**
As illustrated here below, bypass and mixed bridge rectifiers are two topologies dedicated to the AC line voltage rectification which include the solid-state inrush current limitation feature.
**==> picture [458 x 11] intentionally omitted <==**
**----- Start of picture text -----**
Figure 16. Bypass function ensured by SCR Figure 17. Soft start / mixed control bridge rectifier
**----- End of picture text -----**
In the bypass topology, at system start-up both T1 and T2 SCRs are OFF. The output bulk capacitor is then charged through the D3, D4, D2, D1 diodes and the current is limited by the R_limit resistor placed in the current path.
At steady state, R_limit power losses are cut by switching ON alternatively the T1 and T2 SCRs according to line polarity which are then bypassing R_limit.
**Figure 18. Bypass topology waveform working principle**
**DS13702** - **Rev 2**
**page 7/18**
**STTD6050H-12M2Y Solid state Inrush current limitation topologies using STTD6050H-12M2Y**
In the mixed bridge topology, SCRs are controlled in phase angle to smoothly increase the PFC output capacitor voltage up to peak AC line voltage. The pre-charging peak current value is controlled by a microcontroller which smartly synchronizes the SCRs gate driving signal angle step (referred as Δt in the figure here below). Limiting resistor is no more needed.
**Figure 19. Mixed bridge phase angle principle**
For more information, refer to the application note:
- AN4606: Inrush-current limiter circuits (ICL) with Triacs and Thyristors (SCR) and controlled bridge design tips.
Those two robust solid-state topologies allow the applications to easily comply to the following standards:
1. IEC61000-3-3 (voltage fluctuations and flicker in public low-voltage supply systems, for equipment with rated current ≤ 16 A). the high current powered from the grid may lead to voltage fluctuations and drops due to the line impedance. Those mains voltage disturbances have an impact on any other equipment connected to the same circuit and cause undesired brightness variation of lamps or displays (commonly called flickering phenomenon).
2. IEC61000-4-11 (voltage dips, short interruptions, and voltage variations immunity tests) As any appliance connected to the mains can be subject to line voltage dips or interruptions, a high input current may occur when the line voltage suddenly comes back to its nominal value. This high current may damage the front-end circuit components and can trigger an AC fuse for example.
**DS13702** - **Rev 2**
**page 8/18**
**STTD6050H-12M2Y**
**Dissipated power and junction temperature calculation at steady state**
## **2.2 Dissipated power and junction temperature calculation at steady state**
In below example, STTD6050H-12M2Y is placed upstream from PFC stage. IT and IF define respectively SCR and diode current value. Therefore, the current taken from the line and flowing through the mixed bridge is a sinus waveform.
**Figure 20. Soft start / mixed control bridge rectifier Figure 21. SCR / diode current waveform (sinusoidal half wave)**
## **2.2.1 Dissipated power into SCRs and diodes**
Dissipated power into SCRs and diodes is defined by the following equation:
_Note:_
**==> picture [355 x 133] intentionally omitted <==**
_VT0X and RDX are given in Eq. (1) and Eq. (4) where X = T for the SCR and F for the diode._
Using equations (1), (2) and (3), dissipated power can directly be calculated from AC line RMS current value IL(RMS) for a single SCR or diode in the mixed bridge:
**DS13702** - **Rev 2**
**page 9/18**
**STTD6050H-12M2Y**
**Dissipated power and junction temperature calculation at steady state**
## **2.2.2 Junction temperature calculation**
**==> picture [168 x 10] intentionally omitted <==**
**----- Start of picture text -----**
Figure 22. Die assembly representation
**----- End of picture text -----**
When Tc value is known, silicon junction temperature can be calculated as follows:
Tj = TC + PD × RTH ( j −c
Otherwise, starting from ambient temperature measurement, junction temperature can be calculated as follows:
> Tj = TA + PD × RTH () j −a
_Note:_
_Rth(j-c) and Rth(j-a) values are given in the datasheet._ with:
> RTH () j −a = RTH ( j −c ) + RTH ( c −ℎ ) + RTH ( ℎ−a
and where RTH(c-h) is the thermal interface resistance (grease or foil) and RTH(h-a) is the heatsink thermal resistance.
For more information about the thermal management and power dissipation calculation, refer to the application note:
- AN533: SCRs, TRIACs, and AC switches, thermal management precautions for handling and mounting
- AN604 : Calculation of conduction losses in a power rectifier
- AN4021 : Calculation of reverse losses in a power diode
**DS13702** - **Rev 2**
**page 10/18**
**STTD6050H-12M2Y Package information**
**3 Package information**
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
## **3.1 ACEPACK SMIT package information**
- Lead-free package leads finishing
- Halogen-free molding compound resin meets UL94 standard level V0
## **Figure 23. ACEPACK SMIT package outline**
**==> picture [80 x 86] intentionally omitted <==**
**==> picture [103 x 36] intentionally omitted <==**
**==> picture [117 x 89] intentionally omitted <==**
DM00447519_Rev.5
**DS13702** - **Rev 2**
**page 11/18**
**STTD6050H-12M2Y ACEPACK SMIT package information**
**Table 5. ACEPACK SMIT package mechanical data**
|**Di**|**mm**|**mm**|**mm**|**Inches (for reference only)**|**Inches (for reference only)**|**Inches (for reference only)**|
|---|---|---|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|**Min.**|**Typ.**|**Max.**|
|A|19.50|20.00|20.50|0.7677|0.7874|0.8071|
|B|21.50|22.00|22.50|0.8465|0.8661|0.8858|
|C|22.80|23.00|23.20|0.8976|0.9055|0.9134|
|D|24.80|25.00|25.20|0.9764|0.9843|0.9921|
|E|32.20|32.70|33.20|1.2677|1.2874|1.3071|
|b||9.00|||0.3543||
|b1||4.00|||0.1575||
|b2||6.75|||0.2657||
|b3||9.50|||0.3740||
|c|0.95|1.00|1.10|0.0374|0.0394|0.0433|
|c1|1.95|2.00|2.10|0.0768|0.0787|0.0827|
|d|0.00||0.15|0.0000|0.0000|0.0059|
|d1|0.45|0.55|0.65|0.0177|0.0217|0.0256|
|e|1.30|1.50|1.70|0.0512|0.0591|0.0669|
|e1|4.65|4.85|5.05|0.1831|0.1909|0.1988|
|L|3.95|4.00|4.05|0.1555|0.1575|0.1594|
|L1|5.40|5.50|5.60|0.2126|0.2165|0.2205|
|m|1.30|1.50|1.80|0.0512|0.0591|0.0709|
|m1|1.30|1.50|1.80|0.0512|0.0591|0.0709|
|V|0°|2°|4°|0°|2°|4°|
|aaa|0.01||0.05||0.0004|0.0020|
|bbb|0.00||0.10||0.0000|0.0039|
**Figure 24. ACEPACK SMIT recommended footprint (dimensions are in mm)**
**==> picture [286 x 194] intentionally omitted <==**
**----- Start of picture text -----**
4.00 (x9)
30.10
DM00447519_FP_Rev.5
2.75 (x4)
9.00 (x2)
4.00 (x2)
2.40 (x3) 1.40 (x6)
**----- End of picture text -----**
_Note: Recommended pressing force on package to the heatsink: 50 N as described in application note AN5384._
**DS13702** - **Rev 2**
**page 12/18**
**STTD6050H-12M2Y ACEPACK SMIT package insulation information**
## **3.2 ACEPACK SMIT package insulation information**
**Figure 25. ACEPACK SMIT package insulation information**
**Table 6. ACEPACK SMIT package insulation characteristics**
|**Symbol**
~~a ~~|**Parameter**
~~ee~~|**Parameter**
~~ee~~|**Parameter**
~~ee~~|**Value**
~~ee~~
ee|**Unit**
~~ee~~|
|---|---|---|---|---|---|
|L2|Pin-to-pin creepage distance|Terminal to terminal: 3 to 4, 7 to 8, 8 to 9|Min.|6.6
ee|mm|
|L3|Pin-to-backside creepage distance||Min.|4|mm|
|IINS|RMS tab-to-pin lead insulation current|Duration = 1 s., VINS= 4.8 kV|Max.|1|mA|
_Note: Recommended pressing force on package to the heatsink: 50 N as described in application note AN5384._
**DS13702** - **Rev 2**
**page 13/18**
**STTD6050H-12M2Y ACEPACK SMIT terminal description**
## **3.3 ACEPACK SMIT terminal description**
**Table 7. ACEPACK SMIT STTD6050H-12M2Y module pinout description**
|**Pin #**|**Name**|**Description**|
|---|---|---|
|1|NC|Not connected|
|2|G1|Gate SCR1|
|3|G2|Gate SCR2|
|4|D-|Output minus|
|5|D-|Output minus|
|6|D-|Output minus|
|7|L2|AC line 2|
|8|L1|AC line 1|
|9|D+|Output plus|
**Figure 26. ACEPACK SMIT STTD6050H-12M2Y module pinout**
**DS13702** - **Rev 2**
**page 14/18**
**STTD6050H-12M2Y ACEPACK SMIT packing information**
## **3.4 ACEPACK SMIT packing information**
**Figure 27. ACEPACK SMIT carrier tape outline, bottom view**
**Table 8. ACEPACK SMIT carrier tape dimensions**
|**Carrier tape typical dimension (mm)**|**Carrier tape typical dimension (mm)**|**Carrier tape typical dimension (mm)**|**Carrier tape typical dimension (mm)**|**Carrier tape typical dimension (mm)**|**Carrier tape typical dimension (mm)**|**Carrier tape typical dimension (mm)**|**Carrier tape typical dimension (mm)**|**Carrier tape typical dimension (mm)**|**Carrier tape typical dimension (mm)**|**Carrier tape typical dimension (mm)**|**Carrier tape typical dimension (mm)**|**Carrier tape typical dimension (mm)**|**Carrier tape typical dimension (mm)**|**Carrier tape typical dimension (mm)**|
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|A0|B0|C|D0|D1|E1|F|G|K0|K1|P0|P1|P2|T|W|
|26.00|33.30|0.40|2.00|1.50|1.75|26.20|24.10|7.10|5.80|4.00|36.00|2.00|0.35|56.00|
**Figure 28. ACEPACK SMIT reel outline**
**Table 9. ACEPACK SMIT reel dimensions**
|**Base qty.**|**Reel dimension (mm)**|**Reel dimension (mm)**|**Reel dimension (mm)**|**Reel dimension (mm)**|**Reel dimension (mm)**|**Reel dimension (mm)**|**Reel dimension (mm)**|**Reel dimension (mm)**|
|---|---|---|---|---|---|---|---|---|
||**A**|**B (max.)**|**C**|**D (min.)**|**E (max.)**|**F (min.)**|**G**|**T1 (max.)**|
|200|16.4 ±0.3|22.4|13.2 ±0.2|20.2 ±0.25|330|20.2|2.0 ±0.5|0.1|
**DS13702** - **Rev 2**
**page 15/18**
**STTD6050H-12M2Y Ordering information**
## **4**
## **Ordering information**
**Figure 29. Ordering information scheme**
**==> picture [426 x 63] intentionally omitted <==**
**----- Start of picture text -----**
ST T D 60 50 H - 12 M2 Y
Devices Type
T = Thyristor SCR, ; D = Diode
**----- End of picture text -----**
## **RMS SCR / Diode current**
60 = 60 A
## **Gate triggering Current**
50 = 50 mA
## **High Temperature**
H = 150°C rated
## **Blocking Voltage**
12 = 1200 V
## **Package**
M2 = ACEPACK SMIT module with two embedded legs
## **Quality grade**
Comply with automotive AQG324
**Table 10. Ordering information**
|**Order code**|**Marking**|**Package**|**Weight**|**Base qty.**|**Delivery mode**|
|---|---|---|---|---|---|
|STTD6050H-12M2Y|STTD6050H12M2Y|ACEPACK SMIT|8.1 g|200|Tape and reel|
**DS13702** - **Rev 2**
**page 16/18**
**STTD6050H-12M2Y**
## **Revision history**
**Table 11. Document revision history**
|**Date**|**Version**|**Changes**|
|---|---|---|
|14-Apr-2021|1|Initial release.|
|22-Apr-2021|2|Confidentiality level changed from ST Resctricted to public.|
**DS13702** - **Rev 2**
**page 17/18**
**STTD6050H-12M2Y**
## **IMPORTANT NOTICE – PLEASE READ CAREFULLY**
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2021 STMicroelectronics – All rights reserved
**DS13702** - **Rev 2**
**page 18/18**
## Links
- [View this product on Novapart](https://novapart.co/products/STTD6050H-12M2Y/thyristor-diode-module-12-kv-38-a-13-v-vgt-005-igt)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/stmicroelectronics/sttd6050h-12m2y/thyristor-diode-module-1-2kv-38a/dp/3775638)
---
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