# Dual MOSFET, N Channel, 30 V, 30 V, 10 A, 10 A, 0.019 ohm ![Product image](https://novapart.co/image/farnell:3367091/) **URL**: https://novapart.co/products/STS8DN3LLH5/dual-mosfet-n-channel-30-v-10-a-0019-ohm **SKU**: STS8DN3LLH5 **Manufacturer**: STMICROELECTRONICS **Category**: Semiconductors - Discretes || FETs || Dual MOSFETs **Price**: €0.4570 **Stock**: 1000+ **Lead Time**: 127 days (indicative) ## Specifications | Parameter | Value | |---|---| | Msl | MSL 1 - Unlimited | | Svhc | No SVHC (25-Jun-2025) | | No. Of Pins | 8Pins | | Channel Type | N Channel | | Product Range | STripFET V Series | | Qualification | - | | Transistor Case Style | SOIC | | Operating Temperature Max | 150°C | | Power Dissipation N Channel | 2.7W | | Power Dissipation P Channel | 2.7W | | Drain Source Voltage Vds N Channel | 30V | | Drain Source Voltage Vds P Channel | 30V | | Continuous Drain Current Id N Channel | 10A | | Continuous Drain Current Id P Channel | 10A | | Drain Source On State Resistance N Channel | 0.019ohm | | Drain Source On State Resistance P Channel | - | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:3367091/) **==> picture [61 x 39] intentionally omitted <==** ## **STS8DN3LLH5** Dual N-channel 30 V, 0.0155 Ω , 10 A, SO-8 STripFET™ V Power MOSFET ## **Features** |**Type**|**VDSS**|**RDS(on)**
**max**|**ID**| |---|---|---|---| |STS8DN3LLH5|30 V|< 0.019Ω|10 A(1)| 1. The value is rated according Rthj-pcb - RDS(on) * Qg industry benchmark - Extremely low on-resistance RDS(on) **==> picture [58 x 49] intentionally omitted <==** **==> picture [25 x 8] intentionally omitted <==** **----- Start of picture text -----**
SO-8
**----- End of picture text -----**
- Very low switching gate charge - High avalanche ruggedness - Low gate drive power losses ## **Application** - Switching applications ## **Description** This STripFET™V Power MOSFET technology is among the latest improvements, which have been especially tailored to achieve very low on-state resistance providing also one of the best-in-class FOM. ## **Figure 1. Internal schematic diagram** **==> picture [154 x 148] intentionally omitted <==** **Table 1. Device summary** |**Order code**|**Marking**|**Package**|**Packaging**| |---|---|---|---| |STS8DN3LLH5|8DN3LL|SO-8|Tape and reel| 1/12 January 2010 Doc ID 16967 Rev 1 _www.st.com_ **Contents** **STS8DN3LLH5** |**Contents**|**Contents**| |---|---| |**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3**| |**2**|**Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4**| ||2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6| |**3**|**Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8**| |**4**|**Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9**| |**5**|**Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11**| 2/12 Doc ID 16967 Rev 1 **STS8DN3LLH5** **Electrical ratings** ## **1 Electrical ratings** ## **Table 2. Absolute maximum ratings** |**Table 2.**|**Absolute maximum ratings**||| |---|---|---|---| |**Symbol**|**Parameter**|**Value**|**Unit**| |VDS|Drain-source voltage (VGS= 0)|30|V| |VGS|Gate-source voltage|± 22|V| |ID
(1)|Drain current (continuous) at TC= 25 °C|10|A| |ID
(1)|Drain current (continuous) at TC=100 °C|9|A| |IDM
(2)|Drain current (pulsed)|40|A| |PTOT
(2)|Total dissipation at TC= 25 °C|2.7|W| ||Derating factor|0.02|W/°C| |TJ
Tstg|Operating junction temperature
Storage temperature|-55 to 150|°C| 1. The value is rated according Rthj-pcb 2. Pulse width limited by safe operating area |**Table 3.**
**Thermal resistance**|**Table 3.**
**Thermal resistance**|**Table 3.**
**Thermal resistance**|**Table 3.**
**Thermal resistance**| |---|---|---|---| |**Symbol**|**Parameter**|**Value**|**Unit**| |Rthj-pcb
(1)|Thermal resistance junction-ambient|47|°C/W| 1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10sec 3/12 Doc ID 16967 Rev 1 **STS8DN3LLH5** **Electrical characteristics** ## **2 Electrical characteristics** (TCASE=25°C unless otherwise specified) ## **Table 4. On/off states** |**Table 4.**|**On/off states**|||||| |---|---|---|---|---|---|---| |**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**| |V(BR)DSS|Drain-source breakdown
voltage|ID= 250 µA, VGS= 0|30|||V| |IDSS|Zero gate voltage drain
current (VGS= 0)|VDS= max rating,
VDS=max rating @125 °C|||1
10|µA
µA| |IGSS|Gate body leakage current
(VDS= 0)|VGS= ±22 V|||±100|nA| |VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|1|||V| |RDS(on)|Static drain-source on
resistance|VGS= 10 V, ID= 5 A
VGS= 4.5 V, ID= 5 A||0.0155
0.020|0.019
0.022|Ω
Ω| ## **Table 5. Dynamic** |**Table 5.**|**Dynamic**|||||| |---|---|---|---|---|---|---| |**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**| |Ciss
Coss
Crss|Input capacitance
Output capacitance
Reverse transfer
capacitance|VDS= 25 V, f=1 MHz,
VGS=0|-|724
132
21||pF
pF
pF| |Qg
Qgs
Qgd|Total gate charge
Gate-source charge
Gate-drain charge|VDD=15 V, ID= 10 A
VGS= 4.5 V
_Figure 14_|-|5.4
2
2.1||nC
nC
nC| |RG|Intrinsic gate resistance|f=1 MHz gate dc bias=0
test signal level = 20 mV
open drain|-||3.3|Ω| 4/12 Doc ID 16967 Rev 1 **STS8DN3LLH5** **Electrical characteristics** ## **Table 6. Switching times** |**Table 6.**|**Switching times**|||||| |---|---|---|---|---|---|---| |**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**| |td(on)
tr
td(off)
tf|Turn-on delay time
Rise time
Turn-off delay time
Fall time|VDD=15 V, ID= 5 A,
RG=4.7Ω,VGS=10 V
_Figure 13_|-|4
4.2
21.1
3.5|-|ns
ns
ns
ns| ## **Table 7. Source drain diode** |**Table 7.**|**Source drain diode**|||||| |---|---|---|---|---|---|---| |**Symbol**|**Parameter**|**Test conditions**|**Min**|**Typ.**|**Max**|**Unit**| |ISD|Source-drain current||-||10|A| |ISDM
(1)|Source-drain current (pulsed)||-||40|A| |VSD
(2)|Forward on voltage|ISD= 10 A, VGS=0|-||1.1|V| |trr
Qrr
IRRM|Reverse recovery time
Reverse recovery charge
Reverse recovery current|ISD= 10 A,
di/dt = 100 A/µs,
VDD= 25 V, Tj=150 °C|-|20.8
10.5
1||ns
nC
A| 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration=300µs, duty cycle 1.5% 5/12 Doc ID 16967 Rev 1 **STS8DN3LLH5** **Electrical characteristics** ## **2.1 Electrical characteristics (curves)** ## **Figure 2. Safe operating area Figure 3. Thermal impedance** **==> picture [228 x 171] intentionally omitted <==** **----- Start of picture text -----**
ID AM04963v1
(A)
Tj=150°C
Tc=25°C
100 Single
pulse
10
10ms
1
100ms
1s
0.1
0.01
0.1 1 10 VDS(V)
DS(on)
Operation in this area is
Limited by max R
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## **Figure 4. Output characteristics** **==> picture [175 x 167] intentionally omitted <==** ## **Figure 5. Transfer characteristics** **==> picture [463 x 176] intentionally omitted <==** **----- Start of picture text -----**
AM04954v1 AM04955v1
ID ID
(A) VGS=10V (A)
VDS=4V
100 100
80 80
5V
60 60
4V
40 40
20 20
3V
0 0
0 1 2 3 4 VDS(V) 0 2 4 6 8 10 VGS(V)
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## **Figure 6. Normalized BVDSS vs temperature Figure 7. Static drain-source on resistance** **==> picture [463 x 176] intentionally omitted <==** **----- Start of picture text -----**
BVDSS AM04956v1 RDS(on) AM04957v1_a
(norm) (Ohm)
ID=1mA
ID=5A
1.10
25 VGS=10V
1.05 20
1.00 15
0.95 10
0.90 5
-50 0 50 100 150 TJ(°C) 0 2 4 6 8 10 ID(A)
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6/12 Doc ID 16967 Rev 1 **STS8DN3LLH5** **Electrical characteristics** ## **Figure 8. Gate charge vs gate-source voltage Figure 9.** ## **Capacitance variations** **==> picture [463 x 176] intentionally omitted <==** **----- Start of picture text -----**
VGS AM04958v1 C AM04959v1
(V) (pF)
12 VDD=15V 1000 Tf=1MHzJ=25°C
ID=11A
10
800
Ciss
8
600
6
400
4
200
2
Coss
Crss
0 0
0 2 4 6 8 10 Qg(nC) 0 10 20 VDS(V)
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**Figure 10. Normalized gate threshold voltage Figure 11. Normalized on resistance vs vs temperature temperature** **==> picture [228 x 171] intentionally omitted <==** **----- Start of picture text -----**
VGS(th) AM04960v1
(norm)
ID=250µA
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
-50 0 50 100 150 TJ(°C)
**----- End of picture text -----**
**==> picture [228 x 171] intentionally omitted <==** **----- Start of picture text -----**
RDS(on) AM04961v1
(norm)
ID=5.5A
1.8
VGS=10V
1.6
1.4
1.2
1.0
0.8
0.6
-50 0 50 100 150 TJ(°C)
**----- End of picture text -----**
## **Figure 12. Source-drain diode forward characteristics** **==> picture [228 x 171] intentionally omitted <==** **----- Start of picture text -----**
VSD AM04961v1
(V) TJ=-50°C
0.9
0.8 TJ=25°C
0.7
0.6
TJ=175°C
0.5
0.4
0 2 4 6 8 10 ISD(A)
**----- End of picture text -----**
7/12 Doc ID 16967 Rev 1 **STS8DN3LLH5** **Test circuits** ## **3 Test circuits** **Figure 13. Switching times test circuit for Figure 14. Gate charge test circuit resistive load** **==> picture [463 x 195] intentionally omitted <==** **----- Start of picture text -----**
VDD
12V 47kΩ
1kΩ
100nF
RL 2200 3.3
µF µF
VDD IG=CONST
VD Vi=20V=VGMAX 100Ω D.U.T.
VGS
2200
RG D.U.T. µF 2.7kΩ VG
PW
47kΩ
1kΩ
PW
AM01468v1 AM01469v1
Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test
switching and diode recovery times circuit
**----- End of picture text -----**
**==> picture [463 x 346] intentionally omitted <==** **----- Start of picture text -----**
L
A A A
D
G D.U.T. FASTDIODE L=100µH VD 2200 3.3
S B 3.3 1000 µF µF VDD
25 Ω B B D µF µF VDD ID
G
RG S
Vi D.U.T.
Pw
AM01470v1 AM01471v1
Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform
V(BR)DSS ton toff
VD tdon tr tdoff tf
90% 90%
IDM
10%
ID 0 10% VDS
VDD VDD 90%
VGS
AM01472v1 0 10% AM01473v1
**----- End of picture text -----**
8/12 Doc ID 16967 Rev 1 **STS8DN3LLH5** **Package mechanical data** ## **4 Package mechanical data** In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 9/12 Doc ID 16967 Rev 1 **STS8DN3LLH5** **Package mechanical data** ## **SO-8 MECHANICAL DATA** |**DIM.**|**mm.**|**mm.**|**mm.**|**inch**|**inch**|**inch**| |---|---|---|---|---|---|---| ||**MIN.**|**TYP**|**MAX.**|**MIN.**|**TYP.**|**MAX.**| |A|||1.75|||0.068| |a1|0.1||0.25|0.003||0.009| |a2|||1.65|||0.064| |a3|0.65||0.85|0.025||0.033| |b|0.35||0.48|0.013||0.018| |b1|0.19||0.25|0.007||0.010| |C|0.25||0.5|0.010||0.019| |c1|45 (typ.)|||||| |D|4.8||5.0|0.188||0.196| |E|5.8||6.2|0.228||0.244| |e||1.27|||0.050|| |e3||3.81|||0.150|| |F|3.8||4.0|0.14||0.157| |L|0.4||1.27|0.015||0.050| |M|||0.6|||0.023| |S|8 (max.)|||||| **==> picture [404 x 262] intentionally omitted <==** 10/12 Doc ID 16967 Rev 1 **STS8DN3LLH5** **Revision history** ## **5 Revision history** **Table 8. Document revision history** |**Date**|**Revision**|**Changes**| |---|---|---| |12-Jan-2010|1|First release| 11/12 Doc ID 16967 Rev 1 **STS8DN3LLH5** ## **Please Read Carefully:** Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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