# Power MOSFET, N Channel, 150 V, 5 A, 0.057 ohm, SOIC, Surface Mount

![Product image](https://novapart.co/image/farnell:2807227/)

**URL**: https://novapart.co/products/STS5N15F4/power-mosfet-n-channel-150-v-5-a-0057-ohm-soic
**SKU**: STS5N15F4
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.5590
**Stock**: 50+
**Lead Time**: 2 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:5A; Drain Source Voltage Vds:150V; On Resistance Rds(on):0.057ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4V; Power Di

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 8Pins |
| Channel Type | N Channel |
| Product Range | DeepGATE STripFET |
| Qualification | - |
| Power Dissipation | 2.5W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | SOIC |
| Drain Source Voltage Vds | 150V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 5A |
| Drain Source On State Resistance | 0.057ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2807227/)

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## **STS5N15F4** N-channel 150 V, 0.057Ω, 5 A, SO-8 STripFET™ DeepGATE™ Power MOSFET 

## **Features** 

|**Type**|**VDSS**|**RDS(on)**<br>**max**|**ID**|
|---|---|---|---|
|STS5N15F4|150 V|< 0.063Ω|5 A|



- N-channel enhancement mode 

- 100% avalanched rated 

**==> picture [58 x 50] intentionally omitted <==**

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SO-8<br>**----- End of picture text -----**<br>


- Low gate charge 

- Very low on-resistance 

## **Application** 

- Switching applications 

## **Description** 

This STripFET™ DeepGATE™ Power MOSFET technology is among the latest improvements, which have been especially tailored to minimize on-state resistance, with a new gate structure, providing superior switching performances. 

## **Figure 1. Internal schematic diagram** 

**==> picture [130 x 133] intentionally omitted <==**

## **Table 1. Device summary** 

|**Order code**|**Marking**|**Package**|**Packaging**|
|---|---|---|---|
|STS5N15F4|5U15-|SO-8|Tape and reel|



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_www.st.com_ 

**STS5N15F4** 

**Electrical ratings** 

## **1 Electrical ratings** 

## **Table 2. Absolute maximum ratings** 

|**Table 2.**|**Absolute maximum ratings**|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|VDS|Drain-source voltage (VGS= 0)|150|V|
|VGS|Gate-source voltage|± 20|V|
|ID|Drain current (continuous) at TC= 25 °C|5|A|
|ID|Drain current (continuous) at TC=100 °C|3|A|
|IDM<br>(1)|Drain current (pulsed)|20|A|
|PTOT|Total dissipation at TC= 25 °C|2.5|W|
|Tstg|Storage temperature|-55 to 150|°C|
|Tj|Operating junction temperature|||



1. Pulse width limited by safe operating area 

## **Table 3. Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-pcb<br>(1)|Thermal resistance junction-pcb max|50|°C/W|



1. When mounted on FR-4 board of 1 inch², 2 oz Cu, t < 10 sec 

## **Table 4. Avalanche characteristics** 

|**Symbol**|**Parameter**|**Max value**|**Unit**|
|---|---|---|---|
|IAS|Avalanche current, repetitive or not-repetitive<br>(pulse width limited by Tjmax)|5|A|
|EAS|Single pulse avalanche energy<br>(starting Tj= 25 °C, ID= IAS, VDD= 140 V)|125|mJ|



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**STS5N15F4** 

**Electrical characteristics** 

## **2 Electrical characteristics** 

(TJ = 25 °C unless otherwise specified) 

## **Table 5. On/off states** 

|**Table 5.**|**On/off states**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|V(BR)DSS|Drain-source breakdown<br>voltage|ID= 1 mA, VGS= 0|150|||V|
|IDSS|Zero gate voltage drain<br>current (VGS= 0)|VDS= 150 V,<br>VDS= 150 V, @125 °C|||1<br>10|µA<br>µA|
|IGSS|Gate body leakage current<br>(VDS= 0)|VGS= ±20 V|||±100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|2||4|V|
|RDS(on)|Static drain-source on<br>resistance|VGS= 10 V, ID= 2.5 A||0.057|0.063|Ω|



## **Table 6. Dynamic** 

|**Table 6.**|**Dynamic**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|Ciss<br>Coss<br>Crss|Input capacitance<br>Output capacitance<br>Reverse transfer<br>capacitance|VDS=25 V, f = 1 MHz,<br>VGS= 0|-|2710<br>180<br>69.5|-|pF<br>pF<br>pF|
|Qg<br>Qgs<br>Qgd|Total gate charge<br>Gate-source charge<br>Gate-drain charge|VDD= 75 V, ID= 5 A<br>VGS=10 V<br>_Figure 14 on page 7_|-|48<br>10.8<br>13.7|-|nC<br>nC<br>nC|
|Rg|Gate input resistance|f=1 MHz Gate DC Bias=0<br>Test signal level=20 mV<br>open drain|-|1.9|-|Ω|



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**STS5N15F4** 

**Electrical characteristics** 

**Table 7. Switching times** 

|**Table 7.**|**Switching times**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|td(on)<br>tr<br>td(off)<br>tf|Turn-on delay time<br>Rise time<br>Turn-off delay time<br>Fall time|VDD= 75 V, ID= 3 A,<br>RG=4.7Ω,VGS=10 V<br>_Figure 13 on page 7_|-|13.5<br>5.1<br>39.7<br>11.4|-|ns<br>ns<br>ns<br>ns|



## **Table 8. Source drain diode** 

|**Table 8.**|**Source drain diode**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max**|**Unit**|
|ISD|Source-drain current||-||5|A|
|ISDM<br>(1)|Source-drain current (pulsed)||-||20|A|
|VSD<br>(2)|Forward on voltage|ISD= 6 A, VGS= 0|-||1.3|V|
|trr<br>Qrr<br>IRRM|Reverse recovery time<br>Reverse recovery charge<br>Reverse recovery current|ISD= 6 A,<br>di/dt = 100 A/µs,<br>VR= 120 V, TJ= 150 °C<br>_Figure 15 on page 7_|-|85.2<br>277.6<br>8.2||ns<br>nC<br>A|



1. Pulse width limited by safe operating area 

2. Pulsed: pulse duration=300µs, duty cycle 1.5% 

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**STS5N15F4** 

**Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**Figure 2. Safe operating area Figure 3. Thermal impedance** 

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**----- Start of picture text -----**<br>
ID AM04995v1<br>(A)<br>Tj=150°C<br>Tc=25°C<br>100<br>Sinlge<br>pulse<br>10<br>1<br>10ms<br>100ms<br>0.1<br>1s<br>0.01<br>0.1 1 10 100 VDS(V)<br>DS(on)<br>Operation in this area is<br>Limited by max R<br>**----- End of picture text -----**<br>


## **Figure 4. Output characteristics** 

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## **Figure 5. Transfer characteristics** 

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AM04986v1 AM04987v1<br>ID ID<br>(A) (A)<br>70 VGS=10V 70<br>VDS=10V<br>60 60<br>6V<br>50 50<br>40 40<br>30 30<br>5V<br>20 20<br>10 10<br>4V<br>0 0<br>0 5 10 15 VDS(V) 0 2 4 6 8 10 VGS(V)<br>Figure 6. Normalized BVDSS vs temperature Figure 7. Static drain-source on resistance<br>BVDSS AM04989v1 RDS(on) AM04988v1<br>(norm) (Ω)<br>140<br>1.10<br>120<br>ID = 1 mA VGS=10V<br>100<br>1.05<br>80<br>1.00 60<br>40<br>0.95<br>20<br>0.90 0<br>-50 -25 0 25 50 75 100 125 150 TJ(°C) 0 1 2 3 4 5 ID(A)<br>**----- End of picture text -----**<br>


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**Electrical characteristics** 

**Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations** 

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**----- Start of picture text -----**<br>
VGS AM04990v1 C (pF) AM04991v1<br>(V)<br>12 VDD=75V 2500 TJ=25°C<br>ID=5A f=1MHz<br>10 2000 Ciss<br>8 2000<br>6 1500<br>4 1000<br>2 Crss 500<br>Coss<br>0 0<br>0 10 20 30 40 50 Qg(nC) 0 20 40 60 80 100 120 140 VDS(V)<br>**----- End of picture text -----**<br>


**Figure 10. Normalized gate threshold voltage vs temperature** 

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VGS(th) AM04992v1<br>(norm)<br>1.10<br>ID= 250 µA<br>1.00<br>0.90<br>0.80<br>0.70<br>0.60<br>0.50<br>-50 -25 0 25 50 75 100 125 150 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 11. Normalized on resistance vs temperature** 

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**----- Start of picture text -----**<br>
RDS(on) AM04993v1<br>(norm)<br>2.5<br>VGS = 10 V<br>ID = 2.5 A<br>2.0<br>1.5<br>1.0<br>0.5<br>0<br>-50 -25 0 25 50 75 100 125 150 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 12. Source-drain diode forward characteristics** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
VSD AM04994v1<br>(V) TJ=-55°C<br>0.9<br>0.8<br>TJ=25°C<br>0.7<br>0.6<br>TJ=175°C<br>0.5<br>0.4<br>0 10 20 30 40 50 ISD(A)<br>**----- End of picture text -----**<br>


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**Test circuits** 

## **3 Test circuits** 

**Figure 13. Switching times test circuit for Figure 14. Gate charge test circuit resistive load** 

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**----- Start of picture text -----**<br>
VDD<br>12V 47kΩ<br>1kΩ<br>100nF<br>RL 2200 3.3<br>µF µF<br>VDD IG=CONST<br>VD Vi=20V=VGMAX 100Ω D.U.T.<br>VGS<br>2200<br>RG D.U.T. µF 2.7kΩ VG<br>PW<br>47kΩ<br>1kΩ<br>PW<br>AM01468v1 AM01469v1<br>**----- End of picture text -----**<br>


**Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test switching and diode recovery times circuit** 

**==> picture [463 x 183] intentionally omitted <==**

**----- Start of picture text -----**<br>
L<br>A A A<br>D<br>G D.U.T. FASTDIODE L=100µH VD 2200 3.3<br>S B 3.3 1000 µF µF VDD<br>25 Ω B B D µF µF VDD ID<br>G<br>RG S<br>Vi D.U.T.<br>Pw<br>AM01470v1 AM01471v1<br>Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
V(BR)DSS ton toff<br>VD tdon tr tdoff tf<br>90% 90%<br>IDM<br>10%<br>ID 0 10% VDS<br>VDD VDD 90%<br>VGS<br>AM01472v1 0 10% AM01473v1<br>**----- End of picture text -----**<br>


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**Package mechanical data** 

## **4 Package mechanical data** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 

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**Package mechanical data** 

## **SO-8 MECHANICAL DATA** 

|**SO-8 MECHANICAL DATA**|**SO-8 MECHANICAL DATA**|**SO-8 MECHANICAL DATA**|**SO-8 MECHANICAL DATA**|**SO-8 MECHANICAL DATA**|**SO-8 MECHANICAL DATA**|**SO-8 MECHANICAL DATA**|
|---|---|---|---|---|---|---|
||||||||
||||||||
|**DIM.**|**mm.**|||**inch**|||
||**MIN.**|**TYP**|**MAX.**|**MIN.**|**TYP.**|**MAX.**|
|A|||1.75|||0.068|
|a1|0.1||0.25|0.003||0.009|
|a2|||1.65|||0.064|
|a3|0.65||0.85|0.025||0.033|
|b|0.35||0.48|0.013||0.018|
|b1|0.19||0.25|0.007||0.010|
|C|0.25||0.5|0.010||0.019|
|c1|45 (typ.)||||||
|D|4.8||5.0|0.188||0.196|
|E|5.8||6.2|0.228||0.244|
|e||1.27|||0.050||
|e3||3.81|||0.150||
|F|3.8||4.0|0.14||0.157|
|L|0.4||1.27|0.015||0.050|
|M|||0.6|||0.023|
|S|8 (max.)||||||
||||||||



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**Revision history** 

## **5 Revision history** 

**Table 9.** 

**Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|23-Jul-2009|1|First release|
|03-Aug-2009|2|Updated figures_6_,_7_,_10_and_11_|



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