# Power MOSFET, P Channel, 40 V, 10 A, 0.0125 ohm, SOIC, Surface Mount

![Product image](https://novapart.co/image/farnell:3129888RL/)

**URL**: https://novapart.co/products/STS10P4LLF6/power-mosfet-p-channel-40-v-10-a-00125-ohm-soic
**SKU**: STS10P4LLF6
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.3660
**Stock**: 10+
**Lead Time**: 147 days (indicative)

## Description

Transistor Polarity:P Channel; Continuous Drain Current Id:-10A; Drain Source Voltage Vds:-40V; On Resistance Rds(on):0.0125ohm; Rds(on) Test Voltage Vgs:-10V; Threshold Voltage Vgs:

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 8Pins |
| Channel Type | P Channel |
| Product Range | StripFET F6 |
| Qualification | - |
| Power Dissipation | 2.7W |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | P Channel |
| Power Dissipation Pd | 2.7W |
| Rds(On) Test Voltage | 10V |
| On Resistance Rds(On) | 0.0125ohm |
| Transistor Case Style | SOIC |
| Drain Source Voltage Vds | 40V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 10A |
| Drain Source On State Resistance | 0.0125ohm |
| Automotive Qualification Standard | - |
| Gate Source Threshold Voltage Max | 1V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3129888RL/)

## **STS10P4LLF6** 

## P-channel 40 V, 0.0125 Ω typ., 10 A, StripFET™ F6 Power MOSFET in SO-8 package Datasheet - production data 

- Very low on-resistance 

- Very low gate charge 

- High avalanche ruggedness 

- Low gate drive power loss 

## **Applications** 

- Switching applications 

## **Description** 

**Figure 1: Internal schematic diagram** 

This device is a P-channel Power MOSFET developed using the STripFET™ F6 technology with a new trench gate structure. The resulting Power MOSFET exhibits very low RDS(on) in all packages. 

|**Order code**<br>STS10P4LLF6|**Marking**<br>10K4L|**Package**<br>SO-8|**Packaging**<br>Tape and<br>reel|
|---|---|---|---|



> [For the P-channel MOSFET actual polarity ] of voltages and current have to be reversed 

**==> picture [224 x 54] intentionally omitted <==**

**----- Start of picture text -----**<br>
Features<br>Order code  VDS RDS(on) max.  ID<br>STS10P4LLF6  40 V  0.015  10 A<br>SS ——<br>**----- End of picture text -----**<br>


This is information on a product in full production. 

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_www.st.com_ 

|**Contents**<br>**STS10P4LLF6**|**Contents**<br>**STS10P4LLF6**|
|---|---|
|**Contents**||
|**1**|**Electrical ratings ............................................................................. 3**|
|**2**|**Electrical characteristics ................................................................ 4**|
|**3**|**Electrical characteristics (curves) .................................................. 6**|
|**4**|**Test circuits ..................................................................................... 8**|
|**5**|**Package mechanical data ............................................................... 9**|
||5.1<br>SO-8 package mechanical data ........................................................ 9|
|**6**|**Packaging mechanical data .......................................................... 12**|
|**7**|**Revision history ............................................................................ 13**|



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**Electrical ratings** 

## **1 Electrical ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VDS|Drain-source voltage|40|V|
|VGS|Gate- source voltage|±20|V|
|ID|Drain current (continuous) at Tamb= 25 °C|10|A|
|ID|Drain current (continuous) at Tamb= 100 °C|5.6|A|
|IDM<br>_(1)_|Drain current (pulsed)|40|A|
|PTOT<br>_(1)_|Total dissipation at Tamb= 25 °C|2.7|W|
|Tstg|Storage temperature|-55 to 150|°C|
|Tj|Operating junction temperature|150|°C|



## **Notes:** 

- (1) Pulse width limited by safe operating area 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-amb<br>_(1)_|Thermal resistancejunction-ambient|47|°C/W|



## **Notes:** 

- (1) When mounted on 1 inch² FR-4 board, 2 oz. Cu., t ≤ 10 sec 

For the P-channel MOSFET actual polarity of voltages and current have to be reversed 

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**Electrical characteristics** 

## **2 Electrical characteristics** 

(TCASE = 25 °C unless otherwise specified) 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source<br>breakdown voltage|ID= 250 µA|40|||V<br>V|
|IDSS|Zero gate voltage<br>drain current (VGS= 0)|VDS= 40 V|||1|µA|
|||VDS= 30 V, TC= 125 °C|||10||
|IGSS|Gate-body leakage<br>current (VDS= 0)|VGS= ±20 V|||±100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250µA|1|||V|
|RDS(on)|Static drain-source<br>on-resistance|VGS= 10 V, ID= 3 A||0.0125|0.015|Ω|
|||VGS= 4.5 V, ID= 3 A||0.017|0.02|Ω|



||**Table 5: Dynamic**||||||
|---|---|---|---|---|---|---|
|**Symbol**<br>**Parameter**<br>**Test conditions**<br>**Min.**<br>**Typ.**<br>**Max.**<br>**Unit**<br>Ciss<br>Input capacitance<br>VDS= 25 V, f = 1 MHz,<br>VGS= 0<br>-<br>3525<br>-<br>pF<br>Coss<br>Output capacitance<br>-<br>344<br>-<br>pF<br>Crss<br>Reverse transfer<br>capacitance<br>-<br>238.5<br>-<br>pF<br>Qg<br>Totalgate charge<br>VDD= 20 V  ID= 10 A<br>VGS= 4.5 V<br>-<br>34<br>-<br>nC<br>Qgs<br>Gate-source charge<br>-<br>11.3<br>-<br>nC<br>Qgd<br>Gate-drain charge<br>-<br>13.8<br>-<br>nC<br>~~=m:~~|||||||
||**Table 6: Switching times**||||||
|**Symbol**<br>**Parameter**<br>**Test conditions**<br>**Min.**<br>**Typ.**<br>**Max.**<br>**Unit**<br>td(on)<br>Turn-on delaytime<br>VDD= 20 V, ID= 5 A<br>RG= 4.7 Ω<br>VGS= 10 V<br>-<br>49.4<br>-<br>ns<br>tr<br>Rise time<br>60.6<br>td(off)<br>Turn-off delaytime<br>170<br>tf<br>Fall time<br>20<br>~~=—ET~~|||||||
||For the P-channel MOSFET actual polarity of voltages and current have to be||||||
||reversed||||||



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**Electrical characteristics** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|VSD<br>_(1)_|Forward on voltage|ISD= 3 A, VGS= 0|-||1.1|V|
|trr|Reverse recoverytime|ISD= 5 A, di/dt = 100<br>A/µs<br>VDD= 10 V, Tj= 150 °C|-|29||ns|
|Qrr|Reverse recovery<br>charge||-|27.6||nC|
|IRRM|Reverse recovery<br>current||-|1.9||A|



## **Notes:** 

(1) Pulsed: pulse duration = 300 µs, duty cycle 1.5% 

For the P-channel MOSFET actual polarity of voltages and current have to be reversed 

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**Electrical characteristics** (curves) 

## **3 Electrical characteristics (curves)** 

**==> picture [377 x 550] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 2: Safe operating area  Figure 3: Thermal impedance<br>ID GIPG080920141302LM K GIPG0809141324LM<br>(A) δ<br>0.2<br>10 0.1 0.1<br>0.05<br>10µs<br>0.02<br>1 100µs 0.01 0.01<br>ane 1ms Single pulse Z Z 6 t=t h = p/tK Rinseo<br>0.1 0.001<br>Tj=150 °C<br>Tc=25 °C<br>Single pulse T e] T.<br>0.01 0.0001<br>0.1 1 10 VDS(V) 10-5 10 [-4] 10 [-3] 10 [-2] 10 -1 10 [0] 10 [1] tp(s)<br>Figure 4: Output characteristics  Figure 5: Transfer characteristics<br>GIPG020920140913LM GIPG020920140929LM<br>|<br>ID(A(A) D<br>t<br>Ves=8, 9,10 V (A)<br>200 7V 180<br>6V. 160<br>150 140<br>y 5V 120<br>100<br>100 80<br>WY 60<br>50 40<br>0 aN ‘0<br>0 2 4 6 8 10  Vops(V) 012 3 4 5 6 7 8 9 Ves(V)<br>Figure 6: Gate charge vs gate-source voltage  Figure 7: Static drain-source on-resistance<br>VGS GIPG020920141000LM RDS(on) GIPG080920141345LM<br>(V) (mΩ)<br>VDD = 20 V VGS=10 V<br>12 14.0<br>ID = 10 A<br>10 13.5<br>8 13.0<br>6 12.5<br>4 12.0<br>2 11.5<br>0 11.0<br>0 20 40 60 80 Qg(nC) 0 1 2 3 4 5 6 7 8 9 ID(A)<br>DS(on)<br>Operation in this area isLimited by max R<br>**----- End of picture text -----**<br>


**Figure 6: Gate charge vs gate-source voltage** 

**Figure 7: Static drain-source on-resistance** 

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**Electrical characteristics** (curves) 

**Figure 8: Capacitance variation** 

**==> picture [170 x 153] intentionally omitted <==**

**Figure 9: Normalized gate threshold voltage vs temperature** 

**==> picture [172 x 153] intentionally omitted <==**

**Figure 11: Normalized VBR(DSS) vs Figure 10: Normalized on-resistance vs temperature temperature** 

**==> picture [177 x 146] intentionally omitted <==**

**==> picture [170 x 150] intentionally omitted <==**

**Figure 12: Source-drain diode forward characteristics** 

**==> picture [154 x 134] intentionally omitted <==**

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**Test circuits** 

## **4 Test circuits** 

**==> picture [416 x 586] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 13: Switching times test circuit for<br>Figure 14: Gate charge test circuit<br>resistive load<br>VDD<br>12 V 47 kΩ<br>1 kΩ<br>100 nF<br>I G = CONST<br>Vi ≤ V GS 100 Ω D.U.T.<br>2.7 kΩ VG<br>2200 μ F<br>47 kΩ<br>1 kΩ<br>PW<br>AM01469v1<br>Figure 15: Test circuit for inductive load  Figure 16: Unclamped inductive load test<br>switching and diode recovery times  circuit<br>Figure 17: Unclamped inductive waveform  Figure 18: Switching time waveform<br>V(BR)DSS t on toff<br>t d(on) t r td(off) t f<br>VD<br>90% 90%<br>I DM<br>10%<br>I D 0 10% VDS<br>VDD VDD<br>90%<br>VGS<br>AM01472v1 0 10% AM01473v1<br>**----- End of picture text -----**<br>


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**Package mechanical** data 

## **5 Package mechanical data** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: www.st.com. ECOPACK[®] is an ST trademark. 

## **5.1 SO-8 package mechanical data** 

**Figure 19: SO-8 drawings** 

**==> picture [407 x 267] intentionally omitted <==**

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**Package mechanical** data 

|**chanical** data|||**STS10P4LLF6**|
|---|---|---|---|
||**Table 8: SO-8 mechanical data**|||
|**Dim.**||**mm**||
||**Min.**|**Typ.**|**Max.**|
|A|||1.75|
|A1|0.10||0.25|
|A2|1.25|||
|b|0.31||0.51|
|b1|0.28||0.48|
|c|0.10||0.25|
|c1|0.10||0.23|
|D|4.80|4.90|5.00|
|E|5.80|6.00|6.20|
|E1|3.80|3.90|4.00|
|e||1.27||
|h|0.25||0.50|
|L|0.40||1.27|
|L1||1.04||
|L2||0.25||
|k|0°||8°|
|ccc|||0.10|



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**Package mechanical** data 

**Figure 20: SO-8 recommended footprint** 

All dimensions are in mm 

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**Packaging mechanical** data 

## **6 Packaging mechanical data** 

**Figure 21: SO-8 tape and reel dimensions** 

**==> picture [407 x 348] intentionally omitted <==**

||**Table 9: SO-8 **|**tape and reel mechanical data**|**tape and reel mechanical data**|
|---|---|---|---|
|**Dim.**||**mm**||
||**Min.**|**Typ.**|**Max.**|
|A||-|330|
|C|12.8||13.2|
|D|20.2|||
|N|60|||
|T|||22.4|
|Ao|8.1||8.5|
|Bo|5.5||5.9|
|Ko|2.1||2.3|
|Po|3.9||4.1|
|P|7.9||8.1|



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**Revision history** 

## **7 Revision history** 

|**Revision**|**history**||
|---|---|---|
|||**Table 10: Revision history**|
|**Date**|**Revision**|**Changes**|
|20-Jan-2014|1|First revision.|
|09-Sep-2014|2|Changed the title.<br>Updated_Section "Features"_and_Section "Description"_.<br>Updated_Table 4: "On/off states"_,_Table 5: "Dynamic"_,_Table 6:_<br>_"Switching times"_,_Table 7: "Source-drain diode"_.<br>Added_Section 3: "Electrical characteristics (curves)"_.|
|16-Dec-2014|3|Document status promoted  from preliminary data to production<br>data.<br>Minor text changes.|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

- © 2014 STMicroelectronics – All rights reserved 

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## Links

- [View this product on Novapart](https://novapart.co/products/STS10P4LLF6/power-mosfet-p-channel-40-v-10-a-00125-ohm-soic)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/stmicroelectronics/sts10p4llf6/mosfet-p-ch-40v-10a-2-7w-soic/dp/3129888RL)
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