# Dual MOSFET, N Channel, 30 V, 30 V, 10 A, 10 A, 0.019 ohm ![Product image](https://novapart.co/image/farnell:2807225/) **URL**: https://novapart.co/products/STS10DN3LH5/dual-mosfet-n-channel-30-v-10-a-0019-ohm **SKU**: STS10DN3LH5 **Manufacturer**: STMICROELECTRONICS **Category**: Semiconductors - Discretes || FETs || Dual MOSFETs **Price**: €0.3240 **Stock**: 1000+ **Lead Time**: 127 days (indicative) ## Description Transistor Polarity:Dual N Channel; Continuous Drain Current Id:10A; Drain Source Voltage Vds:30V; On Resistance Rds(on):0.019ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:1V ## Specifications | Parameter | Value | |---|---| | Msl | MSL 1 - Unlimited | | Svhc | No SVHC (25-Jun-2025) | | No. Of Pins | 8Pins | | Channel Type | N Channel | | Product Range | STripFET V Series | | Qualification | - | | Transistor Case Style | SOIC | | Operating Temperature Max | 150°C | | Power Dissipation N Channel | 2.5W | | Power Dissipation P Channel | 2.5W | | Drain Source Voltage Vds N Channel | 30V | | Drain Source Voltage Vds P Channel | 30V | | Continuous Drain Current Id N Channel | 10A | | Continuous Drain Current Id P Channel | 10A | | Drain Source On State Resistance N Channel | 0.019ohm | | Drain Source On State Resistance P Channel | 0.019ohm | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:2807225/) **==> picture [61 x 39] intentionally omitted <==** ## **STS10DN3LH5** Dual N-channel 30 V, 0.019 Ω , 10 A, SO-8 STripFET™ V Power MOSFET ## **Features** |**Features**|||| |---|---|---|---| |**Type**|**VDSS**|**RDS(on)max**|**ID**| |STS10DN3LH5|30 V|0.021Ω|10 A| - RDS(on) * Qg industry benchmark - Extremely low on-resistance RDS(on) - Very low switching gate charge - High avalanche ruggedness - Low gate drive power losses ## **Application** **==> picture [220 x 171] intentionally omitted <==** **----- Start of picture text -----**
SO-8
**----- End of picture text -----**
- Switching applications ## **Description** This STripFET™V Power MOSFET technology is among the latest improvements, which have been especially tailored to achieve very low on-state resistance providing also one of the best-in-class FOM. ## **Figure 1. Internal schematic diagram** **==> picture [130 x 126] intentionally omitted <==** **Table 1. Device summary** |**Order codes**|**Marking**|**Package**|**Packaging**| |---|---|---|---| |STS10DN3LH5|10DD3L|SO-8|Tape and reel| 1/13 May 2009 Doc ID 15624 Rev 1 _www.st.com_ **Contents** **STS10DN3LH5** |**Contents**|**Contents**| |---|---| |**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3**| |**2**|**Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4**| ||2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . 6| |**3**|**Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8**| |**4**|**Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10**| |**5**|**Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12**| 2/13 Doc ID 15624 Rev 1 **STS10DN3LH5** **Electrical ratings** ## **1 Electrical ratings** ## **Table 2. Absolute maximum ratings** |**Table 2.**|**Absolute maximum ratings**||| |---|---|---|---| |**Symbol**|**Parameter**|**Value**|**Unit**| |VDS|Drain-source voltage (VGS= 0)|30|V| |VGS|Gate-Source voltage|± 22|V| |ID
(1)|Drain current (continuous) at TC= 25 °C|10|A| |ID|Drain current (continuous) at TC= 100 °C|7|A| |IDM
(2)|Drain current (pulsed)|40|A| |PTOT|Total dissipation at TC= 25 °C|2.5|W| ||Derating factor|0.02|W/°C| |EAS
(3)|Single pulse avalanche energy|50|mJ| |TJ
Tstg|Operating junction temperature
Storage temperature|- 55 to 150|°C| 1. Limited by wire bonding 2. Pulse width limited by safe operating area 3. Starting TJ = 25 °C, ID = 21 A, L= 0.2 mH ## **Table 3. Thermal resistance** |**Table 3.**|**Thermal resistance**||| |---|---|---|---| |**Symbol**|**Parameter**|**Value**|**Unit**| |RthJC|Thermal resistance junction-case max|50|°C/W| |RthJA|Thermal resistance junction-case max|100|°C/W| |TJ|Maximum lead temperature for soldering
purpose|275|°C| 3/13 Doc ID 15624 Rev 1 **STS10DN3LH5** **Electrical characteristics** ## **2 Electrical characteristics** (TCASE = 25 °C unless otherwise specified) ## **Table 4. Static** |**Table 4.**|**Static**|||||| |---|---|---|---|---|---|---| |**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**| |V(BR)DSS|Drain-source
breakdown Voltage|ID= 250 µA, VGS= 0|30|||V| |IDSS|Zero gate voltage
drain current (VGS= 0)|VDS= 30 V
VDS= 30 V, Tc = 125 °C|||1
10|µA
µA| |IGSS|Gate body leakage
current
(VDS= 0)|VGS= ± 22 V|||±100|nA| |VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|1|||V| |RDS(on)|Static drain-source on
resistance|VGS= 10 V, ID= 5 A||0.019|0.021|Ω| |||VGS= 4.5 V, ID= 5 A||0.023|0.028|Ω| ## **Table 5. Dynamic** |**Table 5.**|**Dynamic**|||||| |---|---|---|---|---|---|---| |**Symbol**|**Parameter**|**Test conditions**|**Min**|**Typ.**|**Max.**|**Unit**| |Ciss
Coss
Crss|Input capacitance
Output capacitance
Reverse transfer
capacitance|VDS= 25 V, f = 1 MHz,
VGS= 0|-|475
97
19|-|pF
pF
pF| |Qg
Qgs
Qgd|Total gate charge
Gate-source charge
Gate-drain charge|VDD= 15 V, ID= 10 A
VGS= 5 V
_(Figure 14)_|-|4.6
1.7
1.9|-|nC
nC
nC| |Qgs1
Qgs2|Pre Vthgate-to-source
charge
Post Vthgate-to-
source charge|VDD= 15 V, ID= 10A
VGS= 5 V
_(Figure 19)_|-|0.67
0.84|-|nC
nC| |RG|Gate input resistance|f = 1 MHz gate bias
Bias = 0 test signal
level = 20 mV
open drain|-|2.5|-|Ω| 4/13 Doc ID 15624 Rev 1 **STS10DN3LH5** **Electrical characteristics** **Table 6. Switching on/off (resistive load)** |**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**| |---|---|---|---|---|---|---| |td(on)
tr|Turn-on delay time
Rise time|VDD= 15 V, ID= 5 A,
RG= 4.7Ω,VGS= 10 V
_(Figure 13 and Figure 18)_|-|4
22|-|ns
ns| |td(off)
tf|Turn-off delay time
Fall time|VDD= 15 V, ID= 5 A,
RG= 4.7Ω,VGS= 10 V
_(Figure 13 and Figure 18)_|-|13
2.8|-|ns
ns| ## **Table 7. Source drain diode** |**Table 7.**|**Source drain diode**|||||| |---|---|---|---|---|---|---| |**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**| |ISD
ISDM
(1)|Source-drain current
Source-drain current
(pulsed)||-||10
40|A
A| |VSD|Forward on voltage|ISD= 5 A, VGS= 0|-||1.1|V| |trr
Qrr
IRRM|Reverse recovery time
Reverse recovery charge
Reverse recovery current|ISD= 10 A, VDD= 25 V
di/dt = 100 A/µs,
_(Figure 15)_|-|16.2
7.8
1||ns
nC
A| 1. Pulsed: pulse duration = 300 µs, duty cycle 1.5 % 5/13 Doc ID 15624 Rev 1 **STS10DN3LH5** **Electrical characteristics** ## **2.1 Electrical characteristics (curves)** ## **Figure 2. Safe operating area Figure 3. Thermal impedance** **==> picture [463 x 386] intentionally omitted <==** **----- Start of picture text -----**
ID AM03899v1
(A) Tj=150°C
Tc=25°C
100 Sinlge
pulse
10
100ms
1
10ms
1s
0.1
0.01
0.1 1 10 VDS(V)
Figure 4. Output characteristics Figure 5. Transfer characteristics
ID AM03900v1 ID AM03901v1
(A) (A)
VGS=10V
70 70 VDS=5V
6V
60 60
5V
50 50
40 40
4V
30 30
20 20
3V
10 10
0 0
0 1 2 3 4 VDS(V) 0 2 4 6 8 VGS(V)
DS(on)
Operation in this area is
Limited by max R
**----- End of picture text -----**
**Figure 6. Normalized BVDSS vs temperature Figure 7. Static drain-source on resistance** **==> picture [463 x 176] intentionally omitted <==** **----- Start of picture text -----**
BVDSS AM03902v1 RDS(on) AM03903v1
(norm) (Ω)
ID=13.5A
35
VGS=10V
1.10
30
1.05
25
1.00 20
15
0.95
10
0.90
5
0.85 0
-55 -30 -5 20 45 70 95 120 TJ(°C) 0 5 10 15 20 25 ID(A)
**----- End of picture text -----**
**==> picture [85 x 7] intentionally omitted <==** **----- Start of picture text -----**
Doc ID 15624 Rev 1
**----- End of picture text -----**
6/13 **STS10DN3LH5** **Electrical characteristics** **Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations** **==> picture [463 x 176] intentionally omitted <==** **----- Start of picture text -----**
VGS AM03904v1 C AM03905v1
(V) (pF)
VDD=15V
12 810 TJ=25°C
ID=27A
710 f=1MHz
10
610
8
510
Ciss
6 410
310
4
210 Crss
2
110 Coss
0 10
0 2 4 6 Qg(nC) 0 10 20 VDS(V)
**----- End of picture text -----**
**Figure 10. Normalized gate threshold voltage vs temperature** **==> picture [228 x 171] intentionally omitted <==** **----- Start of picture text -----**
VGS(th) AM03906v1
(norm)
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
-55 -30 -5 20 45 70 95 120 145 TJ(°C)
**----- End of picture text -----**
**Figure 11. Normalized on resistance vs temperature** **==> picture [228 x 171] intentionally omitted <==** **----- Start of picture text -----**
RDS(on) AM03907v1
(norm)
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
-55 -30 -5 20 45 70 95 120 TJ(°C)
**----- End of picture text -----**
## **Figure 12. Source-drain diode forward characteristics** **==> picture [228 x 171] intentionally omitted <==** **----- Start of picture text -----**
VSD AM03908v1
(V)
TJ=-55°C
1.1
1.0
0.9
0.8
TJ=175°C
TJ=25°C
0.7
0.6
0.5
0.4
0 5 10 15 20 25 ISD(A)
**----- End of picture text -----**
7/13 Doc ID 15624 Rev 1 **STS10DN3LH5** **Test circuits** ## **3 Test circuits** ## **Figure 13. Switching times test circuit for Figure 14. Gate charge test circuit resistive load** **==> picture [463 x 162] intentionally omitted <==** **----- Start of picture text -----**
VDD
12V 47kΩ
1kΩ
100nF
RL 2200 3.3
µF µF
VDD IG=CONST
VD Vi=20V=VGMAX 100Ω D.U.T.
VGS
2200
RG D.U.T. µF 2.7kΩ VG
PW
47kΩ
1kΩ
PW
AM01468v1 AM01469v1
**----- End of picture text -----**
**Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test switching and diode recovery times circuit** **==> picture [463 x 162] intentionally omitted <==** **----- Start of picture text -----**
L
A A A
D
G D.U.T. FASTDIODE L=100µH VD 2200 3.3
S B 3.3 1000 µF µF VDD
25 Ω B B D µF µF VDD ID
G
RG S
Vi D.U.T.
Pw
AM01470v1 AM01471v1
**----- End of picture text -----**
## **Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform** **==> picture [463 x 162] intentionally omitted <==** **----- Start of picture text -----**
V(BR)DSS ton toff
VD tdon tr tdoff tf
90% 90%
IDM
10%
ID 0 10% VDS
VDD VDD 90%
VGS
AM01472v1 0 10% AM01473v1
**----- End of picture text -----**
8/13 Doc ID 15624 Rev 1 **STS10DN3LH5** **Test circuits** ## **Figure 19. Gate charge waveform** 9/13 Doc ID 15624 Rev 1 **STS10DN3LH5** **Package mechanical data** ## **4 Package mechanical data** In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 10/13 Doc ID 15624 Rev 1 **STS10DN3LH5** **Package mechanical data** ## **SO-8 MECHANICAL DATA** |**DIM.**|**mm.**|**mm.**|**mm.**|**inch**|**inch**|**inch**| |---|---|---|---|---|---|---| ||**MIN.**|**TYP**|**MAX.**|**MIN.**|**TYP.**|**MAX.**| |A|||1.75|||0.068| |a1|0.1||0.25|0.003||0.009| |a2|||1.65|||0.064| |a3|0.65||0.85|0.025||0.033| |b|0.35||0.48|0.013||0.018| |b1|0.19||0.25|0.007||0.010| |C|0.25||0.5|0.010||0.019| |c1|45 (typ.)|||||| |D|4.8||5.0|0.188||0.196| |E|5.8||6.2|0.228||0.244| |e||1.27|||0.050|| |e3||3.81|||0.150|| |F|3.8||4.0|0.14||0.157| |L|0.4||1.27|0.015||0.050| |M|||0.6|||0.023| |S|8 (max.)|||||| **==> picture [404 x 263] intentionally omitted <==** 11/13 Doc ID 15624 Rev 1 **STS10DN3LH5** **Revision history** ## **5 Revision history** **Table 8.** **Document revision history** |**Date**|**Revision**|**Changes**| |---|---|---| |12-May-2009|1|First release| 12/13 Doc ID 15624 Rev 1 **STS10DN3LH5** ## **Please Read Carefully:** Information in this document is provided solely in connection with ST products. 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