# Power MOSFET, N Channel, 1.2 kV, 6 A, 1.65 ohm, TO-220, Through Hole

![Product image](https://novapart.co/image/farnell:3367076/)

**URL**: https://novapart.co/products/STP8N120K5/power-mosfet-n-channel-12-kv-6-a-165-ohm-to-220
**SKU**: STP8N120K5
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €2.8200
**Stock**: 200+
**Lead Time**: 113 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | MDmesh K5 |
| Qualification | - |
| Power Dissipation | 130W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-220 |
| Drain Source Voltage Vds | 1.2kV |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 6A |
| Drain Source On State Resistance | 1.65ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3367076/)

**STP8N120K5** 

## Datasheet 

N-channel 1200 V, 1.65 Ω typ., 6 A, MDmesh K5 Power MOSFET in a TO-220 package 

## **Features** 

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**----- Start of picture text -----**<br>
TAB<br>1  [2 3]<br>TO-220<br>**----- End of picture text -----**<br>


|**Order code**|**VDS**|**RDS(on) max.**|**ID**|**PTOT**|
|---|---|---|---|---|
|STP8N120K5|1200 V|2.00 Ω|6 A|130 W|



- Industry’s lowest RDS(on) x area 

- Industry’s best FoM (figure of merit) 

- Ultra-low gate charge 

- 100% avalanche tested 

- Zener-protected 

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D(2, TAB)<br>G(1)<br>S(3) AM01475V1<br>**----- End of picture text -----**<br>


## **Applications** 

- Switching applications 

## **Description** 

This very high voltage N-channel Power MOSFET is designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. 

## **Product status link** ~~ea~~ 

**Product status link** STP8N120K5 

|**Product summary**<br>~~Saas~~|**Product summary**<br>~~Saas~~|
|---|---|
|**Order code**|STP8N120K5|
|**Marking**|8N120K5|
|**Package**|TO-220|
|**Packing**|Tube|



**DS12529** - **Rev 3** - **May 2018** For further information contact your local STMicroelectronics sales office. 

www.st.com 

**STP8N120K5 Electrical ratings** 

**1** 

## **Electrical ratings** 

## **Table 1. Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VGS|Gate-source voltage|±30|V|
|ID|Drain current (continuous) at TC= 25 °C|6|A|
||Drain current (continuous) at TC= 100 °C|3.5|A|
|IDM(1)|Drain current pulsed|12|A|
|PTOT|Total dissipation at TC= 25 °C|130|W|
|dv/dt(2)|Peak diode recovery voltage slope|4.5|V/ns|
|dv/dt(3)|MOSFET dv/dt ruggedness|50||
|Tj|Operating junction temperature range|-55 to 150|°C|
|Tstg|Storage temperature range|||



_1. Pulse width limited by safe operating area_ 

_2. ISD ≤ 6 A, di/dt ≤ 100 A/μs, VDS peak ≤ V(BR)DSS_ 

_3. VDS ≤ 960 V_ 

## **Table 2. Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistance junction-case|0.96|°C/W|
|Rthj-amb|Thermal resistance junction-ambient|62.5|°C/W|



**Table 3. Avalanche characteristics** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|IAR|Avalanche current, repetitive or not repetitive<br>(pulse width limited by Tjmax)|1.7|A|
|EAS|Single-pulse avalanche energy<br>(starting TJ= 25 °C, ID= IAR, VDD= 50 V)|415|mJ|



**DS12529** - **Rev 3** 

**page 2/13** 

**STP8N120K5 Electrical characteristics** 

## **2 Electrical characteristics** 

TC = 25 °C unless otherwise specified 

**Table 4. On-/off-states** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown voltage|VGS= 0 V, ID= 1 mA|1200|||V|
|IDSS|Zero gate voltage drain current|VGS= 0 V, VDS= 1200 V|||1|µA|
|||VGS= 0 V, VDS= 1200 V<br>TC= 125 °C(1)|||50|µA|
|IGSS|Gate body leakage current|VDS= 0 V, VGS= ±20 V|||±10|µA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 100 µA|3|4|5|V|
|RDS(on)|Static drain-source on-resistance|VGS= 10 V, ID= 2.5 A||1.65|2.00|Ω|



_1. Defined by design, not subject to production test._ 

**Table 5. Dynamic characteristics** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 100 V, VGS= 0 V,<br>f = 1 MHz|-|505|-|pF|
|Coss|Output capacitance||-|44|-|pF|
|Crss|Reverse transfer capacitance||-|0.4|-|pF|
|Co(tr)(1)|Time-related equivalent capacitance|VDS= 0 to 960 V, VGS= 0 V|-|70|-|pF|
|Co(er)(2)|Energy-related equivalent capacitance||-|24|-|pF|
|Rg|Intrinsic gate resistance|f = 1 MHz , ID= 0 A|-|7.7|-|Ω|
|Qg|Total gate charge|VDD= 960 V, ID= 5 A<br>VGS= 0 to 10 V<br>(seeFigure 14. Test circuit for<br>gate charge behavior)|-|13.7|-|nC|
|Qgs|Gate-source charge||-|3.6|-|nC|
|Qgd|Gate-drain charge||-|7.1|-|nC|



_1. Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS._ 

_2. Co(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS._ 

**Table 6. Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delay time|VDD= 600 V, ID= 2.5 A,<br>RG= 4.7 Ω, VGS= 10 V<br>(seeFigure 13. Test circuit for<br>resistive load switching times<br>andFigure 18. Switching time<br>waveform)|-|15.5|-|ns|
|tr|Rise time||-|11|-|ns|
|td(off)|Turn-off delay time||-|40|-|ns|
|tf|Fall time||-|27|-|ns|



**DS12529** - **Rev 3** 

**page 3/13** 

**STP8N120K5 Electrical characteristics** 

## **Table 7. Source-drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain current||-||6|A|
|ISDM(1)|Source-drain current (pulsed)||-||12|A|
|VSD(2)|Forward on voltage|ISD= 5 A, VGS= 0 V|-||1.5|V|
|trr|Reverse recovery time|ISD= 5 A, VDD= 60 V,<br>di/dt = 100 A/µs<br>(seeFigure 15. Test circuit for<br>inductive load switching and<br>diode recovery times)|-|327||ns|
|Qrr|Reverse recovery charge||-|3||µC|
|IRRM|Reverse recovery current||-|18.4||A|
|trr|Reverse recovery time|ISD= 5 A, VDD= 60 V,<br>di/dt = 100 A/µs, Tj= 150 °C<br>(seeFigure 15. Test circuit for<br>inductive load switching and<br>diode recovery times)|-|485||ns|
|Qrr|Reverse recovery charge||-|3.9||µC|
|IRRM|Reverse recovery current||-|16||A|



_1. Pulse width limited by safe operating area._ 

_2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%._ 

## **Table 8. Gate-source Zener diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)GSO|Gate-source breakdown voltage|IGS= ±1 mA, ID= 0 A|±30|-|-|V|



The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry. 

**DS12529** - **Rev 3** 

**page 4/13** 

**STP8N120K5 Electrical characteristics (curves)** 

## **2.1 Electrical characteristics (curves)** 

**Figure 1. Safe operating area** 

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ID GIPG180420181311SOA<br>(A)<br>10  [1 ]<br>tp =10 µs<br>tp =100 µs<br>10  [0 ] tp =1 ms<br>tp =10 ms<br>10  [-1 ] TJ≤150  ° C<br>TC=25 °C<br>VGS=10 V<br>single pulse<br>10  [-2 ]<br>10  [-1 ] 10  [0 ] 10  [1 ] 10  [2 ] 10  [3 ] VDS (V)<br>Operation in this area is<br>limited by R DS(on)<br>**----- End of picture text -----**<br>


**Figure 2. Thermal impedance** 

**==> picture [163 x 158] intentionally omitted <==**

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**----- Start of picture text -----**<br>
Figure 3. Output characteristics Figure 4. Transfer characteristics<br>ID GADG040420181101OCH ID GADG040420181100TCH<br>(A)  (A)<br>VGS = 9, 10 V<br>8 8<br>6 VGS = 8 V 6 VDS = 20 V<br>VGS = 7 V<br>4 4<br>2 2<br>VGS = 6 V<br>0 0<br>0 4 8 12 16 VDS (V) 4 5 6 7 8 VGS (V)<br>**----- End of picture text -----**<br>


**==> picture [513 x 178] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 5. Gate charge vs gate-source voltage Figure 6. Static drain-source on-resistance<br>VGS GIPG180420180911QVG VDS RDS(on) GADG040420181100RID<br>(V)  VDS VDD = 960 V (V)  (Ω)<br>I D  = 5 A<br>16 800 1.85<br>VGS = 10 V<br>12 Qg 600 1.75<br>Qgs Qgd<br>8 400 1.65<br>4 200 1.55<br>0 0 1.45<br>0 4 8 12 16 Qg (nC) 0 1 2 3 4 5 ID (A)<br>**----- End of picture text -----**<br>


**DS12529** - **Rev 3** 

**page 5/13** 

**STP8N120K5 Electrical characteristics (curves)** 

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Figure 8. Normalized gate threshold voltage vs<br>Figure 7. Capacitance variations<br>temperature<br>C  GADG030420180840CVR<br>(pF)  VGS(th) GADG040420181102VTH<br>(norm.)<br>10  [3 ]<br>CISS 1.2<br>10  [2 ]<br>ID = 100 µA<br>1<br>10  [1 ] COSS<br>f = 1 MHz CRSS 0.8<br>10  [0 ]<br>10  [-1 ] 0.6<br>10  [-2 ]<br>10  [-1 ] 10  [0 ] 10  [1 ] 10  [2 ] VDS (V) 0.4<br>-75 -25 25 75 125 Tj (°C)<br>**----- End of picture text -----**<br>


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Figure 9. Normalized on-resistance vs temperature Figure 10. Normalized V(BR)DSS vs temperature<br>RDS(on) GADG040420181103RON V(BR)DSS GADG040420181102BDV<br>(norm.)  (norm.)<br>2.5 1.12<br>1.08<br>2 ID = 1 mA<br>VGS = 10 V<br>1.04<br>1.5<br>1<br>1<br>0.96<br>0.5<br>0.92<br>0 0.88<br>-75 -25 25 75 125 Tj (°C) -75 -25 25 75 125 Tj (°C)<br>**----- End of picture text -----**<br>


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Figure 11. Source-drain diode forward characteristics Figure 12. Maximum avalanche energy vs starting TJ<br>VSD GADG040420181103SDF EAS GADG040420181104EAS<br>(V)  (mJ)<br>Tj = -50 °C<br>0.9 400<br>Single pulse,<br>Tj = 25 °C ID = 1.7 A, VDD = 50 V<br>0.8 300<br>0.7 200<br>Tj = 150 °C<br>0.6 100<br>0.5 0<br>0 1 2 3 4 5 ISD (A) -75 -25 25 75 125 TJ (°C)<br>**----- End of picture text -----**<br>


**DS12529** - **Rev 3** 

**page 6/13** 

**STP8N120K5 Test circuits** 

**3 Test circuits** 

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**----- Start of picture text -----**<br>
Figure 13. Test circuit for resistive load switching times Figure 14. Test circuit for gate charge behavior<br>VDD<br>12 V 47 kΩ<br>1 kΩ<br>100 nF<br>RL 2200 3.3<br>+ μF μF VDD<br>VD VGS IG= CONST 100 Ω D.U.T.<br>VGS RG D.U.T. pulse width 2200 + 2.7 kΩ VG<br>pulse width μF<br>47 kΩ<br>1 kΩ<br>AM01468v1 AM01469v1<br>**----- End of picture text -----**<br>


**==> picture [513 x 184] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 15. Test circuit for inductive load switching and<br>Figure 16. Unclamped inductive load test circuit<br>diode recovery times<br>A A A L<br>G D D.U.T. fastdiode 100 µH VD 2200 3.3<br>25 Ω S B B B D µF3.3 + 1000µF VDD ID + µF µF VDD<br>G D.U.T.<br>+ RG S Vi D.U.T.<br>_ pulse width<br>AM01471v1<br>AM01470v1<br>**----- End of picture text -----**<br>


**==> picture [513 x 172] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 18. Switching time waveform<br>Figure 17. Unclamped inductive waveform<br>V(BR)DSS<br>ton toff<br>VD<br>td(on) tr td(off) tf<br>90% 90%<br>IDM<br>10%<br>ID 0 10% VDS<br>VDD VDD VGS 90%<br>0 10%<br>AM01472v1<br>AM01473v1<br>**----- End of picture text -----**<br>


**DS12529** - **Rev 3** 

**page 7/13** 

**STP8N120K5 Package information** 

**4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: www.st.com. ECOPACK[®] is an ST trademark. 

**DS12529** - **Rev 3** 

**page 8/13** 

**STP8N120K5 TO-220 type A package information** 

## **4.1 TO-220 type A package information** 

**Figure 19. TO-220 type A package outline** 

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**==> picture [61 x 6] intentionally omitted <==**

**----- Start of picture text -----**<br>
0015988_typeA_Rev_21<br>**----- End of picture text -----**<br>


**DS12529** - **Rev 3** 

**page 9/13** 

**STP8N120K5 TO-220 type A package information** 

**Table 9. TO-220 type A package mechanical data** 

|**Di**|**mm**|**mm**|**mm**|
|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|
|A|4.40||4.60|
|b|0.61||0.88|
|b1|1.14||1.55|
|c|0.48||0.70|
|D|15.25||15.75|
|D1||1.27||
|E|10.00||10.40|
|e|2.40||2.70|
|e1|4.95||5.15|
|F|1.23||1.32|
|H1|6.20||6.60|
|J1|2.40||2.72|
|L|13.00||14.00|
|L1|3.50||3.93|
|L20||16.40||
|L30||28.90||
|øP|3.75||3.85|
|Q|2.65||2.95|



**DS12529** - **Rev 3** 

**page 10/13** 

**STP8N120K5** 

## **Revision history** 

**Table 10. Document revision history** 

|**Date**|**Version**|**Changes**|
|---|---|---|
|05-Apr-2018|1|Initial release. The document status is preliminary data.|
|18-Apr-2018|2|ModifiedFigure 1. Safe operating area,Table 5. Dynamic characteristicsand<br>Figure 5. Gate charge vs gate-source voltage.<br>Minor text changes.|
|30-May-2018|3|Document status promoted from preliminary to production data.|



**DS12529** - **Rev 3** 

**page 11/13** 

**STP8N120K5 Contents** 

## **Contents** 

|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2**|
|---|---|
|**2**|**Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3**|
||**2.1**<br>Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5|
|**3**|**Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7**|
|**4**|**Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8**|
||**4.1**<br>TO-220 type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8|
|**Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11**||



**DS12529** - **Rev 3** 

**page 12/13** 

**STP8N120K5** 

## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2018 STMicroelectronics – All rights reserved 

**DS12529** - **Rev 3** 

**page 13/13** 



## Links

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- [Supplier page](https://es.farnell.com/stmicroelectronics/stp8n120k5/mosfet-n-ch-1-2kv-6a-150deg-c/dp/3367076)
---

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