# Power MOSFET, N Channel, 900 V, 20 A, 0.21 ohm, TO-220, Through Hole

![Product image](https://novapart.co/image/farnell:2729680/)

**URL**: https://novapart.co/products/STP20N90K5/power-mosfet-n-channel-900-v-20-a-021-ohm-to-220
**SKU**: STP20N90K5
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €2.7100
**Stock**: 500+
**Lead Time**: 113 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:20A; Drain Source Voltage Vds:900V; On Resistance Rds(on):0.21ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4V; Pow

## Specifications

| Parameter | Value |
|---|---|
| Msl | - |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | MDmesh |
| Qualification | - |
| Power Dissipation | 250W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-220 |
| Drain Source Voltage Vds | 900V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 20A |
| Drain Source On State Resistance | 0.21ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2729680/)

**STP20N90K5** 

Datasheet 

N-channel 900 V, 0.21 Ω typ., 20 A MDmesh™ K5 ‑ Power MOSFET in a TO 220 package 

## **Features** 

**==> picture [106 x 204] intentionally omitted <==**

**----- Start of picture text -----**<br>
TAB<br>e<br>1  [2 3]<br>TO-220<br>D(2, TAB)<br>G(1)<br>S(3) AM01475V1<br>**----- End of picture text -----**<br>


## **Product status link** ~~ea~~ 

**Product status link** STP20N90K5 

|•<br>•|**Order code**<br>**VDS**<br>STP20N90K5<br>900 V<br>Industry’s lowest RDS(on)x area<br>Industry’s best FoM (figure of merit)<br>rs|**RDS(on ) max.**<br>0.25 Ω|**ID**<br>20 A|
|---|---|---|---|



- Ultra-low gate charge 

- 100% avalanche tested 

- Zener-protected 

## **Applications** 

- Switching applications 

## **Description** 

This very high voltage N-channel Power MOSFET is designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. 

|**Product summary**<br>~~Sea~~|**Product summary**<br>~~Sea~~|
|---|---|
|**Order code**|STP20N90K5|
|**Marking**|20N90K5|
|**Package**|TO-220|
|**Packing**|Tube|



**DS11569** - **Rev 4** - **October 2018** For further information contact your local STMicroelectronics sales office. 

www.st.com 

**STP20N90K5 Electrical ratings** 

**1** 

## **Electrical ratings** 

## **Table 1. Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VGS|Gate-source voltage|±30|V|
|ID|Drain current (continuous) at TC= 25 °C|20|A|
|ID|Drain current (continuous) at TC= 100 °C|13|A|
|ID (1)|Drain current (pulsed)|80|A|
|PTOT|Total power dissipation at TC= 25 °C|250|W|
|dv/dt(2)|Peak diode recovery voltage slope|4.5|V/ns|
|dv/dt(3)|MOSFET dv/dt ruggedness|50||
|Tj|Operating junction temperature range|-55 to 150|°C|
|Tstg|Storage temperature range|||



_1. Pulse width limited by safe operating area._ 

_2. ISD ≤ 20A, di/dt ≤ 100 A/μs; VDS peak ≤ V(BR)DSS, VDD= 450 V._ 

_3. VDS ≤ 720 V._ 

## **Table 2. Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistance junction-case|0.5|°C/W|
|Rthj-amb|Thermal resistance junction-ambient|62.5|°C/W|



**Table 3. Avalanche characteristics** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|IAR|Avalanche current, repetitive or not repetitive (pulse width limited by Tjmax)|6.5|A|
|EAS|Single pulse avalanche energy (starting Tj= 25 °C, ID= IAR, VDD= 50 V)|500|mJ|



**DS11569** - **Rev 4** 

**page 2/13** 

**STP20N90K5 Electrical characteristics** 

## **2 Electrical characteristics** 

TC = 25 °C unless otherwise specified 

## **Table 4. On/off-state** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown<br>voltage|VGS= 0 V, ID= 1 mA|900|||V|
|IDSS|Zero gate voltage drain<br>current|VGS= 0 V, VDS= 900 V|||1|µA|
|||VGS= 0 V, VDS= 900 V<br>TC= 125 °C(1)|||50|µA|
|IGSS|Gate body leakage<br>current|VDS= 0 V, VGS= ±20 V|||±10|µA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 100 µA|3|4|5|V|
|RDS(on)|Static drain-source on-<br>resistance|VGS= 10 V, ID= 10 A||0.21|0.25|Ω|



_1. Defined by design, not subject to production test_ 

## **Table 5. Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 100 V, f = 1 MHz,<br>VGS= 0 V|-|1500|-|pF|
|Coss|Output capacitance||-|120|-|pF|
|Crss|Reverse transfer<br>capacitance||-|1|-|pF|
|Co(er) (1)|Equivalent capacitance<br>energy related|VDS= 0 to 720 V,<br>VGS= 0 V|-|78|-|pF|
|Co(tr) (2)|Equivalent capacitance<br>time related|||220|-|pF|
|Rg|Intrinsic gate resistance|f = 1 MHz, ID= 0 A|-|3.7|-|Ω|
|Qg|Total gate charge|VDD= 720 V, ID= 20 A<br>VGS= 0 to 10 V<br>(seeFigure 14. Test circuit for<br>gate charge behavior)|-|40|-|nC|
|Qgs|Gate-source charge||-|14|-|nC|
|Qgd|Gate-drain charge||-|17|-|nC|



_1. Co(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS._ 

_2. Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS._ 

**DS11569** - **Rev 4** 

**page 3/13** 

**STP20N90K5 Electrical characteristics** 

**Table 6. Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delay time|VDD= 450 V, ID= 10 A,<br>RG= 4.7 Ω<br>VGS= 10 V<br>(seeFigure 13. Test circuit for<br>resistive load switching timesand<br>Figure 18. Switching time<br>waveform)|-|20.2|-|ns|
|tr|Rise time||-|13.5|-|ns|
|td(off)|Turn-off delay time||-|64.7|-|ns|
|tf|Fall time||-|16|-|ns|



**Table 7. Source-drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain current||-||20|A|
|ISDM (1)|Source-drain current<br>(pulsed)||-||80|A|
|VSD (2)|Forward on voltage|ISD= 20 A, VGS= 0 V|-||1.5|V|
|trr|Reverse recovery time|ISD= 20 A, di/dt = 100 A/µs,<br>VDD= 60 V<br>(seeFigure 15. Test circuit for<br>inductive load switching and<br>diode recovery times)|-|517||ns|
|Qrr|Reverse recovery charge||-|11.4||µC|
|IRRM|Reverse recovery current||-|44||A|
|trr|Reverse recovery time|ISD= 20 A, di/dt = 100 A/µs<br>VDD= 60 V,<br>Tj= 150 °C<br>(seeFigure 15. Test circuit for<br>inductive load switching and<br>diode recovery times)|-|674||ns|
|Qrr|Reverse recovery charge||-|14||µC|
|IRRM|Reverse recovery current||-|41.6||A|



_1. Pulse width limited by safe operating area_ 

_2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%_ 

## **Table 8. Gate-source Zener diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V( BR)GSO|Gate-source breakdown voltage|IGS= ±1 mA, ID= 0 A|30|-|-|V|



The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection,thus eliminating the need for additional external componentry. 

**DS11569** - **Rev 4** 

**page 4/13** 

**STP20N90K5 Electrical characteristics curves** 

## **2.1 Electrical characteristics curves** 

**Figure 1. Safe operating area** 

**==> picture [169 x 135] intentionally omitted <==**

**----- Start of picture text -----**<br>
I D GIPG301120161112SOA<br>(A)<br>10  [1] t p =10 µs<br>t p =100 µs<br>t p =1 ms<br>10  [0] t p =10 ms<br>single pulseTT j c≤150 °C= 25 ° C<br>10  [-1]<br>10  [-1] 10  [0] 10  [1] 10  [2] V DS (V)<br>Operation in this area is<br>limited by R DS(on)<br>**----- End of picture text -----**<br>


**Figure 2. Thermal impedance** 

**==> picture [132 x 127] intentionally omitted <==**

**==> picture [513 x 163] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 3. Output characteristics Figure 4. Transfer characteristics<br>I D GIPG291120161015OCH I D GIPG291120161014TCH<br>(A) (A)<br>V GS =10, 11 V<br>50 50<br>V DS = 20 V<br>40 40<br>V GS =9 V<br>30 30<br>V GS =8 V<br>20 20<br>10 10<br>V GS =7 V<br>0 V GS =6 V 0<br>0 4 8 12 16 V DS (V) 5 6 7 8 9 10 V GS (V)<br>**----- End of picture text -----**<br>


**==> picture [513 x 165] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 5. Normalized V(BR)DSS vs temperature Figure 6. Static drain-source on-resistance<br>V (BR)DSS GIPG291120161015BDV R DS(on) GIPG291120161014RID<br>(norm.) (Ω)<br>1.12 I D = 1 mA 0.23 V GS =10 V<br>1.08<br>0.22<br>1.04<br>0.21<br>1.00<br>0.20<br>0.96<br>0.19<br>0.92<br>0.88 0.18<br>-50 0 50 100 T j (°C) 0 5 10 15 I D (A)<br>**----- End of picture text -----**<br>


**DS11569** - **Rev 4** 

**page 5/13** 

**STP20N90K5 Electrical characteristics curves** 

**==> picture [513 x 173] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 7. Gate charge vs gate-source voltage Figure 8. Capacitance variation<br>V GS GIPG291120161013QVG V DS C  GIPG291120161011CVR<br>(V) (V) (pF)<br>14 V DS 700<br>12 V I DDD = 20 A = 720 V 600 10  [4]<br>10 500 C ISS<br>10  [3]<br>8 400<br>10  [2]<br>6 300<br>f = 1 MHz C OSS<br>4 200<br>10  [1] C RSS<br>2 100<br>0 0 10  [0]<br>0 10 20 30 40 Q g (nC) 10  [-1] 10  [0] 10  [1] 10  [2] V DS (V)<br>**----- End of picture text -----**<br>


**==> picture [513 x 183] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 9. Normalized gate threshold voltage vs<br>Figure 10. Normalized on-resistance vs temperature<br>temperature<br>V GS(th) GIPG291120161016VTH R (norm.)DS(on) GIPG291120161017RON<br>(norm.)<br>1.2 I D = 100 µA 2.6 V GS = 10 V<br>2.2<br>1.0<br>1.8<br>0.8<br>1.4<br>0.6 1.0<br>0.4 0.6<br>0.2<br>0.2-50 0 50 100 T j (°C) -50 0 50 100 T j (°C)<br>**----- End of picture text -----**<br>


**==> picture [513 x 178] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 11. Maximum avalanche energy vs. starting TJ Figure 12. Source-drain diode forward characteristics<br>E AS GIPG291120161018EAS VSD GIPD280920181027SDF<br>(mJ) (V)<br>1.1<br>500<br>400 Single pulse 1 Tj = -50 °C<br>I D = 6.5 A 0.9<br>300 V  DD  = 50 V 0.8 Tj = 25 °C<br>0.7<br>200 Tj = 150 °C<br>0.6<br>100<br>0.5<br>0 0.4<br>-50 -25 0 25 50 75 100 125 T J (°C) 5 10 15 ISD (A)<br>**----- End of picture text -----**<br>


**DS11569** - **Rev 4** 

**page 6/13** 

**STP20N90K5 Test circuits** 

**3 Test circuits** 

**==> picture [513 x 195] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 13. Test circuit for resistive load switching times<br>Figure 14. Test circuit for gate charge behavior<br>VDD<br>RL<br>RL 2200 3.3<br>+ μF μF VDD<br>VD VGS IG= CONST 100 Ω D.U.T.<br>VGS RG D.U.T. pulse width 2200 + 2.7 kΩ VG<br>pulse width μF<br>47 kΩ<br>1 kΩ<br>AM01469v10<br>AM01468v1<br>**----- End of picture text -----**<br>


**==> picture [513 x 189] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 15. Test circuit for inductive load switching and<br>Figure 16. Unclamped inductive load test circuit<br>diode recovery times<br>A A A L<br>G D D.U.T. fastdiode 100 µH VD 2200 3.3<br>25 Ω S B B B D µF3.3 + 1000µF VDD ID + µF µF VDD<br>G D.U.T.<br>+ RG S Vi D.U.T.<br>_ pulse width<br>AM01471v1<br>AM01470v1<br>**----- End of picture text -----**<br>


**==> picture [513 x 178] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 18. Switching time waveform<br>Figure 17. Unclamped inductive waveform<br>ton toff<br>V(BR)DSS td(on) tr td(off) tf<br>VD<br>90% 90%<br>IDM<br>10% VDS 10%<br>ID 0<br>VDD VDD<br>VGS 90%<br>AM01472v1 0 10%<br>AM01473v1<br>**----- End of picture text -----**<br>


**DS11569** - **Rev 4** 

**page 7/13** 

**STP20N90K5 Package information** 

**4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: www.st.com. ECOPACK[®] is an ST trademark. 

**DS11569** - **Rev 4** 

**page 8/13** 

**STP20N90K5 TO-220 type A package information** 

## **4.1 TO-220 type A package information** 

**Figure 19. TO-220 type A package outline** 

**==> picture [305 x 434] intentionally omitted <==**

**==> picture [61 x 6] intentionally omitted <==**

**----- Start of picture text -----**<br>
0015988_typeA_Rev_21<br>**----- End of picture text -----**<br>


**DS11569** - **Rev 4** 

**page 9/13** 

**STP20N90K5 TO-220 type A package information** 

**Table 9. TO-220 type A package mechanical data** 

|**Di**|**mm**|**mm**|**mm**|
|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|
|A|4.40||4.60|
|b|0.61||0.88|
|b1|1.14||1.55|
|c|0.48||0.70|
|D|15.25||15.75|
|D1||1.27||
|E|10.00||10.40|
|e|2.40||2.70|
|e1|4.95||5.15|
|F|1.23||1.32|
|H1|6.20||6.60|
|J1|2.40||2.72|
|L|13.00||14.00|
|L1|3.50||3.93|
|L20||16.40||
|L30||28.90||
|øP|3.75||3.85|
|Q|2.65||2.95|



**DS11569** - **Rev 4** 

**page 10/13** 

**STP20N90K5** 

## **Revision history** 

## **Table 10. Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|10-May-2016|1|First release.|
|01-Dec-2016|2|Modified: title and RDS(on)value in cover page<br>Modified_Table 4: "Avalanche characteristics", Table 5: "On/off-state", Table 6: "Dynamic",_<br>_Table 7: "Switching times" and Table 8: "Sourcedrain diode"_<br>Added_Section 2.1: "Electrical characteristics (curves)"_<br>Modified_Section 3: "Test circuits"_<br>Datasheet promoted from preliminary data to production data<br>Minor text changes|
|24-Jan-2017|3|Modified Table 6: "Dynamic".<br>Minor text changes.|
|05-Oct-2018|4|Removed maturity status indication from cover page.<br>AddedFigure 12. Source-drain diode forward characteristics.<br>Minor text changes.|



**DS11569** - **Rev 4** 

**page 11/13** 

**STP20N90K5 Contents** 

## **Contents** 

|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2**|
|---|---|
|**2**|**Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3**|
||**2.1**<br>Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5|
|**3**|**Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7**|
|**4**|**Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8**|
||**4.1**<br>TO-220 type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8|
|**Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11**||



**DS11569** - **Rev 4** 

**page 12/13** 

**STP20N90K5** 

## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2018 STMicroelectronics – All rights reserved 

**DS11569** - **Rev 4** 

**page 13/13** 



## Links

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- [Supplier page](https://es.farnell.com/stmicroelectronics/stp20n90k5/mosfet-n-ch-900v-20a-to-220-3/dp/2729680)
---

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