# Power MOSFET, N Channel, 600 V, 14 A, 0.18 ohm, TO-220, Through Hole

![Product image](https://novapart.co/image/farnell:1889361/)

**URL**: https://novapart.co/products/STP18N55M5/power-mosfet-n-channel-600-v-14-a-018-ohm-to-220
**SKU**: STP18N55M5
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.0500
**Stock**: 10+

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:14A; Drain Source Voltage Vds:600V; On Resistance Rds(on):0.18ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4V; Power

## Specifications

| Parameter | Value |
|---|---|
| Msl | - |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 90W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-220 |
| Drain Source Voltage Vds | 600V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 14A |
| Drain Source On State Resistance | 0.18ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:1889361/)

**STD18N55M5, STP18N55M5** 

## Datasheet 

N-channel 550 V, 0.150 Ω typ., 16 A MDmesh M5 Power MOSFETs in a DPAK 

and TO-220 packages 

## **Features** 

**==> picture [129 x 185] intentionally omitted <==**

**----- Start of picture text -----**<br>
TAB<br>TAB<br>2 3<br>1<br>DPAK TO-220 1 [2 3]<br>D(2, TAB)<br>G(1)<br>S(3)<br>AM01475v1_noZen<br>**----- End of picture text -----**<br>


|**Order code**|**VDS @**<br>**Tjmax.**|**RDS(on)max.**|**Package**|
|---|---|---|---|
|STD18N55M5|600 V|0.192 Ω|DPAK|
|STP18N55M5|||TO-220|



- Extremely low RDS(on) 

- Low gate charge and input capacitance 

- Excellent switching performance 

- 100% avalanche tested 

## **Applications** 

- Switching applications 

## **Description** 

These devices are N-channel Power MOSFETs based on the MDmesh M5 innovative vertical process technology combined with the well-known PowerMESH horizontal layout. The resulting products offer extremely low on-resistance, making them particularly suitable for applications requiring high power and superior efficiency. 

## **Product status link** 

STD18N55M5 STP18N55M5 

**DS6705** - **Rev 5** - **March 2021** For further information contact your local STMicroelectronics sales office. 

www.st.com 

**STD18N55M5, STP18N55M5 Electrical ratings** 

## **1** 

## **Electrical ratings** 

**Table 1. Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VGS|Gate-source voltage|±25|V|
|ID|Drain current (continuous) at TC= 25 °C|16|A|
|ID|Drain current (continuous) at TC= 100 °C|10|A|
|IDM (1)|Drain current (pulsed)|64|A|
|PTOT|Total power dissipation at TC= 25 °C|110|W|
|dv/dt(2)|Peak diode recovery voltage slope|15|V/ns|
|Tj|Operating junction temperature range|-55 to 150|°C|
|Tstg|Storage temperature range|||



_1. Pulse width limited by safe operating area._ 

_2. ISD ≤ 16 A, di/dt ≤ 400 A/μs; VDS peak < V(BR)DSS, VDD = 340 V._ 

## **Table 2. Thermal data** 

|**Sbl**|**Pt**|**Value**|**Value**|**Uit**|
|---|---|---|---|---|
|**ymo**|**arameer**|**DPAK**|**TO-220**|**n**|
|RthJC|Thermal resistance, junction-to-case|1.14||°C/W|
|RthJA|Thermal resistance, junction-to-ambient||62.5|°C/W|
|RthJB (1)|Thermal resistance, junction-to-board|50||°C/W|



_1. When mounted on an 1-inch² FR-4, 2oz Cu board._ 

**Table 3. Avalanche characteristics** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|IAR|Avalanche current, repetitive or not-repetitive<br>(pulse width limited by TjMax)|4|A|
|EAS|Single pulse avalanche energy<br>(starting Tj= 25 °C, ID= IAR, VDD= 50 V)|210|mJ|



**DS6705** - **Rev 5** 

**page 2/21** 

**STD18N55M5, STP18N55M5 Electrical characteristics** 

## **2 Electrical characteristics** 

(TCASE = 25 °C unless otherwise specified) 

**Table 4. On/off states** 

|**Symbol**|**Parameter**|**Test condition**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source<br>Breakdown voltage|ID= 1 mA, VGS= 0 V|550|||V|
|IDSS|Zero gate voltage drain<br>current|VGS= 0 V, VDS= 550 V|||1|µA|
|||VGS= 0 V, VDS= 550 V,<br>TC= 125 °C(1)|||100|µA|
|IGSS|Gate body leakage current|VDS= 0 V, VGS= ±25 V|||±100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|3|4|5|V|
|RDS(on)|Static drain-source on<br>resistance|VGS= 10 V, ID= 8 A||0.150|0.192|Ω|



_1. Defined by design, not subject to production test._ 

**Table 5. Dynamic** 

|**Symbol**|**Parameter**|**Test condition**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 100 V,<br>f = 1 MHz, VGS= 0 V|-|1260|-|pF|
|Coss|Output capacitance|||42|||
|Crss|Reverse transfer capacitance|||3.6|||
|Co(tr) (1)|Equivalent capacitance time<br>related|VDS= 0 to 440 V, VGS= 0 V|-|103|-|pF|
|Co(er) (2)|Equivalent capacitance<br>energy related||-|35|-|pF|
|Rg|Gate input resistance|f = 1 MHz open drain|-|2.8|-|Ω|
|Qg|Total gate charge|VDD= 440 V, ID= 8 A,<br>VGS= 0 to 10 V<br>(seeFigure 18. Test circuit for<br>gate charge behavior)|-|31|-|nC|
|Qgs|Gate-source charge|||8.3|||
|Qgd|Gate-drain charge|||14.2|||



_1. Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS._ 

_2. Energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS._ 

**Table 6. Switching times** 

|**Symbol**|**Parameter**|**Test condition**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(v)|Voltage delay time|VDD= 400 V, ID= 10.5 A,<br>RG= 4.7 Ω, VGS= 10 V<br>(seeFigure 19. Test circuit<br>for inductive load switching<br>and diode recovery timesand<br>Figure 22. Switching time<br>waveform)|-|37|-|ns|
|tr(v)|Voltage rise time|||7|||
|tc(off)|Crossing time|||10.3|||
|tf(i)|Current fall time|||8.3|||



**DS6705** - **Rev 5** 

**page 3/21** 

**STD18N55M5, STP18N55M5 Electrical characteristics** 

## **Table 7. Source drain diode** 

|**Symbol**|**Parameter**|**Test condition**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain current||-||16|A|
|ISDM (1)|Source-drain current (pulsed)||||64||
|VSD (2)|Forward on voltage|ISD= 16 A, VGS= 0 V|-||1.5|V|
|trr|Reverse recovery time|ISD= 16 A, di/dt = 100 A/µs<br>VDD= 100 V<br>(seeFigure 19. Test circuit for<br>inductive load switching and<br>diode recovery times)|-|244||ns|
|Qrr|Reverse recovery charge|||2.8||μC|
|IRRM|Reverse recovery current|||23||A|
|trr|Reverse recovery time|ISD= 16 A, di/dt = 100 A/µs<br>VDD= 100 V, Tj = 150 °C<br>(seeFigure 19. Test circuit for<br>inductive load switching and<br>diode recovery times)|-|295||ns|
|Qrr|Reverse recovery charge|||3.7||μC|
|IRRM|Reverse recovery current|||25||A|



_1. Pulse width limited by safe operating area._ 

_2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%._ 

**DS6705** - **Rev 5** 

**page 4/21** 

**STD18N55M5, STP18N55M5 Electrical characteristics curves** 

## **2.1 Electrical characteristics curves** 

**Figure 1. Safe operating area for DPAK** 

**==> picture [182 x 152] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM16074v1<br>ID<br>(A)<br>10µs<br>10<br>100µs<br>1 1ms<br>Tj=150°C 10ms<br>Tc=25°C<br>Single pulse<br>0.1<br>0.1 1 10 100 VDS(V)<br>DS(on)<br>Operation in this area is<br>Limited by max R<br>**----- End of picture text -----**<br>


**==> picture [167 x 9] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 2. Thermal impedance for DPAK<br>**----- End of picture text -----**<br>


**==> picture [165 x 154] intentionally omitted <==**

**----- Start of picture text -----**<br>
K GC20460<br>10 [0]<br>10 [-1]<br>10 [-2]<br>10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] tp (s)<br>**----- End of picture text -----**<br>


**==> picture [513 x 193] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 4. Thermal impedance for TO-220<br>Figure 3. Safe operating area for TO-220<br>ID AM16073v1<br>(A)<br>10  10µs<br>100µs<br>1ms<br>1<br>10ms Zth = k*RthJC<br>Tc=25°C Tj=150°C  δ = t p /t<br>Single pulse<br>0.1  tp<br>0.1  1  10  100  VDS(V)  t<br>DS(on)<br>Operation in this area is<br>Limited by max R<br>**----- End of picture text -----**<br>


**Figure 5. Output characterisics** 

**==> picture [188 x 160] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM16076v1<br>ID (A)<br>VGS=9, 10V<br>8V<br>30<br>7V<br>20<br>10<br>6V<br>0<br>0  5  10  15  20  25 VDS(V)<br>**----- End of picture text -----**<br>


**Figure 6. Transfer characteristics** 

**==> picture [187 x 160] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM16077v1<br>ID (A)<br>VDS=25V<br>35<br>30<br>25<br>20<br>15<br>10<br>5<br>0<br>3  4  5  6  7  8  9  VGS(V)<br>**----- End of picture text -----**<br>


**DS6705** - **Rev 5** 

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**STD18N55M5, STP18N55M5 Electrical characteristics curves** 

**Figure 7. Gate charge vs gate-source voltage** 

**==> picture [193 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM16078v1<br>VGS<br>VDS<br>(V)<br>VDS VDD=440V  (V)<br>12<br>I D =8A<br>400<br>10<br>350<br>300<br>8<br>250<br>6<br>200<br>4  150<br>100<br>2<br>50<br>0  0<br>0  5  10  15  20  25  30  35  Qg(nC)<br>**----- End of picture text -----**<br>


**Figure 9. Capacitance variations** 

**==> picture [200 x 168] intentionally omitted <==**

**----- Start of picture text -----**<br>
C  AM16080v1<br>(pF)<br>10000<br>Ciss<br>1000<br>100<br>Coss<br>10<br>Crss<br>1<br>0.1  1  10  100  VDS(V)<br>**----- End of picture text -----**<br>


**Figure 11.  Normalized gate threshold voltage vs temperature** 

**==> picture [203 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGS(th) AM05459v1<br>(norm)  VDS = VGS<br>1.10  ID = 250 µA<br>1.00<br>0.90<br>0.80<br>0.70<br>-50  -25  0  25  50  75  100 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 8. Static drain-source on resistance** 

**==> picture [205 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM16079v1<br>RDS(on)<br>(Ω)  VGS=10V<br>0.18<br>0.17<br>0.16<br>0.15<br>0.14<br>0.13<br>0.12<br>0  2  4  6  8  10  12  14  ID(A)<br>**----- End of picture text -----**<br>


**Figure 10. Output capacitance stored energy** 

**==> picture [202 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM16081v1<br>Eoss (µJ)<br>5<br>4<br>3<br>2<br>1<br>0<br>0  100  200  300  400  500 VDS(V)<br>**----- End of picture text -----**<br>


**Figure 12. Normalized on-resistance vs temperature** 

**==> picture [200 x 168] intentionally omitted <==**

**----- Start of picture text -----**<br>
RDS(on) AM05460v1<br>(norm)  VGS = 10 V<br>2.1 ID = 8 A<br>1.9<br>1.7<br>1.5<br>1.3<br>1.1<br>0.9<br>0.7<br>0.5<br>-50  -25  0  25  50  75  100  TJ(°C)<br>**----- End of picture text -----**<br>


**DS6705** - **Rev 5** 

**page 6/21** 

**STD18N55M5, STP18N55M5 Electrical characteristics curves** 

**==> picture [513 x 200] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 13. Drain-source diode forward characteristics Figure 14. Normalized V(BR)DSS vs temperature<br>AM05461v1 AM10399v1<br>VSD VDS<br>(V)  TJ=-50°C<br>1.08<br>1.2 ID = 1mA<br>1.06<br>1.0<br>1.04<br>0.8  1.02<br>TJ=25°C<br>1.00<br>0.6<br>TJ=150°C<br>0.98<br>0.4<br>0.96<br>0.2<br>0.94<br>0  0.92<br>0  10  20  30  40  50  ISD(A)  -50  -25  0  25  50  75  100  TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 15.  Switching energy vs gate resistance** 

**==> picture [210 x 181] intentionally omitted <==**

**----- Start of picture text -----**<br>
E  AM16082v1<br>(µJ) ID=10.5A  Eon<br>VDD=440V<br>VGS=10V<br>150<br>100<br>Eoff<br>50<br>0<br>0  10  25 30 35 40 RG [(Ω)]<br>* Eon including reverse recovery of a SiC diode<br>**----- End of picture text -----**<br>


**DS6705** - **Rev 5** 

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**STD18N55M5, STP18N55M5 Test circuits** 

## **3 Test circuits** 

**==> picture [513 x 195] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 16. Test circuit for resistive load switching times Figure 17. Test circuit for gate charge behavior<br>VDD<br>12 V 47 kΩ<br>1 kΩ<br>100 nF<br>RL 2200 3.3<br>+ μF μF VDD<br>VD VGS IG= CONST 100 Ω D.U.T.<br>VGS RG D.U.T. pulse width + 2.7 kΩ<br>2200 VG<br>pulse width μF<br>47 kΩ<br>1 kΩ<br>AM01468v1 AM01469v1<br>**----- End of picture text -----**<br>


**==> picture [513 x 206] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 18. Test circuit for inductive load switching and<br>Figure 19. Unclamped inductive load test circuit<br>diode recovery times<br>A A A L<br>G D D.U.T. fastdiode 100 µH VD 2200 3.3<br>25 Ω S B B B D µF3.3 + 1000µF VDD ID + µF µF VDD<br>G D.U.T.<br>+ RG S<br>Vi D.U.T.<br>_ pulse width<br>AM01471v1<br>AM01470v1<br>**----- End of picture text -----**<br>


**==> picture [513 x 183] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 20. Unclamped inductive waveform Figure 21. Switching time waveform<br>V(BR)DSS ID VDS<br>VD 90%VDS 90%ID<br>IDM<br>VGS<br>90%VGS<br>ID<br>VDD VDD 10%VDS 10%ID<br>VDS tr tf ID<br>td(V) tc(off)<br>AM01472v1 AM05540v2<br>**----- End of picture text -----**<br>


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**STD18N55M5, STP18N55M5 Package information** 

## **4** 

## **Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 

## **4.1 DPAK (TO-252) type A2 package information** 

**Figure 22. DPAK (TO-252) type A2 package outline** 

**==> picture [63 x 7] intentionally omitted <==**

**----- Start of picture text -----**<br>
0068772_type-A2_rev30<br>**----- End of picture text -----**<br>


**DS6705** - **Rev 5** 

**page 9/21** 

**STD18N55M5, STP18N55M5 DPAK (TO-252) type A2 package information** 

**Table 8. DPAK (TO-252) type A2 mechanical data** 

|**Di**|**mm**|**mm**|**mm**|
|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|
|A|2.20||2.40|
|A1|0.90||1.10|
|A2|0.03||0.23|
|b|0.64||0.90|
|b4|5.20||5.40|
|c|0.45||0.60|
|c2|0.48||0.60|
|D|6.00||6.20|
|D1|4.95|5.10|5.25|
|E|6.40||6.60|
|E1|5.10|5.20|5.30|
|e|2.159|2.286|2.413|
|e1|4.445|4.572|4.699|
|H|9.35||10.10|
|L|1.00||1.50|
|L1|2.60|2.80|3.00|
|L2|0.65|0.80|0.95|
|L4|0.60||1.00|
|R||0.20||
|V2|0°||8°|



**DS6705** - **Rev 5** 

**page 10/21** 

**STD18N55M5, STP18N55M5 DPAK (TO-252) type C2 package information** 

## **4.2 DPAK (TO-252) type C2 package information** 

**Figure 23. DPAK (TO-252) type C2 package outline** 

**==> picture [33 x 33] intentionally omitted <==**

**==> picture [67 x 6] intentionally omitted <==**

**----- Start of picture text -----**<br>
0068772_type-C2_rev30<br>**----- End of picture text -----**<br>


**DS6705** - **Rev 5** 

**page 11/21** 

**STD18N55M5, STP18N55M5 DPAK (TO-252) type C2 package information** 

**Table 9. DPAK (TO-252) type C2 mechanical data** 

|**Di**|**mm**|**mm**|**mm**|
|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|
|A|2.20|2.30|2.38|
|A1|0.90|1.01|1.10|
|A2|0.00||0.10|
|b|0.72||0.85|
|b4|5.13|5.33|5.46|
|c|0.47||0.60|
|c2|0.47||0.60|
|D|6.00|6.10|6.20|
|D1|5.10||5.60|
|E|6.50|6.60|6.70|
|E1|5.20||5.50|
|e|2.186|2.286|2.386|
|H|9.80|10.10|10.40|
|L|1.40|1.50|1.70|
|L1|2.90 REF|||
|L2|0.90||1.25|
|L3|0.51 BSC|||
|L4|0.60|0.80|1.00|
|L6|1.80 BSC|||
|θ1|5°|7°|9°|
|θ2|5°|7°|9°|
|V2|0°||8°|



**DS6705** - **Rev 5** 

**page 12/21** 

**STD18N55M5, STP18N55M5 DPAK (TO-252) type C2 package information** 

**Figure 24. DPAK (TO-252) recommended footprint (dimensions are in mm)** 

**==> picture [155 x 276] intentionally omitted <==**

**==> picture [45 x 6] intentionally omitted <==**

**----- Start of picture text -----**<br>
FP_0068772_30<br>**----- End of picture text -----**<br>


**DS6705** - **Rev 5** 

**page 13/21** 

**STD18N55M5, STP18N55M5 DPAK (TO-252) packing information** 

## **4.3 DPAK (TO-252) packing information** 

## **Figure 25. DPAK (TO-252) tape outline** 

**==> picture [367 x 145] intentionally omitted <==**

**----- Start of picture text -----**<br>
10 pitches cumulative<br>tolerance on tape +/- 0.2 mm<br>Top cover P0 D P2<br>T tape<br>E<br>F<br>| pees cedoo s es<br>K0 W<br>B1 B0<br>f t PEIIILIEalataraItetEH<br>For machine ref. only A0 P1 D1<br>including draft and<br>radii concentric around B0<br>User direction of feed<br>**----- End of picture text -----**<br>


**==> picture [5 x 5] intentionally omitted <==**

**----- Start of picture text -----**<br>
R<br>**----- End of picture text -----**<br>


**==> picture [39 x 7] intentionally omitted <==**

**----- Start of picture text -----**<br>
Bending radius<br>**----- End of picture text -----**<br>


**==> picture [52 x 6] intentionally omitted <==**

**----- Start of picture text -----**<br>
User direction of feed<br>**----- End of picture text -----**<br>


AM08852v1 

**DS6705** - **Rev 5** 

**page 14/21** 

**STD18N55M5, STP18N55M5 DPAK (TO-252) packing information** 

**Figure 26. DPAK (TO-252) reel outline** 

**==> picture [426 x 273] intentionally omitted <==**

**----- Start of picture text -----**<br>
T<br>40mm min.<br>access hole<br>at slot location<br>B<br>D<br>C<br>N<br>A<br>Tape slot  G measured<br>in core for  at hub<br>Full radius  tape start<br>2.5mm min.width<br>AM06038v1<br>**----- End of picture text -----**<br>


**Table 10. DPAK (TO-252) tape and reel mechanical data** 

||**Tape**|**Tape**||**Reel**|**Reel**|
|---|---|---|---|---|---|
|**Di**|**mm**||**Di**|**mm**||
|**m.**|**Min.**|**Max.**|**m.**|**Min.**|**Max.**|
|A0|6.8|7|A||330|
|B0|10.4|10.6|B|1.5||
|B1||12.1|C|12.8|13.2|
|D|1.5|1.6|D|20.2||
|D1|1.5||G|16.4|18.4|
|E|1.65|1.85|N|50||
|F|7.4|7.6|T||22.4|
|K0|2.55|2.75||||
|P0|3.9|4.1|Base qty.||2500|
|P1|7.9|8.1|Bulk qty.||2500|
|P2|1.9|2.1||||
|R|40|||||
|T|0.25|0.35||||
|W|15.7|16.3||||



**DS6705** - **Rev 5** 

**page 15/21** 

**STD18N55M5, STP18N55M5 TO-220 type A package information** 

## **4.4 TO-220 type A package information** 

**Figure 27. TO-220 type A package outline** 

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**==> picture [65 x 6] intentionally omitted <==**

**----- Start of picture text -----**<br>
0015988_typeA_Rev_23<br>**----- End of picture text -----**<br>


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**STD18N55M5, STP18N55M5 TO-220 type A package information** 

## **Table 11. TO-220 type A package mechanical data** 

|**Di**|**mm**|**mm**|**mm**|
|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|
|A|4.40||4.60|
|b|0.61||0.88|
|b1|1.14||1.55|
|c|0.48||0.70|
|D|15.25||15.75|
|D1||1.27||
|E|10.00||10.40|
|e|2.40||2.70|
|e1|4.95||5.15|
|F|1.23||1.32|
|H1|6.20||6.60|
|J1|2.40||2.72|
|L|13.00||14.00|
|L1|3.50||3.93|
|L20||16.40||
|L30||28.90||
|øP|3.75||3.85|
|Q|2.65||2.95|
|Slug flatness||0.03|0.10|



**DS6705** - **Rev 5** 

**page 17/21** 

**STD18N55M5, STP18N55M5 Ordering information** 

## **5 Ordering information** 

**Table 12. Order codes** 

|**Order code**|**Marking**|**Package**|**Packing**|
|---|---|---|---|
|STD18N55M5|18N55M5|DPAK|Tape and reel|
|STP18N55M5||TO-220|Tube|



**DS6705** - **Rev 5** 

**page 18/21** 

**STD18N55M5, STP18N55M5** 

## **Revision history** 

**Table 13. Document revision history** 

|**Date**|**Version**|**Changes**|
|---|---|---|
|09-Feb-2010|1|First release.|
|04-Mar-2011|2|– Document status promoted from preliminary data to datasheet;<br>– Added new package, mechanical data: D²PAK.|
|22-Nov-2013|3|– Updated: title on the cover page and RDS(on) values.<br>– Modified: EAS value and note 3 in Table 2<br>– Modified: RDS(on) value in Table 4, typical values in Table 5 and 7<br>– Updated: the entire Table 5<br>– Added: Section 2.1: Electrical characteristics (curves)<br>– Updated: Section 4: Package mechanical data and Section 5:<br>Packaging mechanical data<br>– Updated: Figure 11 and 18<br>– Minor text changes.|
|03-Aug-2018|4|The part numbers STB18N55M5 and STF18N55M5 have been moved to a<br>separate datasheet.<br>Removed maturity status indication from cover page. The document status is<br>production data.<br>Updated title in cover page, Section 1 Electrical ratings, Section 2 Electrical<br>characteristics and Section 4 Package information.<br>Minor text changes.|
|24-Mar-2020|5|Updated title onFigure 12.  Normalized gate threshold voltage vs temperature<br>andFigure 13. Normalized on-resistance vs temperature.<br>UpdatedSection  4  Package information.<br>Minor text changes.|



**DS6705** - **Rev 5** 

**page 19/21** 

**STD18N55M5, STP18N55M5 Contents** 

## **Contents** 

|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2**|
|---|---|---|
|**2**|**Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3**||
||**2.1**|Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5|
|**3**|**Test**|**circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8**|
|**4**|**Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9**||
||**4.1**|DPAK (TO-252) type A2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9|
||**4.2**|DPAK (TO-252) type C2 package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11|
||**4.3**|DPAK (TO-252) packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14|
||**4.4**|TO-220 type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16|
|**5**|**Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18**||
|**Revision**||**history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19**|



**DS6705** - **Rev 5** 

**page 20/21** 

**STD18N55M5, STP18N55M5** 

## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2021 STMicroelectronics – All rights reserved 

**DS6705** - **Rev 5** 

**page 21/21** 



## Links

- [View this product on Novapart](https://novapart.co/products/STP18N55M5/power-mosfet-n-channel-600-v-14-a-018-ohm-to-220)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/stmicroelectronics/stp18n55m5/mosfet-n-ch-550v-13a-to-220/dp/1889361)
---

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