# Power MOSFET, N Channel, 60 V, 4 A, 0.07 ohm, SOT-223, Surface Mount

![Product image](https://novapart.co/image/farnell:2849658/)

**URL**: https://novapart.co/products/STN4NF06L/power-mosfet-n-channel-60-v-4-a-007-ohm-sot-223
**SKU**: STN4NF06L
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.2500
**Stock**: 1000+
**Lead Time**: 127 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:4A; Drain Source Voltage Vds:60V; On Resistance Rds(on):0.07ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:2.8V; Power

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | STripFET II |
| Qualification | - |
| Power Dissipation | 3.3W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | SOT-223 |
| Drain Source Voltage Vds | 60V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 4A |
| Drain Source On State Resistance | 0.07ohm |
| Gate Source Threshold Voltage Max | 2.8V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2849658/)

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## **STN4NF06L** N-channel 60 V, 0.07 Ω, 4 A SOT-223 STripFET™ II Power MOSFET 

## **Features** 

|**Order code**|**VDSS**|**RDS(on)**max|**ID**|
|---|---|---|---|
|STN4NF06L|60 V|< 0.1Ω|4 A|



- Exceptional dv/dt capability 

- Avalanche rugged technology 

- 100% avalanche tested 

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2<br>3<br>2<br>1<br>SOT-223<br>**----- End of picture text -----**<br>


- Low threshold drive 

## **Applications** 

- Switching application 

   - Automotive 

## **Description** 

This device is a N-channel STripFET™ II Power MOSFET that is the latest development of STMicroelectronics unique “single feature size” strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. 

## **Figure 1. Internal schematic diagram** 

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**Table 1. Device summary** 

|**Order code**|**Marking**|**Package**|**Packaging**|
|---|---|---|---|
|STN4NF06L|4NF06L|SOT-223|Tape and reel|



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_www.st.com_ 

**Contents** 

**STN4NF06L** 

|**Contents**|**Contents**|
|---|---|
|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3**|
|**2**|**Electrical characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4**|
||2.1<br>Electrical characteristics (curves)         . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6|
|**3**|**Test circuit   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8**|
|**4**|**Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9**|
|**5**|**Revision history  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11**|



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**Electrical ratings** 

## **1 Electrical ratings** 

## **Table 2. Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VDS|Drain-source voltage (VGS= 0)|60|V|
|VGS|Gate-source voltage|± 16|V|
|ID<br>(1)|Drain current (continuous) at TC= 25 °C|4|A|
|ID|Drain current (continuous) at TC=100 °C|2.9|A|
|IDM<br>(2)|Drain current (pulsed)|16|A|
|PTOT|Total dissipation at TC= 25 °C|3.3|W|
||Derating factor|0.026|W/°C|
|dv/dt(3)|Peak diode recovery voltage slope|10|V/ns|
|EAS (4)|Single pulse avalanche energy|200|mJ|
|TJ<br>Tstg|Operating junction temperature<br>Storage temperature|-55 to 150|°C|



1. Current limited by the package. 

2. Pulse width limited by safe operating area. 

3. ISD ≤ 3 A, di/dt ≤ 150 A /µ s , VDD ≤   V(BR)DSS, TJ ≤  TJMAX. 

4. Starting TJ = 25 °C, ID = 4 A, VDD = 30 V. 

## **Table 3. Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-pcb(1)|Thermal resistance junction-PCB max.|38|°C/W|
|Rthj-pcb(2)|Thermal resistance junction-PCB max.|100|°C/W|
|Tl<br>(3)|Maximum lead temperature for soldering<br>purpose typ.|260|°C|



1. When Mounted on FR-4 board with 1 inch[2 ] pad, 2 oz. of Cu. and t **<** 10 sec. 

2. When mounted on minimum recommended footprint. 

3. For 10 sec. 1.6 mm from case. 

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**Electrical characteristics** 

## **2 Electrical characteristics** 

(TCASE = 25 °C unless otherwise specified) 

## **Table 4. On/off states** 

|**Table 4.**|**On/off states**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|V(BR)DSS|Drain-source breakdown<br>voltage|ID= 250 µA, VGS= 0|60|||V|
|IDSS|Zero gate voltage drain<br>current (VGS= 0)|VDS= Max rating,<br>VDS= Max rating @125 °C|||1<br>10|µA<br>µA|
|IGSS|Gate body leakage current<br>(VDS= 0)|VGS= ±16 V|||± 100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|1||2.8|V|
|RDS(on)|Static drain-source on<br>resistance|VGS= 10 V, ID= 1.5 A<br>VGS= 5 V, ID= 1.5 A||0.07<br>0.085|0.10<br>0.12|Ω<br>Ω|



## **Table 5. Dynamic** 

|**Table 5.**|**Dynamic**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|gfs<br>(1)|Forward transconductance|VDS= 15 V, ID=1.5 A|-|3||S|
|Ciss<br>Coss<br>Crss|Input capacitance<br>Output capacitance<br>Reverse transfer<br>capacitance|VDS= 25 V, f=1 MHz, VGS= 0|-|340<br>63<br>30||pF<br>pF<br>pF|
|Qg<br>Qgs<br>Qgd|Total gate charge<br>Gate-source charge<br>Gate-drain charge|VDD= 48 V, ID= 3 A<br>VGS= 5 V<br>_(see Figure 15)_|-|7<br>1.5<br>2.8|9|nC<br>nC<br>nC|



1. Pulsed: pulse duration=300µs, duty cycle 1.5% 

**Table 6. Switching times** 

|**Table 6.**|**Switching times**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|td(on)<br>tr|Turn-on delay time<br>rise time|VDD= 30 V, ID= 1.5 A,<br>RG= 4.7Ω,VGS= 5 V<br>_(see Figure 14)_|-|9<br>25|-|ns<br>ns|
|td(off)<br>tf|Turn-off delay time<br>fall time|VDD= 30 V, ID= 1.5 A,<br>RG= 4.7Ω,VGS= 5 V<br>_(see Figure 14)_|-|20<br>10|-|ns<br>ns|



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**Electrical characteristics** 

## **Table 7. Source drain diode** 

|**Table 7.**|**Source drain diode**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max**|**Unit**|
|ISD<br>ISDM<br>(1)|Source-drain current<br>Source-drain current (pulsed)||-||4<br>16|A<br>A|
|VSD<br>(2)|Forward on voltage|ISD= 4 A, VGS=0|-||1.5|V|
|trr<br>Qrr<br>IRRM|Reverse recovery time<br>Reverse recovery charge<br>Reverse recovery current|ISD= 4 A,<br>di/dt = 100 A/µs,<br>VDD= 25 V, Tj= 150 °C<br>_(see Figure 16)_|-|50<br>88<br>3.5||ns<br>nC<br>A|



1. Pulse width limited by safe operating area. 

2. Pulsed: pulse duration= 300 µs, duty cycle 1.5% 

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**Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

## **Figure 2. Safe operating area** 

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**Figure 3. Thermal impedance** 

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## **Figure 4. Output characteristics** 

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## **Figure 5. Transfer characteristics** 

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ID AM09065v1<br>(A)<br>30<br>VDS=8V<br>25<br>20<br>15<br>10<br>5<br>0<br>0 2 4 6 8 VGS(V)<br>**----- End of picture text -----**<br>


## **Figure 6. Transconductance** 

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## **Figure 7. Static drain-source on resistance** 

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RDS(on) AM09066v1<br>(mΩ)<br>95<br>90 VGS=10V<br>85<br>80<br>75<br>70<br>65<br>60<br>55<br>50<br>0 1 2 3 4 5 ID(A)<br>**----- End of picture text -----**<br>


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**Electrical characteristics** 

**Figure 8. Gate charge vs. gate-source voltage Figure 9. Capacitance variations** ~~7]~~ **Figure 10. Normalized gate threshold voltage Figure 11. Normalized on resistance vs. vs. temperature temperature** VGS=10V PO ID=1.5A See POEL ene JCOEEE eo ~~enacts~~ JPCCECO **L** LoaA COLL Ss[-4neeeeee] eCLCCECCCCO -50 0 50 100 Tu(*C) ~~lke |~~ **Figure 12. Source-drain diode forward Figure 13. Normalized** b **reakdown voltage vs. characteristics temperature** 

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VSD AM09067v1<br>(V)<br>TJ=-40°C<br>1.0<br>pf tf<br>past te<br>0.8<br>TJ=25°C<br>0.6 e e<br>TJ=150°C<br>0.4 P F|<br>P f<br>0.2<br>0 | | | ft| f t f<br>0 2 4 6 8 ISD(A)<br>**----- End of picture text -----**<br>


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**Test circuit** 

## **3 Test circuit** 

**Figure 14. Switching times test circuit for Figure 15. Gate charge test circuit resistive load** 

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VDD<br>12V 47kΩ<br>1kΩ<br>100nF<br>RL 2200 3.3<br>μF μF<br>VDD IG=CONST<br>VD Vi=20V=VGMAX 100Ω D.U.T.<br>VGS<br>2200<br>RG D.U.T. μF 2.7kΩ VG<br>PW<br>47kΩ<br>1kΩ<br>PW<br>AM01468v1 AM01469v1<br>**----- End of picture text -----**<br>


**Figure 16. Test circuit for inductive load switching and diode recovery times** 

**Figure 17. Unclamped Inductive load test circuit** 

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L<br>A A A<br>D<br>G D.U.T. FASTDIODE L=100μH VD 2200 3.3<br>S B 3.3 1000 μF μF VDD<br>25 Ω B B D μF μF VDD ID<br>G<br>RG S<br>Vi D.U.T.<br>Pw<br>AM01470v1 AM01471v1<br>**----- End of picture text -----**<br>


## **Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform** 

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V(BR)DSS ton toff<br>VD tdon tr tdoff tf<br>90% 90%<br>IDM<br>10%<br>ID 0 10% VDS<br>VDD VDD 90%<br>VGS<br>AM01472v1 0 10% AM01473v1<br>**----- End of picture text -----**<br>


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**Package mechanical data** 

## **4 Package mechanical data** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 

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**Package mechanical data** 

**Table 8. SOT-223 mechanical data** 

|**Dim.**|**mm**|**mm**|**mm**|
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|a|2.27|2.3|2.33|
|b|4.57|4.6|4.63|
|c|0.2|0.4|0.6|
|d|0.63|0.65|0.67|
|e1|1.5|1.6|1.7|
|e4|||0.32|
|f|2.9|3|3.1|
|g|0.67|0.7|0.73|
|l1|6.7|7|7.3|
|l2|3.5|3.5|3.7|
|L|6.3|6.5|6.7|



## **Figure 20. SOT-223 mechanical data drawing** 

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L l2<br>a d<br>c e4<br>b<br>f<br>C<br>B C E<br>g<br>P008B<br>e1<br>l1<br>**----- End of picture text -----**<br>


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**Revision history** 

## **5 Revision history** 

**Table 9. Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|22-Apr-2008|1|Initial version.|
|29-Apr-2011|2|_Figure 5_,_Figure 7_,_Figure 11_and_Figure 12_have been updated.|



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