# Power MOSFET, N Channel, 60 V, 4 A, 0.1 ohm, SOT-223, Surface Mount

![Product image](https://novapart.co/image/farnell:9935479RL/)

**URL**: https://novapart.co/products/STN3NF06L/power-mosfet-n-channel-60-v-4-a-01-ohm-sot-223
**SKU**: STN3NF06L
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.3710
**Stock**: 1000+
**Lead Time**: 127 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:4A; Drain Source Voltage Vds:60V; On Resistance Rds(on):0.07ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:2.8V; Power Dissipation

## Specifications

| Parameter | Value |
|---|---|
| Msl | - |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 4Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 3.3W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | SOT-223 |
| Drain Source Voltage Vds | 60V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 4A |
| Drain Source On State Resistance | 0.1ohm |
| Gate Source Threshold Voltage Max | 2.8V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:9935479RL/)

## **STN3NF06L** 

N-channel 60 V, 0.07 Ω typ., 4 A STripFET™ II Power MOSFET in a SOT-223 package 

Datasheet - production data 

## **Features** 

|**Order code**|**VDS**|**RDS(on) max.**|**ID**|
|---|---|---|---|
|STN3NF06L|60 V|0.1 Ω|4 A|



- Exceptional dv/dt capability 

- 100% avalanche tested 

- Low threshold drive 

## **Applications** 

**Figure 1: Internal schematic diagram** 

- Switching applications 

## **Description** 

This Power MOSFET series realized with STMicroelectronics unique STripFET™ process is specifically designed to minimize input capacitance and gate charge. It is therefore ideal as a primary switch in advanced high-efficiency isolated DC-DC converters for Telecom and Computer applications. It is also suitable for any application with low gate charge drive requirements. 

**Table 1: Device summary** 

|**Order code**|**Marking**|**Package**|**Packing**|
|---|---|---|---|
|STN3NF06L|3NF06L|SOT-223|Tape and reel|



This is information on a product in full production. 

_www.st.com_ 

July 2017 

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|**Contents**<br>**STN3NF06L **|**Contents**<br>**STN3NF06L **|
|---|---|
|**Contents**||
|**1**|**Electrical ratings ............................................................................. 3**|
|**2**|**Electrical characteristics ................................................................ 4**|
||2.1<br>Electrical characteristics (curves) ...................................................... 6|
|**3**|**Test circuits ..................................................................................... 8**|
|**4**|**Package information ....................................................................... 9**|
||4.1<br>SOT-223 package information .......................................................... 9|
|**5**|**Revision history ............................................................................ 11**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2: Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VDS|Drain-source voltage|60|V|
|VGS|Gate-source voltage|±16|V|
|ID_(1)_|Drain current (continuous) at Tc = 25 °C|4|A|
|ID|Drain current (continuous) at Tc= 100 °C|2.9|A|
|IDM_(2)_|Drain current (pulsed)|16|A|
|PTOT|Total dissipation at Tpcb= 25 °C|3.3|W|
|dv/dt_(3)_|Peak diode recoveryvoltage slope|10|V/ns|
|EAS_(4)_|Singlepulse avalanche energy|200|mJ|
|Tj|Operating junction temperature range|- 55 to 150|°C|
|Tstg|Storage temperature range|||



## **Notes:** 

(1)Current limited by the package. 

(2)Pulse width limited by safe operating area. 

(3)ISD ≤ 3 A, di/dt ≤ 150 A/μs, VDD ≤ V(BR)DSS 

(4)Starting Tj = 25 °C, ID = 4 A, VDD = 30 V 

**Table 3: Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-pcb|Thermal resistance junction-pcb_(1)_|38|°C/W|
|Rthj-pcb|Thermal resistance junction-pcb_(2)_|100|°C/W|



## **Notes:** 

(1)When Mounted on FR-4 board 1 inch2 pad, 2 oz. of Cu and t <10 s. 

(2)When mounted on minimum recommended footprint. 

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**Electrical characteristics** 

## **2 Electrical characteristics** 

TC = 25 °C unless otherwise specified 

**Table 4: On/off-state** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown<br>voltage|VGS= 0 V, ID= 250 μA|60|||V|
|IDSS|Zero gate voltage drain<br>current|VGS= 0 V, VDS= 60 V|||1|µA|
|||VGS= 0 V, VDS= 60 V<br>TC= 125 °C_(1)_|||10|µA|
|IGSS|Gate bodyleakage current|VDS= 0 V, VGS= ±16 V|||±100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|1||2.8|V|
|RDS(on)|Static drain-source<br>on-resistance|VGS= 10 V, ID= 1.5 A||0.07|0.10|Ω|
|||VGS= 5 V, ID= 1.5 A||0.085|0.12|Ω|



## **Notes:** 

(1)Defined by design, not subject to production test. 

**Table 5: Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS=25 V, f=1 MHz, VGS=0 V|-|340||pF|
|Coss|Output capacitance||-|63||pF|
|Crss|Reverse transfer<br>capacitance||-|30||pF|
|Qg|Totalgate charge|VDD= 48 V, ID= 3 A<br>VGS= 0 to 5 V<br>(see_Figure 14: "Test circuit for_<br>_gate charge behavior"_)|-|7|9|nC|
|Qgs|Gate-source charge||-|1.5||nC|
|Qgd|Gate-drain charge||-|2.8||nC|



**Table 6: Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delaytime|VDD= 30 V, ID= 1.5 A,<br>RG= 4.7 Ω<br>VGS= 5 V<br>(see_Figure 13: "Test circuit for_<br>_resistive load switching times"_<br>and_Figure 18: "Switching time_<br>_waveform"_)|-|9|-|ns|
|tr|Rise time||-|25|-|ns|
|td(off)|Turn-off delaytime||-|20|-|ns|
|tf|Fall time||-|10|-|ns|



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**Electrical characteristics** 

||**Table 7: Source-drain diode**|**Table 7: Source-drain diode**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|VSD_(1)_|Forward on voltage|ISD= 4 A, VGS=0 V|-||1.5|V|
|trr|Reverse recovery time|ISD= 4 A, di/dt = 100 A/μs,<br>VDD=25 V, Tj=150 °C<br>(see_Figure 15: "Test circuit for_<br>_inductive load switching and_<br>_diode recovery times"_)|-|50||ns|
|Qrr|Reverse recovery<br>charge||-|88||nC|
|IRRM|Reverse recovery<br>current||-|3.5||A|



## **Notes:** 

(1)Pulsed: pulse duration = 300 µs, duty cycle 1.5% 

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## **Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**Figure 2: Safe operating area** 

**==> picture [167 x 163] intentionally omitted <==**

**Figure 3: Thermal impedance** 

**==> picture [167 x 167] intentionally omitted <==**

**Figure 4: Output characteristics** 

**==> picture [173 x 165] intentionally omitted <==**

**Figure 5: Transfer characteristics** 

**==> picture [29 x 6] intentionally omitted <==**

**----- Start of picture text -----**<br>
GC91920a<br>**----- End of picture text -----**<br>


**==> picture [174 x 160] intentionally omitted <==**

**Figure 6: Static drain-source on-resistance** 

**==> picture [30 x 6] intentionally omitted <==**

**----- Start of picture text -----**<br>
GC91940a<br>**----- End of picture text -----**<br>


**==> picture [171 x 158] intentionally omitted <==**

**Figure 7: Gate charge vs. gate-source voltage** 

**==> picture [29 x 6] intentionally omitted <==**

**----- Start of picture text -----**<br>
GC91950a<br>**----- End of picture text -----**<br>


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**Electrical characteristics** 

**Figure 8: Capacitance variations** 

**==> picture [172 x 161] intentionally omitted <==**

**Figure 9: Normalized gate threshold voltage vs temperature** 

**==> picture [171 x 155] intentionally omitted <==**

**==> picture [448 x 192] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 10: Normalized on-resistance vs  Figure 11: Normalized V(BR)DSS vs temperature<br>temperature<br>GC91980a GC93240<br>**----- End of picture text -----**<br>


**Figure 12: Source-drain diode forward characteristics** 

**==> picture [187 x 175] intentionally omitted <==**

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**Test circuits** 

## **3 Test circuits** 

**==> picture [416 x 375] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 13: Test circuit for resistive load  Figure 14: Test circuit for gate charge<br>switching times  behavior<br>Figure 15: Test circuit for inductive load  Figure 16: Unclamped inductive load test<br>switching and diode recovery times  circuit<br>**----- End of picture text -----**<br>


**==> picture [403 x 170] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 17: Unclamped inductive waveform  Figure 18: Switching time waveform<br>**----- End of picture text -----**<br>


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**Package information** 

## **4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _**www.st.com**_ . ECOPACK[®] is an ST trademark. 

## **4.1 SOT-223 package information** 

**Figure 19: SOT-223 package outline** 

**==> picture [408 x 386] intentionally omitted <==**

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**Package information** 

## **Table 8: SOT-223 package mechanical data** 

|**Dim.**||**mm**||
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|||1.8|
|A1|0.02||0.1|
|B|0.6|0.7|0.85|
|B1|2.9|3|3.15|
|c|0.24|0.26|0.35|
|D|6.3|6.5|6.7|
|e||2.3||
|e1||4.6||
|E|3.3|3.5|3.7|
|H|6.7|7.0|7.3|
|V|||10º|



**Figure 20: SOT-223 recommended footprint (dimensions are in mm)** 

**==> picture [408 x 289] intentionally omitted <==**

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**Revision history** 

## **5 Revision history** 

**Table 9: Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|21-Jun-2004|5|Complete version.|
|04-Oct-2006|6|New template, no content change.|
|01-Feb-2007|7|Typo mistake on Table 2.|
|12-Jun-2008|8|Corrected markingon Table 1|
|03-Jul-2017|9|Modified internal schematic diagram on cover page.<br>Updated_Section 4: "Package information"_.<br>Minor text changes.|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

- © 2017 STMicroelectronics – All rights reserved 

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## Links

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- [Supplier page](https://es.farnell.com/stmicroelectronics/stn3nf06l/mosfet-n-sot-223/dp/9935479RL)
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