# Power MOSFET, N Channel, 100 V, 70 A, 8000 µohm, PowerFLAT, Surface Mount

![Product image](https://novapart.co/image/farnell:3132758RL/)

**URL**: https://novapart.co/products/STL90N10F7/power-mosfet-n-channel-100-v-70-a-8000-ohm
**SKU**: STL90N10F7
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.7410
**Stock**: 1000+
**Lead Time**: 127 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:70A; Drain Source Voltage Vds:100V; On Resistance Rds(on):0.007ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 8Pins |
| Channel Type | N Channel |
| Product Range | STripFET F7 |
| Qualification | - |
| Power Dissipation | 100W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | PowerFLAT |
| Drain Source Voltage Vds | 100V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 70A |
| Drain Source On State Resistance | 8000µohm |
| Gate Source Threshold Voltage Max | 3.5V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3132758RL/)

## **STL90N10F7** 

N-channel 100 V, 7 mΩ typ., 70 A STripFET™ F7 Power MOSFET in a PowerFLAT™ 5x6 package 

Datasheet - production data 

## **Features** 

|**Order code**|**VDS**|**RDS(on) max.**|**ID**|**PTOT**|
|---|---|---|---|---|
|STL90N10F7|100 V|8 mΩ|70 A|100 W|



- Among the lowest RDS(on) on the market 

- Excellent FoM (figure of merit) 

- Low Crss/Ciss ratio for EMI immunity 

- High avalanche ruggedness 

## **Applications** 

- Switching applications 

**Figure 1: Internal schematic diagram** 

## **Description** 

This N-channel Power MOSFET utilizes STripFET™ F7 technology with an enhanced trench gate structure that results in very low onstate resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. 

**Table 1: Device summary** 

|**Order code**|**Marking**|**Package**|**Packing**|
|---|---|---|---|
|STL90N10F7|90N10F7|PowerFLAT™ 5x6|Tape and reel|



This is information on a product in full production. 

_www.st.com_ 

August 2017 

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|**Contents**<br>**STL90N10F7**|**Contents**<br>**STL90N10F7**|
|---|---|
|**Contents**||
|**1**|**Electrical ratings ............................................................................. 3**|
|**2**|**Electrical characteristics ................................................................ 4**|
||2.1<br>Electrical characteristics (curves) ...................................................... 5|
|**3**|**Test circuits ..................................................................................... 7**|
|**4**|**Package information ....................................................................... 8**|
||4.1<br>PowerFLAT™ 5x6 type R package information ................................ 9|
||4.2<br>PowerFLAT™ 5x6 packing information ........................................... 11|
|**5**|**Revision history ............................................................................ 13**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2: Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VDS|Drain-source voltage|100|V|
|VGS|Gate-source voltage|± 20|V|
|ID_(1)_|Drain current (continuous) at TC= 25 °C|70|A|
|ID_(1)_|Drain current (continuous) at TC= 100 °C|50|A|
|ID_(2)_|Drain current (continuous) at Tpcb= 25 °C|16|A|
|ID_(2)_|Drain current (continuous) at Tpcb= 100 °C|11|A|
|IDM_(1)(3)_|Drain current (pulsed)|280|A|
|IDM_(2)(3)_|Drain current (pulsed)|64|A|
|PTOT_(1)_|Total dissipation at TC= 25 °C|100|W|
|PTOT_(2)_|Total dissipation at Tpcb= 25 °C|5|W|
|EAS_(4)_|Singlepulse avalanche energy|300|mJ|
|Tstg|Storage temperature range|- 55 to 175|°C|
|Tj|Operating junction temperature range||°C|



## **Notes:** 

- (1) This value is rated according to Rthj-c. 

(2) This value is rated according to Rthj-pcb. 

(3) Pulse width is limited by safe operating area. 

(4) Starting Tj = 25 °C, ID = 10 A, VDD = 50 V. 

**Table 3: Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistancejunction-case|1.5|°C/W|
|Rthj-pcb_(1)_|Thermal resistancejunction-pcb|31||



## **Notes:** 

(1)When mounted on 1 inch², 2 Oz. Cu FR-4 board 

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**Electrical characteristics** 

## **2 Electrical characteristics** 

(TC= 25 °C unless otherwise specified) 

**Table 4: Static** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown<br>voltage|VGS= 0 V, ID= 250 µA|100|||V|
|IDSS|Zero gate voltage drain<br>current|VGS= 0 V, VDS= 100 V|||1|µA|
|||VGS= 0 V, VDS= 100 V,<br>Tc= 125 °C|||100|µA|
|IGSS|Gate-bodyleakage current|VDS= 0 V, VGS= 20 V|||100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250µA|2.5|3.5|4.5|V|
|RDS(on)|Static drain-source on-<br>resistance|VGS= 10 V, ID= 8 A||7|8|mΩ|



## **Table 5: Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 50 V, f = 1 MHz,<br>VGS= 0 V|-|3100|4030|pF|
|Coss|Output capacitance||-|700|910|pF|
|Crss|Reverse transfer<br>capacitance||-|45|58|pF|
|Qg|Totalgate charge|VDD= 50 V, ID= 16 A,<br>VGS= 10 V (see_Figure 14:_<br>_"Test circuit for gate charge_<br>_behavior"_)|-|45|60|nC|
|Qgs|Gate-source charge||-|18||nC|
|Qgd|Gate-drain charge||-|13||nC|



**Table 6: Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delaytime|VDD= 50 V, ID= 8 A<br>RG= 4.7 Ω, VGS= 10 V (see<br>_Figure 13: "Test circuit for_<br>_resistive load switching_<br>_times"_and_Figure 18:_<br>_"Switching time waveform"_)|-|19|-|ns|
|tr|Rise time||-|32|-|ns|
|td(off)|Turn-off-delaytime||-|36|-|ns|
|tf|Fall time||-|13|-|ns|



**Table 7: Source-drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|VSD_(1)_|Forward on voltage|VGS= 0 V, ISD= 16 A|-||1.1|V|
|trr|Reverse recoverytime|ISD= 16 A, di/dt = 100 A/µs,<br>VDD= 80 V, Tj= 150 °C (see<br>_Figure 15: "Test circuit for_<br>_inductive load switching and_<br>_diode recovery times"_)|-|70|90|ns|
|Qrr|Reverse recoverycharge||-|125||nC|
|IRRM|Reverse recovery current||-|3.6||A|



## **Notes:** 

(1)Pulse test: pulse duration = 300 µs, duty cycle 1.5% 

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**Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**Figure 2: Safe operating area** 

**==> picture [157 x 146] intentionally omitted <==**

**Figure 3: Thermal impedance** 

**==> picture [143 x 144] intentionally omitted <==**

**Figure 4: Output characteristics** 

**==> picture [159 x 144] intentionally omitted <==**

**Figure 5: Transfer characteristics** 

**==> picture [160 x 143] intentionally omitted <==**

**Figure 6: Gate charge vs gate-source voltage** 

**==> picture [159 x 144] intentionally omitted <==**

**Figure 7: Static drain-source on-resistance** 

**==> picture [157 x 142] intentionally omitted <==**

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## **Electrical characteristics** 

**Figure 8: Capacitance variations** 

**==> picture [156 x 143] intentionally omitted <==**

**==> picture [191 x 20] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 9: Normalized gate threshold voltage<br>vs temperature<br>**----- End of picture text -----**<br>


**==> picture [165 x 144] intentionally omitted <==**

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**----- Start of picture text -----**<br>
Figure 11: Normalized V(BR)DSS vs<br>Figure 10: Normalized on-resistance vs<br>temperature<br>temperature<br>**----- End of picture text -----**<br>


**Figure 12: Source-drain diode forward characteristics** 

**==> picture [179 x 167] intentionally omitted <==**

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**Test circuits** 

## **3 Test circuits** 

**==> picture [416 x 587] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 13: Test circuit for resistive load  Figure 14: Test circuit for gate charge<br>switching times  behavior<br>Figure 15: Test circuit for inductive load<br>Figure 16: Unclamped inductive load test<br>switching and diode recovery times  circuit<br>Figure 18: Switching time waveform<br>Figure 17: Unclamped inductive waveform<br>**----- End of picture text -----**<br>


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**Package information** 

## **4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _**www.st.com**_ . ECOPACK[®] is an ST trademark. 

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**Package information** 

## **4.1 PowerFLAT™ 5x6 type R package information** 

**Figure 19: PowerFLAT™ 5x6 type R package outline** 

**==> picture [406 x 546] intentionally omitted <==**

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**Package information** 

**Table 8: PowerFLAT™ 5x6 type R mechanical data** 

|**Dim.**||**mm**||
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|0.80||1.00|
|A1|0.02||0.05|
|A2||0.25||
|b|0.30||0.50|
|C|5.80|6.00|6.20|
|D|5.00|5.20|5.40|
|D2|4.15||4.45|
|D3|4.05|4.20|4.35|
|D4|4.80|5.00|5.20|
|D5|0.25|0.40|0.55|
|D6|0.15|0.30|0.45|
|e||1.27||
|E|5.95|6.15|6.35|
|E2|3.50||3.70|
|E3|2.35||2.55|
|E4|0.40||0.60|
|E5|0.08||0.28|
|E6|0.20|0.325|0.45|
|E7|0.75|0.90|1.05|
|K|1.275||1.575|
|L|0.60||0.80|
|L1|0.05|0.15|0.25|
|θ|0°||12°|



**Figure 20: PowerFLAT™ 5x6 recommended footprint (dimensions are in mm)** 

**==> picture [408 x 212] intentionally omitted <==**

**----- Start of picture text -----**<br>
8231817_FOOTPRINT_simp_Rev_15<br>**----- End of picture text -----**<br>


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**Package information** 

## **4.2 PowerFLAT™ 5x6 packing information** 

**==> picture [250 x 9] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 21: PowerFLAT™ 5x6 tape (dimensions are in mm)<br>**----- End of picture text -----**<br>


**==> picture [406 x 257] intentionally omitted <==**

**----- Start of picture text -----**<br>
(I)   Measured from centreline of sprocket hole<br>      to centreline of pocket. Base and bulk quantity 3000 pcs<br>All dimensions are in millimeters<br>(II)  Cumulative tolerance of 10 sprocket<br>      holes is ±0.20.<br>(III) Measured from centreline of sprocket<br>      hole to centreline of pocket<br>8234350_Tape_rev_C<br>**----- End of picture text -----**<br>


**Figure 22: PowerFLAT™ 5x6 package orientation in carrier tape** 

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**Package information** 

**Figure 23: PowerFLAT™ 5x6 reel** 

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**Revision history** 

## **5 Revision history** 

**Table 9: Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|16-Apr-2013|1|First release.|
|06-Mar-2014|2|– Modified: RDS(on)value in cover page<br>– Modified: VGS(th)values in Table 4<br>– Modified: RDS(on)typ. and max values in Table 4<br>– Modified: typical values in Table 5, 6 and 7<br>– Updated: Section 4: Package mechanical data<br>– Added: Section 2.1: Electrical characteristics (curves)<br>– Updated: Section 4: Package mechanical data<br>– Document status promoted from preliminary data to production<br>data|
|16-Dec-2014|3|– Updated title, features and description in cover page.<br>– Updated RDS(on)values and Figure 7: Static drain-source<br>onresistance.|
|17-Mar-2015|4|–Text edits throughout document<br>–Updated cover page title description<br>–Updated cover page features table<br>–In_table 2. Absolute maximum ratings_, added "EAS" information and<br>footnote 4<br>–In_table 3. Thermal data,_added footnote 1<br>–Renamed_table 4. Static_(was On/off states)<br>–Updated_table 5. Dynamic_<br>–Updated_table 7. Source drain diode_<br>–In_Section 2.1 Electrical characteristics (curves)_, updated figures_2,_<br>_3, 10_and_11_<br>–Updated and renamed_Section 4 Package information_|
|01-Aug-2017|5|Updated_Absolute maximum ratings._<br>Updated_Static and Source-drain diode._<br>Updated_Internal schematic diagram._<br>Minor text changes.|
|29-Aug-2017|6|Updated_Table 4: "Static"_.<br>Minor text changes.|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

- © 2017 STMicroelectronics – All rights reserved 

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- [Supplier page](https://es.farnell.com/stmicroelectronics/stl90n10f7/mosfet-n-ch-100v-70a-175deg-c/dp/3132758RL)
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