# Dual MOSFET, N Channel, 60 V, 60 V, 32 A, 32 A, 0.027 ohm

![Product image](https://novapart.co/image/farnell:3367090RL/)

**URL**: https://novapart.co/products/STL8DN6LF6AG/dual-mosfet-n-channel-60-v-32-a-0027-ohm
**SKU**: STL8DN6LF6AG
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Dual MOSFETs
**Price**: €0.5350
**Stock**: 1000+
**Lead Time**: 127 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 8Pins |
| Channel Type | N Channel |
| Product Range | STripFET F6 Series |
| Qualification | AEC-Q101 |
| Transistor Case Style | PowerFLAT |
| Operating Temperature Max | 175°C |
| Power Dissipation N Channel | 55W |
| Power Dissipation P Channel | 55W |
| Drain Source Voltage Vds N Channel | 60V |
| Drain Source Voltage Vds P Channel | 60V |
| Continuous Drain Current Id N Channel | 32A |
| Continuous Drain Current Id P Channel | 32A |
| Drain Source On State Resistance N Channel | 0.027ohm |
| Drain Source On State Resistance P Channel | - |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3367090RL/)

## **STL8DN6LF6AG** 

Automotive-grade dual N-channel 60 V, 21 mΩ typ., 32 A STripFET™ F6 Power MOSFET in a PowerFLAT™ 5x6 DI package 

Datasheet - production data 

## **Features** 

|**Order code**|**VDS**|**RDS(on) max.**|**ID**|**PTOT**|
|---|---|---|---|---|
|STL8DN6LF6AG|60 V|27 mΩ|32 A|55 W|



- AEC-Q101 qualified 

- Very low on-resistance 

- Very low gate charge 

- High avalanche ruggedness 

- Low gate drive power loss 

- Wettable flank package 

## **Applications** 

- Switching applications 

## **Description** 

**Figure 1: Internal schematic diagram** 

This device is a dual N-channel Power MOSFET developed using the STripFET™ F6 technology with a new trench gate structure. The resulting Power MOSFET exhibits very low RDS(on) in all packages. 

**Table 1: Device summary** 

|**Order code**|**Marking**|**Package**|**Packing**|
|---|---|---|---|
|STL8DN6LF6AG|8DN6LF6|PowerFLAT™ 5x6 double island|Tape and reel|



September 2016 

DocID028014 Rev 4 

This is information on a product in full production. 

_www.st.com_ 

1/16 

**Contents** 

**STL8DN6LF6AG** 

## **Contents** 

|**1**|**Electrical ratings ............................................................................. 3**|
|---|---|
|**2**|**Electrical characteristics ................................................................ 4**|
||2.1<br>Electrical characteristics (curves) ...................................................... 6|
|**3**|**Test circuits ..................................................................................... 8**|
|**4**|**Package information ....................................................................... 9**|
||4.1<br>PowerFLAT™ 5x6 double island WF type R package information .. 10|
||4.2<br>PowerFLAT™ 5x6 WF packing information .................................... 13|
|**5**|**Revision history ............................................................................ 15**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2: Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VDS|Drain-source voltage|60|V|
|VGS|Gate-source voltage|±20|V|
|ID|Drain current (continuous) at Tcase= 25 °C|32|A|
||Drain current (continuous) at Tcase= 100 °C|23||
|ID_(1)_|Drain current (continuous) at Tpcb= 25 °C|9.6|A|
||Drain current (continuous) at Tpcb= 100 °C|6.8||
|IDM_(1)(2)_|Drain current (pulsed)|38|A|
|IDM_(2)(2)_|Drain current (pulsed)|128|A|
|PTOT|Total dissipation at Tcase= 25 °C (one channel active)|55|W|
|PTOT|Total dissipation at Tpcb= 25 °C (one channel active)|4.8||
|Tstg|Storage temperature range|-55 to 175|°C|
|Tj|Operating junction temperature range|||



## **Notes:** 

- (1) When mounted on a 1-inch² FR-4, 2 Oz copper board, t < 10 s. 

- (2)Pulse width is limited by safe operating area 

||**Table 3: Thermal data**|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|Rthj-case|Thermal resistance junction-case|2.7|°C/W|
|Rthj-pcb_(1)_|Thermal resistance junction-pcb|31.3||



## **Notes:** 

- (1) When mounted on a 1-inch² FR-4, 2 Oz copper board, t < 10 s. 

**Table 4: Avalanche characteristics** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|IAV|Avalanche current, not repetitive|32|A|
|EAS_(1)_|Single pulse avalanche energy|120|mJ|



## **Notes:** 

- (1) starting Tj = 25 °C, ID = 38 A, VDD = 43.5 V. 

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**Electrical characteristics** 

## **2 Electrical characteristics** 

(Tcase = 25 °C unless otherwise specified) 

**Table 5: Static** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source<br>breakdown<br>voltage|VGS= 0 V, ID= 250 µA|60|||V|
|IDSS|Zero gate voltage<br>drain current|VGS= 0 V, VDS= 60 V|||1|µA|
|IGSS|Gate-body<br>leakage current|VDS= 0 V, VGS= ±20 V|||±100|nA|
|VGS(th)|Gate threshold<br>voltage|VDS= VGS, ID= 250 µA|1||2.5|V|
|RDS(on)|Static drain-<br>source on-<br>resistance|VGS= 10 V, ID= 9.6 A||21|27|mΩ|
|||VGS= 4.5 V, ID= 9.6 A||25|31||



## **Table 6: Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 25 V, f = 1 MHz, VGS= 0 V|-|1340|-|pF|
|Coss|Output<br>capacitance||-|90|-||
|Crss|Reverse transfer<br>capacitance||-|60|-||
|Qg|Total gate charge|VDD= 30 V, ID= 9.6 A, VGS= 10 V (see<br>_Figure 14: "Test circuit for gate charge_<br>_behavior"_)|-|27|-|nC|
|Qgs|Gate-source<br>charge||-|4.6|-||
|Qgd|Gate-drain charge||-|4.3|-||



## **Table 7: Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delay time|VDD= 30 V, ID= 12.5 A RG= 4.7 Ω,<br>VGS= 10 V (see_Figure 13: "Test circuit_<br>_for resistive load switching times"_and<br>_Figure 18: "Switching time waveform"_)|-|9.6|-|ns|
|tr|Rise time||-|20|-||
|td(off)|Turn-off delay time||-|56|-||
|tf|Fall time||-|7|-||



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**Electrical characteristics** 

**Table 8: Source-drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain<br>current||-||9.6|A|
|ISDM_(1)_|Source-drain<br>current (pulsed)||-||38|A|
|VSD_(2)_|Forward on<br>voltage|VGS= 0 V, ISD= 9.6 A|-||1.3|V|
|trr|Reverse recovery<br>time|ISD= 25 A, di/dt = 100 A/µs,<br>VDD= 48 V, Tj= 25 °C (see_Figure 15:_<br>_"Test circuit for inductive load switching_<br>_and diode recovery times"_)|-|22.5||ns|
|Qrr|Reverse recovery<br>charge||-|22.2||nC|
|IRRM|Reverse recovery<br>current||-|2.0||A|



## **Notes:** 

(1) Pulse width is limited by safe operating area. 

(2) Pulse test: pulse duration = 300 µs, duty cycle 1.5%. 

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## **Electrical characteristics** 

**==> picture [285 x 14] intentionally omitted <==**

**----- Start of picture text -----**<br>
2.1  Electrical characteristics (curves)<br>**----- End of picture text -----**<br>


**==> picture [441 x 187] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 2: Safe operating area  Figure 3: Thermal impedance<br>ID GIPG140120161308RV<br>(A)<br>10<br>tp = 10 µs<br>tp = 100 µs<br>1<br>tp = 1 ms<br>Single pulse,Tc =25°C<br>Tj≤175°C,VGS=10 V tp = 10 ms<br>0.1<br>0.1 1 10 100 VDS[V]<br>Operation in this area is<br>Limited by RD S (on)<br>**----- End of picture text -----**<br>


**Figure 4: Output characteristics** 

**==> picture [175 x 159] intentionally omitted <==**

**Figure 5: Transfer characteristics** 

**==> picture [176 x 161] intentionally omitted <==**

**Figure 6: Gate charge vs gate-source voltage** 

**==> picture [181 x 160] intentionally omitted <==**

**Figure 7: Static drain-source on-resistance** 

**==> picture [182 x 159] intentionally omitted <==**

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**==> picture [474 x 211] intentionally omitted <==**

**----- Start of picture text -----**<br>
STL8DN6LF6AG Electrical characteristics<br>Figure 9: Normalized gate threshold voltage vs<br>Figure 8: Capacitance variations<br>temperature<br>**----- End of picture text -----**<br>


**Figure 10: Normalized on-resistance vs temperature Figure 11: Normalized V(BR)DSS vs temperature** 

**==> picture [186 x 159] intentionally omitted <==**

**==> picture [190 x 159] intentionally omitted <==**

**Figure 12: Source-drain diode forward characteristics** 

**==> picture [157 x 143] intentionally omitted <==**

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**Test circuits** 

## **3 Test circuits** 

**==> picture [416 x 587] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 13: Test circuit for resistive load  Figure 14: Test circuit for gate charge<br>switching times  behavior<br>Figure 15: Test circuit for inductive load<br>Figure 16: Unclamped inductive load test<br>switching and diode recovery times  circuit<br>Figure 18: Switching time waveform<br>Figure 17: Unclamped inductive waveform<br>**----- End of picture text -----**<br>


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**Package information** 

## **4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _**www.st.com**_ . ECOPACK[®] is an ST trademark. 

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## **Package information** 

## **4.1 PowerFLAT™ 5x6 double island WF type R package information** 

**Figure 19: PowerFLAT™ 5x6 double island WF type R package outline** 

**==> picture [405 x 496] intentionally omitted <==**

**----- Start of picture text -----**<br>
8256945_r16_typeR-WF<br>**----- End of picture text -----**<br>


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**Package information** 

**Table 9: PowerFLAT™ 5x6 double island WF type R mechanical data** 

|**Dim.**||**mm**||
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|0.80||1.00|
|A1|0.02||0.05|
|A2||0.25||
|b|0.30||0.50|
|C|5.80|6.00|6.20|
|D|5.00|5.20|5.40|
|D2|4.15||4.45|
|D3|4.05|4.20|4.35|
|D4|4.80|5.00|5.10|
|D5|0.25|0.40|0.55|
|D6|0.15|0.30|0.45|
|D7|1.68||1.98|
|e||1.27||
|E|6.20|6.40|6.60|
|E2|3.50||3.70|
|E3|2.35||2.55|
|E4|0.40||0.60|
|E5|0.08||0.28|
|E6|0.20|0.325|0.45|
|E7|0.85|1.00|1.15|
|E8|0.55|1.00|0.75|
|E9|4.00|4.20|4.40|
|E10|3.55|3.70|3.85|
|K|1.275||1.575|
|L|0.725|0.825|0.925|
|L1|0.175|0.275|0.375|
|θ|0°||12°|



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## **Package information** 

**Figure 20: PowerFLAT™ 5x6 double island recommended footprint (dimensions are in mm)** 

**==> picture [406 x 342] intentionally omitted <==**

**----- Start of picture text -----**<br>
8256945_FP_std_R16<br>**----- End of picture text -----**<br>


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**Package information** 

## **4.2 PowerFLAT™ 5x6 WF packing information** 

**Figure 21: PowerFLAT™ 5x6 WF tape (dimensions are in mm)** 

**Figure 22: PowerFLAT™ 5x6 package orientation in carrier tape** 

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**Package information** 

**Figure 23: PowerFLAT™ 5x6 reel (dimensions are in mm)** 

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**Revision history** 

## **5 Revision history** 

**Table 10: Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|24-Jun-2015|1|First release.|
|07-Jul-2015|2|Minor text edits throughout document.|
|19-Jan-2016|3|Updated title.<br>Updated_Table 2: "Absolute maximum ratings_",_Table 3: "Thermal data_"<br>and_Table 4_: "_Avalanche characteristics_".<br>Updated_Figure 2: "Safe operating area_" and_Figure 3: "Thermal_<br>_impedance_".<br>Minor text changes.|
|21-Sep-2016|4|Updated_Table 2: "Absolute maximum ratings"_.<br>Updated_Section 4.1: "PowerFLAT™ 5x6 double island WF type R_<br>_package information"_.<br>Minor text changes.|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

- © 2016 STMicroelectronics – All rights reserved 

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## Links

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- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/stmicroelectronics/stl8dn6lf6ag/mosfet-dual-n-ch-60v-32a-175deg/dp/3367090RL)
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