# Power MOSFET, P Channel, 30 V, 6 A, 0.024 ohm, PowerFLAT, Surface Mount

![Product image](https://novapart.co/image/farnell:3132757RL/)

**URL**: https://novapart.co/products/STL6P3LLH6/power-mosfet-p-channel-30-v-6-a-0024-ohm-powerflat
**SKU**: STL6P3LLH6
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.4210
**Stock**: 1000+
**Lead Time**: 164 days (indicative)

## Description

Transistor Polarity:P Channel; Continuous Drain Current Id:-6A; Drain Source Voltage Vds:-30V; On Resistance Rds(on):0.024ohm; Rds(on) Test Voltage Vgs:-10V; Threshold Voltage Vgs

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 8Pins |
| Channel Type | P Channel |
| Product Range | STripFET H6 |
| Qualification | - |
| Power Dissipation | 2.9W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | PowerFLAT |
| Drain Source Voltage Vds | 30V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 6A |
| Drain Source On State Resistance | 0.024ohm |
| Gate Source Threshold Voltage Max | 1V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3132757RL/)

## **STL6P3LLH6** 

## P-channel 30 V, 0.024 Ω typ., 6 A STripFET™ H6 Power MOSFET in a PowerFLAT™ 3.3 x 3.3 package Datasheet - production data 

- Very low on-resistance 

- Very low gate charge 

- High avalanche ruggedness 

- Low gate drive power loss 

## **Applications** 

**==> picture [72 x 40] intentionally omitted <==**

**----- Start of picture text -----**<br>
1<br>2<br>3<br>4<br>PowerFL AT™ 3.3 x 3.3<br>**----- End of picture text -----**<br>


**Figure 1: Internal schematic diagram** 

- Switching applications 

## **Description** 

This device is a P-channel Power MOSFET developed using the STripFET™ H6 technology, with a new trench gate structure. The resulting Power MOSFET exhibits very low RDS(on) in all packages. 

**Table 1: Device summary** 

**Order code Marking Package Packaging** PowerFLAT[TM] Tape and STL6P3LLH6 6P3L 3.3 x 3.3 reel ~~a~~ 

- [For the P-channel Power MOSFETs the ] actual polarity of the voltages and the current must be reversed. 

## **Features** 

|**Order code**|**VDS**|**RDS(on)max**|**max**<br>**ID**|**PTOT**|
|---|---|---|---|---|
|STL6P3LLH6|30 V|0.03 Ω|6 A|2.9 W|



November 2014 

DocID023668 Rev 3 

1/15 

This is information on a product in full production. 

_www.st.com_ 

|**Contents**<br>**STL6P3LLH6**|**Contents**<br>**STL6P3LLH6**|
|---|---|
|**Contents**||
|**1**|**Electrical ratings ............................................................................. 3**|
|**2**|**Electrical characteristics ................................................................ 4**|
||2.1<br>Electrical characteristics (curves) ...................................................... 6|
|**3**|**Test circuits ..................................................................................... 8**|
|**4**|**Package mechanical data ............................................................... 9**|
||4.1<br>PowerFLAT™ 3.3 x 3.3 type C package information ........................ 9|
||4.2<br>PowerFLAT™ 3.3 x 3.3 type F package information ....................... 11|
|**5**|**Revision history ............................................................................ 14**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2: Absolute maximum ratings** 

**==> picture [394 x 135] intentionally omitted <==**

**----- Start of picture text -----**<br>
||||||
|---|---|---|---|---|
|Symbol|Parameter|Value|Unit|
|VDS|Drain-source voltage|30|V|
|VGS|Gate-source voltage|± 20|V|
|ID|(1)|Drain current (continuous) at TC = 25 °C|6|A|
|ID|(1)|Drain current (continuous) at TC = 100 °C|3.8|A|
|IDM|(1)(2)|Drain current (pulsed)|24|A|
|PTOT|Total dissipation at TC = 25 °C|2.9|W|
|Tstg|Storage temperature|- 55 to 150|°C|
|Tj|Max. operating junction temperature|150|°C|

**----- End of picture text -----**<br>


## **Notes:** 

- (1) The value is rated according Rthj-pcb. 

- (2) Pulse width limited by safe operating area. 

**==> picture [396 x 56] intentionally omitted <==**

**----- Start of picture text -----**<br>
||||||
|---|---|---|---|---|
|Table|3: Thermal data|
|Symbol|Parameter|Value|Unit|
|Rthj-case|Thermal resistance junction-case max|2.50|°C/W|
|Rthj-pcb|(1)|Thermal resistance junction-pcb, single operation|42.8|°C/W|

**----- End of picture text -----**<br>


## **Notes:** 

- (1)When mounted on FR-4 board of 1inch², 2oz Cu, t<10 sec. 

For the P-channel Power MOSFETs the actual polarity of the voltages and the current must be reversed. 

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**STL6P3LLH6** 

**Electrical characteristics** 

## **2 Electrical characteristics** 

(TC = 25 °C unless otherwise specified) 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown<br>voltage|VGS= 0, ID= 250 µA|30|||V|
|IDSS|Zero gate voltage<br>drain current|VGS= 0, VDS= 30 V|||1|µA|
|||VGS= 0, VDS= 30 V<br>TC= 125 °C|||10|µA|
|IGSS|Gate-body leakage<br>current|VDS= 0, VGS= ± 20 V|||±100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250µA|1|||V|
|RDS(on)|Static drain-source<br>on-resistance|VGS= 10 V, ID= 3 A||0.024|0.03|Ω|
|||VGS= 4.5 V, ID= 3 A||0.038|0.05|Ω|



**==> picture [467 x 412] intentionally omitted <==**

**----- Start of picture text -----**<br>
Table 5: Dynamic<br>Symbol  Parameter  Test conditions  Min.  Typ.  Max.  Unit<br>Ciss Input capacitance  VDS = 25 V  -  1450  -  pF<br>Coss Output capacitance  f = 1 MHz  -  178  -  pF<br>Crss Reverse transfer capacitance  VGS = 0  -  120  -  pF<br>Qg Total gate charge  VDD = 24 V, ID = 6 A,  -  12  -  nC<br>Qgs Gate-source charge  VGS = 4.5 V  -  4.4  -  nC<br>(see  Figure 13: "Switching<br>Qgd Gate-drain charge  times test circuit for  -  5  -  nC<br>resistive load" )<br>ee<br>Table 6: Switching times<br>Symbol  Parameter  Test conditions  Min.  Typ.  Max.  Unit<br>td(on) Turn-on delay time  -  15  -  ns<br>VDD = 24 V, ID = 3 A<br>tr Rise time  -  15  -  ns<br>RG = 4.7 Ω<br>td(off) Turn-off delay time  VGS = 10 V  -  24  -  ns<br>tf Fall time  -  21  -  ns<br>ns<br>For the P-channel Power MOSFETs the actual polarity of the voltages and the<br>current must be reversed.<br>4/15 DocID023668 Rev 3<br>**----- End of picture text -----**<br>


**STL6P3LLH6** 

**Electrical characteristics** 

||**Table 7:Source draindiode**|**Table 7:Source draindiode**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|VSD|Forward on voltage|ISD= 6 A, VGS= 0|-||1.1|V|
|trr|Reverse recoverytime|ISD= 6 A, di/dt = 100 A/µs<br>VDD= 16 V, Tj= 150 °C|-|15||ns|
|Qrr|Reverse recoverycharge||-|6.5||nC|
|IRRM|Reverse recoverycurrent||-|0.9||A|



DocID023668 Rev 3 

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**STL6P3LLH6** 

**Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**==> picture [410 x 521] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 2: Safe operating area  Figure 3: Thermal impedance<br>ID GIPG171120141448MT K GIPG17112014144MT.<br>(A) d<br>0.2<br>10 pp 0.1<br>1 10ms ie 0.020.05<br>100ms w h 0.01 Zt h = k R i hs -c ase<br>102 6= tp/T<br>1s<br>0.1<br>Tj=150°C<br>Tc=25°C Single pulse<br>Single pulse t<br>0.01 10%<br>0.1 1 10 VDS(V) 10° 10% 10% 10% 107 10° 10! tp(s)<br>Figure 4: Output characteristics  Figure 5: Transfer characteristics<br>GIPG171120141450MT GIPG171120141451MT<br>ID(A) ID<br>(A)<br>40 VGS=6, 7, 8, 9, 10V VDS=2V<br>5V<br>35 35<br>4V<br>30 30<br>25 25<br>20 20<br>15 15<br>10 3V 10<br>5 5<br>0 2V 0<br>0 1 2 3 VDS(V) 0 1 2 3 4 5 6 7 VGS(V)<br>Bu<br>Figure 6: Gate charge vs gate-source voltage  Figure 7: Static drain-source on-resistance<br>VGS GIPG171120141452MT RDS(on) GIPG171120141453MT<br>(V) (mΩ)<br>ID=6A VGS=10V<br>12<br>24.5<br>10<br>8<br>24.0<br>6<br>4<br>23.5<br>2<br>0 23.0<br>0 4 8 12 16 20 24 28 Qg(nC) 0 1 2 3 4 5 6 ID(A)<br>DS(on)<br>Limited by max R<br>Operation in this area is<br>**----- End of picture text -----**<br>


~~©~~ 6/15 DocID023668 Rev 3 ~~2~~ 

**STL6P3LLH6** 

**Electrical characteristics** 

**==> picture [385 x 175] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 9: Normalized gate threshold voltage<br>Figure 8: Capacitance variations<br>C GIPG171120141452MT VGS(th) vs temperature  GIPG171120141455MT<br>(pF) (norm)<br>ID=250µ A<br>1600<br>1.2<br>1400 Ciss<br>1200<br>1<br>1000<br>800<br>0.8<br>600<br>400<br>0.6<br>200 Coss<br>Crss<br>0<br>0 5 10 15 20 25 VDS(V) 0.4<br>-75 -50 -25 0 25 50 75 100 125 150 TJ(°C)<br>**----- End of picture text -----**<br>


**==> picture [396 x 176] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 10: Normalized on-resistance vs<br>Figure 11: Normalized VDS vs temperature<br>RDS(on) temperature  GIPG171120141456MT (norm)VDS GIPG171120141457MT<br>(norm)<br>ID=3A 1.08 ID=1mA<br>1.6<br>1.06<br>1.4<br>1.04<br>1.2<br>1.02<br>1 1<br>0.8 0.98<br>0.6 0.96<br>0.94<br>0.4 -75 -50 -25 0 25 50 75 100 125 150 TJ(°C)<br>-75 -50 -25 0 25 50 75 100 125 150 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 12: Source-drain diode forward characteristics** 

**==> picture [295 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
GIPG171120141458MT<br>VSD (V)<br>1 TJ=-55°C<br>0.9<br>TJ=25°C<br>0.8<br>0.7 TJ=175°C<br>0.6<br>0.5<br>0.4<br>0 2 4 6 ISD(A)<br>**----- End of picture text -----**<br>


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**Test circuits** 

## **3 Test circuits** 

**==> picture [401 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 13: Switching times test circuit for<br>resistive load  Figure 14: Gate charge test circuit<br>**----- End of picture text -----**<br>


**Figure 15: Test circuit for inductive load switching and diode recovery times** 

**==> picture [216 x 143] intentionally omitted <==**

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**Package mechanical** data 

## **4 Package mechanical data** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _**www.st.com**_ . ECOPACK[®] is an ST trademark. 

## **4.1 PowerFLAT™ 3.3 x 3.3 type C mechanical data** 

**Figure 16: PowerFLAT™ 3.3 x 3.3 type C drawing** 

**==> picture [234 x 507] intentionally omitted <==**

**----- Start of picture text -----**<br>
BOTTOM VIEW<br>SIDE VIEW<br>TOP VIEW<br>8465286_A<br>3668 Rev 3 Rev 3ev 3v 33 9/15<br>**----- End of picture text -----**<br>


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**STL6P3LLH6** 

**Package mechanical** data 

|**Dim.**|**mm**|**mm**|**mm**|
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|0.80|0.90|1.00|
|A1|0||0.05|
|A3||0.20||
|b|0.23||0.38|
|D|3.20|3.30|3.40|
|D2|2.50||2.75|
|E|3.20|3.30|3.40|
|E2|1.25||1.50|
|e||0.65||
|L|0.30||0.50|



**Figure 17: PowerFLAT™ 3.3 x 3.3 type C recommended footprint** 

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**Package mechanical** data 

## **4.2 PowerFLAT™ 3.3 x 3.3 type F mechanical data** 

**Figure 18: PowerFLAT™ 3.3 x 3.3 type F drawing** 

**==> picture [406 x 502] intentionally omitted <==**

**----- Start of picture text -----**<br>
BOTTOM VIEW<br>SIDE VIEW<br>TOP VIEW<br>8465286_A<br>**----- End of picture text -----**<br>


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**Package mechanical** data 

||**Table 9: PowerFLAT™3.3 x3.3 type F mechanical data**|**Table 9: PowerFLAT™3.3 x3.3 type F mechanical data**|**Table 9: PowerFLAT™3.3 x3.3 type F mechanical data**|
|---|---|---|---|
|**Dim.**||**mm**||
||**Min.**|**Typ.**|**Max.**|
|A|0.70|0.80|0.90|
|b|0.25|0.30|0.39|
|c|0.14|0.15|0.20|
|D|3.10|3.30|3.50|
|D1|3.05|3.15|3.25|
|D2|2.15|2.25|2.35|
|e|0.55|0.65|0.75|
|E|3.10|3.30|3.50|
|E1|2.90|3.00|3.10|
|E2|1.60|1.70|1.80|
|H|0.25|0.40|0.55|
|K|0.65|0.75|0.85|
|L|0.30|0.45|0.60|
|L1|0.05|0.15|0.25|
|L2|||0.15|
|J|8°|10°|12°|



12/15 

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**Package mechanical** data 

**Figure 19: PowerFLAT™ 3.3 x 3.3 type F recommended footprint** 

**==> picture [406 x 428] intentionally omitted <==**

**----- Start of picture text -----**<br>
8465286_footprint<br>**----- End of picture text -----**<br>


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**Revision history** 

## **5 Revision history** 

|**Revision**|**history**|**history**|
|---|---|---|
||**Table 10: Document revision history**||
|**Date**|**Revision**|**Changes**|
|04-Mar-2013|1|First release.|
|28-Nov-2013|2|<br>Modified: PTOTvalue, silhouette and not found in cover<br>page<br><br>Modified: VGSand PTOTvalues in not found<br><br>Modified: Rthj-pcbvalue and note_(1)_in_Table 3: "Thermal_<br>_data"_<br><br>Modified: IGSStest conditions value<br><br>Modified: Qgin_Table 5: "Dynamic"_<br><br>Added:_Table 9: "PowerFLAT™ 3.3 x 3.3 type F_<br>_mechanical data"_,_Figure 18: "PowerFLAT™ 3.3 x 3.3_<br>_type F drawing"_and_Figure 19: "PowerFLAT™ 3.3 x 3.3_<br>_type F recommended footprint"_<br><br>Minor text changes|
|26-Nov-2014|3|Updated_Figure 1: "Internal schematic diagram"_.<br>Added_Section 4.1: "PowerFLAT™ 3.3 x 3.3 type C package_<br>_information"_and_Section 4.2: "PowerFLAT™ 3.3 x 3.3 type F_<br>_package information"_.<br>Minor text changes.|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

- © 2014 STMicroelectronics – All rights reserved 

DocID023668 Rev 3 

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