# Power MOSFET, N Channel, 30 V, 13 A, 0.021 ohm, PowerFLAT, Surface Mount

![Product image](https://novapart.co/image/farnell:3132756/)

**URL**: https://novapart.co/products/STL6N3LLH6/power-mosfet-n-channel-30-v-13-a-0021-ohm
**SKU**: STL6N3LLH6
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.2030
**Stock**: 500+
**Lead Time**: 127 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:13A; Drain Source Voltage Vds:30V; On Resistance Rds(on):0.021ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:1V

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 6Pins |
| Channel Type | N Channel |
| Product Range | STripFET H6 |
| Qualification | - |
| Power Dissipation | 7.8W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | PowerFLAT |
| Drain Source Voltage Vds | 30V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 13A |
| Drain Source On State Resistance | 0.021ohm |
| Gate Source Threshold Voltage Max | 1V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3132756/)

## **STL6N3LLH6** 

N-channel 30 V, 0.021 Ω typ., 6 A STripFET™ H6 Power MOSFET in a PowerFLAT™ 2x2 package 

**Datasheet** - **production data** 

**Features** 

**==> picture [437 x 110] intentionally omitted <==**

**----- Start of picture text -----**<br>
Order code VDS  RDS(on) max ID PTOT<br>1<br>2 STL6N3LLH6 30 V 0.025Ω (VGS=10 V) 6 A 2.4 W<br>3 0.04Ω (VGS= 4.5 V)<br>• Very low on-resistance<br>6<br>1 5 • Very low gate charge<br>Se 2 Er<br>4<br>3 • High avalanche ruggedness<br>PowerFLAT™ 2x2<br>**----- End of picture text -----**<br>


- Low gate drive power loss 

## **Applications** 

- Switching applications 

## **Figure 1. Internal schematic diagram** 

**==> picture [157 x 160] intentionally omitted <==**

**----- Start of picture text -----**<br>
1(D) 2(D) 3(G)<br>D S<br>6(D) 5(D) 4(S)<br>AM11269v1<br>**----- End of picture text -----**<br>


## **Description** 

This device is an N-channel Power MOSFET developed using the STripFET™ H6 technology, with a new trench gate structure. The resulting Power MOSFET exhibits very low RDS(on) in all packages. 

**Table 1. Device summary Order code Marking Package Packaging** STL6N3LLH6 STG1 PowerFLAT™ 2x2 Tape and reel ~~———~~ 

October 2015 

_www.st.com_ 

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This is information on a product in full production. 

**Contents** 

**STL6N3LLH6** 

|**Contents**|**Contents**|
|---|---|
|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3**|
|**2**|**Electrical characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4**|
||2.1<br>Electrical characteristics (curves)       . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6|
|**3**|**Test circuits     . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8**|
|**4**|**Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9**|
|**5**|**Revision history  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2. Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VDS|Drain-source voltage|30|V|
|VGS|Gate-source voltage|± 20|V|
|ID<br>(1)|Drain current (continuous) at TC= 25 °C|13|A|
|ID<br>(1)|Drain current (continuous) at TC= 100 °C|8.2|A|
|IDM<br>(1)(2)|Drain current (pulsed)|52|A|
|ID<br>(3)|Drain current (continuous) at Tpcb= 25 °C|6|A|
|ID<br>(3)|Drain current (continuous) at Tpcb= 100 °C|3.75|A|
|IDM<br>(2)(3)|Drain current (pulsed)|24|A|
|PTOT<br>(1)|Total dissipation at Tc= 25 °C|7.8|W|
|PTOT<br>(3)|Total dissipation at Tpcb= 25 °C|2.4||
|TJ|Operating junction temperature|-55 to 150|°C|
|Tstg|Storage temperature|||



1. This value is rated according to Rthj-case 

2. Pulse width limited by safe operating area 

3. This value is rated according to Rthj-pcb 

**Table 3. Thermal resistance** 

||**Table 3. Thermal resistance**|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|Rthj-pcb<br>(1)|Thermal resistance junction-pcb|52|ºC/W|
|Rthj-case|Thermal resistance junction-case max|16|ºC/W|



1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10 sec 

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**STL6N3LLH6** 

**Electrical characteristics** 

## **2 Electrical characteristics** 

(TCASE = 25 °C unless otherwise specified). 

**Table 4. On/off states** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown<br>voltage|ID= 250 µA, VGS= 0 V|30|||V|
|IDSS|Zero gate voltage drain<br>current|VDS= 30 V, VGS= 0|||1|µA|
|||VDS= 30 V, TC= 125°C<br>(VGS= 0)|||10|µA|
|IGSS|Gate body leakage current|VGS= ±20 V, (VDS= 0)|||±100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|1|||V|
|RDS(on)|Static drain-source<br>on-resistance|VGS= 10 V, ID= 3 A||0.021|0.025|Ω|
|||VGS= 4.5 V, ID= 3 A||0.032|0.04|Ω|



## **Table 5. Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 24 V, f=1 MHz,<br>(VGS= 0)|-|283|-|pF|
|Coss|Output capacitance||-|61|-||
|Crss|Reverse transfer<br>capacitance||-|31|-||
|Qg|Total gate charge|VDD= 15 V, ID= 6 A<br>VGS= 4.5 V<br>_(seeFigure 14.: Gate_<br>_charge test circuit)_|-|3.6|-|nC|
|Qgs|Gate-source charge||-|1.5|-||
|Qgd|Gate-drain charge||-|1.1|-||



**Table 6. Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delay time|VDD= 10 V, ID= 6 A,<br>RG= 4.7Ω,VGS= 4.5 V<br>_(seeFigure 13.:_<br>_Switching times test_<br>_circuit for resistive load)_|-<br>-<br>-<br>-|4.8|-|ns|
|tr|Rise time|||11.2|-||
|td(off)|Turn-off delay time|||9.4|-||
|tf|Fall time|||5.4|-||



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**Electrical characteristics** 

**Table 7. Source drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|VSD<br>(1)|Forward on voltage|ISD= 6 A, VGS= 0 V|-||1.1|V|
|trr|Reverse recovery time|ISD= 6 A,<br>di/dt = 100 A/µs,<br>VDD= 16 V, TJ= 150 °C|-|10.6||ns|
|Qrr|Reverse recovery charge||-|2.8||nC|
|IRRM|Reverse recovery current||-|0.5||A|



1. Pulsed: pulse duration=300µs, duty cycle 1.5% 

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**Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

## **Figure 2. Safe operating area** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
ID AM15374v1<br>(A)<br>10<br>1ms<br>1<br>10ms<br>Tj=150°C<br>Tc=25 ° C<br>Single 1s<br>pulse<br>0.1<br>0.1 1 10 VDS(V)<br>DS(on)<br>Operation in this area is<br>Limited by max R<br>**----- End of picture text -----**<br>


**Figure 4. Output characteristics** 

## **Figure 3. Thermal impedance** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM15375v1<br>K<br>10 -1<br>Zthj-pcb=K*Rthj-c<br>10 -210 -5 10 -4 10-3 10 [-2] 10 [-1] t (s)p<br>δ=0.5<br>0.2<br>0.1<br>0.05<br>0.02<br>0.01<br>Single pulse<br>**----- End of picture text -----**<br>


## **Figure 5. Transfer characteristics** 

**==> picture [462 x 375] intentionally omitted <==**

**----- Start of picture text -----**<br>
ID AM15361v1 ID AM15369v1<br>(A) VGS=6, 7, 8, 9, 10V (A)<br>30 VDS=2V<br>5V 30<br>25<br>4V<br>20<br>20<br>15<br>10<br>10<br>3V<br>5<br>2V<br>0 0<br>0 1 2 3 4 VDS(V) 0 1 2 3 4 5 6 7 VGS(V)<br>Figure 6. Gate charge vs gate-source voltage Figure 7. Static drain-source on-resistance<br>VGS AM15358v1 RDS(on) AM15372v1<br>(V) (mΩ)<br>VDD=15V VGS= 10 V<br>10 I D =6A<br>40<br>35<br>8<br>30<br>6 25<br>20<br>4<br>15<br>10<br>2<br>5<br>0 0<br>0 2 4 6 Qg(nC) 0 2 4 6 8 10 ID(A)<br>**----- End of picture text -----**<br>


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**Electrical characteristics** 

**Figure 8. Capacitance variations** 

**Figure 9. Normalized on-resistance vs temperature** 

**==> picture [462 x 177] intentionally omitted <==**

**----- Start of picture text -----**<br>
C AM15370v1 RDS(on) AM15360v1<br>(pF) f= 1 MHz (norm)1.8<br>Ciss ID= 3 A<br>1.6<br>VGS= 10 V<br>1.4<br>100<br>Coss 1.2<br>Crss 1<br>0.8<br>10<br>0.6<br>0.4<br>0.2<br>1 00<br>0 10 20 VDS(V) -55 -30 -5 20 45 70 95 120 145 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 10. Normalized gate threshold voltage vs temperature** 

**Figure 11. Normalized V(BR)DSS vs temperature** 

**==> picture [462 x 176] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGS(th) AM15368v1 AM15364v1<br>V(BR)DSS<br>(norm)<br>1.2 1.15<br>ID =250 µA ID = 250 μA<br>1.1<br>1<br>1.05<br>0.8<br>1<br>0.6<br>0.95<br>0.4<br>0.9<br>0.2<br>0.85<br>0.8<br>0-55 -30 -5 20 45 70 95 120 145 TJ(°C) -55 -30 -5 20 45 70 95 120 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 12. Source-drain diode forward characteristics** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
VSD AM15365v1<br>(V)<br>1 TJ=-55°C<br>0.9<br>0.8<br>0.7 TJ=25°C<br>0.6<br>TJ=150°C<br>0.5<br>0.4<br>0.3<br>0.2<br>0 2 4 6 8 10 ISD(A)<br>**----- End of picture text -----**<br>


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**Test circuits** 

## **3 Test circuits** 

**Figure 13. Switching times test circuit for resistive load** 

**Figure 14. Gate charge test circuit** 

**==> picture [462 x 162] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDD<br>12V 47kΩ<br>1kΩ<br>100nF<br>RL 2200 3.3<br>μF μF<br>VDD IG=CONST<br>VGS VD Vi=20V=VGMAX 100Ω D.U.T.<br>2200<br>RG D.U.T. mF 2.7kΩ VG<br>PW<br>47kΩ<br>1kΩ<br>PW<br>AM01469v1<br>AM01468v1<br>**----- End of picture text -----**<br>


**Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test circuit switching and diode recovery times** 

**==> picture [462 x 162] intentionally omitted <==**

**----- Start of picture text -----**<br>
L<br>A A A<br>D<br>FAST L=100μH VD<br>G D.U.T. DIODE 2200 3.3<br>S B 3.3 1000 μF μF VDD<br>25 Ω B B D μF μF VDD ID<br>G<br>RG S<br>Vi D.U.T.<br>Pw<br>AM01470v1 AM01471v1<br>**----- End of picture text -----**<br>


## **Figure 17. Unclamped inductive waveform** 

## **Figure 18. Switching time waveform** 

**==> picture [462 x 162] intentionally omitted <==**

**----- Start of picture text -----**<br>
V(BR)DSS ton toff<br>tr tdoff tf<br>VD<br>t<br>d(on)<br>90% 90%<br>IDM<br>10%<br>10% VDS<br>ID 0<br>VDD VDD 90%<br>VGS<br>AM01472v1 0 10% AM01473v1<br>**----- End of picture text -----**<br>


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**Package information** 

## **4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _www.st.com_ . ECOPACK[®] is an ST trademark. 

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**Package information** 

## **Figure 19. PowerFLAT™ 2 x 2 package outline** 

**==> picture [405 x 551] intentionally omitted <==**

**----- Start of picture text -----**<br>
8368575_REV_C<br>**----- End of picture text -----**<br>


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**Package information** 

**Table 8. PowerFLAT™ 2 x 2 package mechanical data** 

|**Dim.**|**mm.**<br>**Min.**<br>**Typ.**|**mm.**<br>**Min.**<br>**Typ.**||
|---|---|---|---|
|||**Typ.**|**Max.**|
|A|0.70|0.75|0.80|
|A1|0.00|0.02|0.05|
|A3||0.20||
|b|0.25|0.30|0.35|
|D|1.90|2.00|2.10|
|E|1.90|2.00|2.10|
|D2|0.90|1.00|1.10|
|E2|0.80|0.90|1.00|
|e|0.55|0.65|0.75|
|K|0.15|0.25|0.35|
|K1|0.20|0.30|0.40|
|K2|0.25|0.35|0.45|
|L|0.20|0.25|0.30|
|L1|0.65|0.75|0.85|



**Table 9. PowerFLAT™ 2 x 2 recommended footprint (dimensions in millimeters)** 

**==> picture [405 x 294] intentionally omitted <==**

**----- Start of picture text -----**<br>
Footprint<br>**----- End of picture text -----**<br>


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**Revision history** 

## **5 Revision history** 

**Table 10. Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|25-May-2012|1|First release|
|11-Oct-2012|2|– Added Section 2.1: Electrical characteristics (curves).<br>– RDS(on)values (typ. and max.) updated<br>– Typical values updated in Table 5, 6 and 7<br>– Minor text changes.|
|21-Oct-2015|3|– Updated title and description in cover page.<br>– Datasheet promoted from preliminary data to production data.<br>– Updated_Table 2_,_Table 4_,_Table 5_and_Table 7_.<br>– Updated_Figure 6_and_Figure 7_.<br>– Minor text changes.|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2015 STMicroelectronics – All rights reserved 

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