# Power MOSFET, P Channel, 30 V, 62 A, 0.009 ohm, PowerFLAT, Surface Mount

![Product image](https://novapart.co/image/farnell:2807204/)

**URL**: https://novapart.co/products/STL62P3LLH6/power-mosfet-p-channel-30-v-62-a-0009-ohm
**SKU**: STL62P3LLH6
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.5990
**Stock**: 10+

## Specifications

| Parameter | Value |
|---|---|
| No. Of Pins | 8Pins |
| Channel Type | P Channel |
| Product Range | STripFET H6 |
| Power Dissipation | 100W |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | P Channel |
| Power Dissipation Pd | 100W |
| Rds(On) Test Voltage | 10V |
| On Resistance Rds(On) | 0.009ohm |
| Transistor Case Style | PowerFLAT |
| Drain Source Voltage Vds | 30V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 62A |
| Drain Source On State Resistance | 0.009ohm |
| Gate Source Threshold Voltage Max | 1V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2807204/)

## **STL62P3LLH6** 

P-channel -30 V, 9 mΩ typ., -62 A STripFET™ H6 Power MOSFET in a PowerFLAT 5x6 package Datasheet - production data 

## **Features** 

|**Order code**|**VDS**|**RDS(on)max**|**ID**|
|---|---|---|---|
|STL62P3LLH6|-30 V|10.5 mΩ|-62 A|



- Very low on-resistance 

- Very low gate charge 

- High avalanche ruggedness 

- Low gate drive power loss 

## **Applications** 

- Switching applications 

**Figure 1: Internal schematic diagram** 

## **Description** 

This device is a P-channel Power MOSFET developed using the STripFET™ H6 technology, with a new trench gate structure. The resulting Power MOSFET exhibits very low RDS(on) in all packages. 

**Table 1: Device summary** 

|**Order code**|**Marking**|**Package**|**Packing**|
|---|---|---|---|
|STL62P3LLH6|62P3LLH6|PowerFLATTM5x6|Tape and reel|



. 

This is information on a product in full production. 

_www.st.com_ 

October 2016 DocID025836 Rev 6 

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|**Contents**<br>**STL62P3LLH6**|**Contents**<br>**STL62P3LLH6**|
|---|---|
|**Contents**||
|**1**|**Electrical ratings ............................................................................. 3**|
|**2**|**Electrical characteristics ................................................................ 4**|
||2.1<br>Electrical characteristics (curves) ...................................................... 6|
|**3**|**Test circuits ..................................................................................... 9**|
|**4**|**Package information ..................................................................... 10**|
||4.1<br>PowerFLAT 5x6 type R package information .................................. 11|
|**5**|**Packing information ...................................................................... 13**|
|**6**|**Revision history ............................................................................ 15**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 3: Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VDS|Drain-source voltage|30|V|
|VGS|Gate-source voltage|± 20|V|
|ID_(1)_|Drain current (continuous) at TC= 25 °C|-62|A|
|ID_(1)_|Drain current (continuous) at TC= 100 °C|-44|A|
|ID_(2)_|Drain current (continuous) at Tpcb= 25 °C|-14|A|
|ID_(2)_|Drain current (continuous) at Tpcb= 100 °C|-9.5|A|
|ID_(1)(2)_|Drain current (pulsed)|-248|A|
|IDM_(2)(3)_|Drain current (pulsed)|-56|A|
|PTOT_(1)_|Total dissipation at TC= 25 °C|100|W|
|PTOT_(2)_|Total dissipation at Tpcb= 25 °C|4.8|W|
|Tstg|Storage temperature range|- 55 to 175|°C|
|Tj|Operating junction temperature range|||



## **Notes:** 

- (1)The value is rated according to Rthj-c. 

- (2)This value is rated according to Rthj-pcb. 

- (3)Pulse width is limited by safe operating area. 

**Table 4: Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistance junction-case|1.5|°C/W|
|Rthj-pcb_(1)_|Thermal resistance junction-pcb, single operation|31.3|°C/W|



## **Notes:** 

- (1)When mounted on FR-4 board of 1inch², 2oz Cu 

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**Electrical characteristics** 

## **2 Electrical characteristics** 

(TC = 25 °C unless otherwise specified) 

**Table 5: On /off states** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source<br>breakdown voltage|VGS= 0 V, ID= -250 µA|-30|||V|
|IDSS|Zero gate voltage<br>drain current|VGS= 0 V, VDS= -30 V|||-1|µA|
|||VGS= 0 V, VDS= -30 V,<br>TC= 125 °C_(1)_|||-10|µA|
|IGSS|Gate-body leakage<br>current|VDS= 0 V, VGS= ± 20 V|||±100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= -250 µA|-1|||V|
|RDS(on)|Static drain-source on-<br>resistance|VGS= -10 V, ID= -7 A||9|10.5|mΩ|
|||VGS= -4.5 V, ID= -7 A||13|16|mΩ|



## **Notes:** 

(1)Defined by design, not subject to production test. 

**Table 6: Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= -25 V, f = 1 MHz,<br>VGS= 0 V|-|3350|-|pF|
|Coss|Output capacitance||-|414|-|pF|
|Crss|Reverse transfer<br>capacitance||-|287|-|pF|
|Qg|Total gate charge|VDD= -15 V, ID= -14 A,<br>VGS= -4.5 V<br>(see_Figure 14: "Gate charge test_<br>_circuit"_)|-|33|-|nC|
|Qgs|Gate-source charge||-|14|-|nC|
|Qgd|Gate-drain charge||-|11|-|nC|



**Table 7: Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delay time|VDD= -15 V, ID= -7 A,<br>RG= 4.7 Ω, VGS= -10 V<br>(see_Figure 13: "Switching times_<br>_test circuit for resistive load"_)|-|12.8|-|ns|
|tr|Rise time||-|112|-|ns|
|td(off)|Turn-off delay time||-|61|-|ns|
|tf|Fall time||-|45|-|ns|



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**Electrical characteristics** 

**Table 8: Source drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|VSD_(1)_|Forward on<br>voltage|ISD= -7 A, VGS= 0 V|-||-1.1|V|
|trr|Reverse<br>recovery time|ISD= -24 A, di/dt = 100 A/µs<br>VDD= -16 V, Tj=150 °C<br>(see_Figure 15: "Source-drain diode_<br>_forward characteristics"_)|-|25.2||ns|
|Qrr|Reverse<br>recovery<br>charge||-|17.4||nC|
|IRRM|Reverse<br>recovery<br>current||-|1.4||A|



## **Notes:** 

(1)Pulsed: pulse duration = 300 µs, duty cycle 1.5% 

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**Electrical characteristics** 

## **2.1** 

## **Electrical characteristics (curves)** 

Note: For the P-channel Power MOSFET, current and voltage polarities are reversed. 

**==> picture [423 x 174] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 2: Safe operating area<br>Figure 3: Thermal impedance<br>ID GIPG010920141456RV GIPG030920141359MT<br>(A)<br>Ftn/a δ 0.5 SE er |<br>100 con 0.2 lll<br>100 µs 0.1<br>10 1ms -—[ es 0.05 tot<br>eeY mil<br>10 ms 0.. [1]  CgIY 0.02 WN<br>1 (eA~ | AAe TToo CON TTT}<br>0.01<br>Aa |<br>ASANOZZAN 20|<br>0.1 Tc=25°CTj=175°C Ga Singleinglepusepul 0|UME||<br>Single pulse<br>0.01<br>0.1 1 10 VDS(V) ov I<br>DS(on)<br>Operation in this area is<br>Limited by max R<br>**----- End of picture text -----**<br>


**Figure 4: Output characteristics** 

**Figure 5: Transfer characteristics** 

**==> picture [192 x 164] intentionally omitted <==**

**----- Start of picture text -----**<br>
GIPG280820141409MT<br>ID(A)<br>VGS = 9,10V 8V<br>7V<br>200 , 6V<br>150 5V<br>100 / 4V<br>50 3V<br>a<br>0<br>0 A 2 4 G 6 8 VDS(V)<br>**----- End of picture text -----**<br>


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**Electrical characteristics** 

**==> picture [426 x 186] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 6: Gate charge vs gate-source voltage  Figure 7: Static drain-source on-resistance<br>VGS GIPG030920141408MT RDS(on)(mΩ) GIPG020920141051MT<br>(V)<br>VDD=15V 9.40 VGS=10V<br>12<br>ID=14A<br>9.30<br>10 9.20<br>9.10<br>8<br>9.00<br>6<br>8.90<br>4 8.80<br>8.70<br>2<br>8.60<br>0 8.50<br>0 20 40 60 Qg(nC) 0 2 4 6 8 10 12 14 ID(A)<br>**----- End of picture text -----**<br>


**Figure 6: Gate charge vs gate-source voltage** 

**Figure 8: Capacitance variations** 

**==> picture [188 x 161] intentionally omitted <==**

**Figure 9: Normalized gate threshold voltage vs temperature** 

**==> picture [195 x 164] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGS(th) GIPG020920141145MT<br>(norm)<br>1.1 ID=250µ A<br>1<br>0.9<br>0.8<br>0.7<br>0.6<br>0.5<br>0.4<br>-75 -25 25 75 125 175 TJ(°C)<br>**----- End of picture text -----**<br>


**==> picture [436 x 195] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 10: Normalized on-resistance vs<br>Figure 11: Normalized V(BR)DSS vs temperature<br>temperature  GIPG020920141202MT<br>GIPG020920141154MT V(BR)DSS<br>RDS(on) (norm)<br>(norm) VGS=10V 1.08 ID=1mA<br>1.6<br>1.06<br>1.4 1.04<br>1.02<br>1.2<br>1<br>1<br>0.98<br>0.8<br>0.96<br>0.6 0.94<br>0.92<br>0.4 -75 -25 25 75 125 175 TJ(°C)<br>-75 -25 25 75 125 175 TJ(°C)<br>**----- End of picture text -----**<br>


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**Electrical characteristics** 

**==> picture [233 x 176] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 12: Source-drain diode forward characteristics<br>GIPG020920141229MT<br>VSD(V)<br>1<br>0.9 TJ=-55°C<br>0.8<br>0.7<br>TJ=25°C<br>0.6 TJ=175°C<br>0.5<br>0.4<br>0 2 4 6 8 10 12 14 16 18 ISD(A)<br>**----- End of picture text -----**<br>


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**Test circuits** 

## **3 Test circuits** 

**==> picture [401 x 197] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 13: Switching times test circuit for<br>Figure 14: Gate charge test circuit<br>resistive load<br>**----- End of picture text -----**<br>


**Figure 15: Source-drain diode forward characteristics** 

**==> picture [160 x 93] intentionally omitted <==**

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**Package information** 

## **4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _**www.st.com**_ . ECOPACK[®] is an ST trademark. 

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**Package information** 

## **4.1 PowerFLAT 5x6 type R package information** 

**Figure 16: PowerFLAT™ 5x6 type R package outline** 

**==> picture [406 x 545] intentionally omitted <==**

**----- Start of picture text -----**<br>
A0ER_8231817_Rev14<br>**----- End of picture text -----**<br>


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**Package information** 

**Table 9: PowerFLAT™ 5x6 type R mechanical data** 

|**Dim.**||**mm**||
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|0.80||1.00|
|A1|0.02||0.05|
|A2||0.25||
|b|0.30||0.50|
|C|5.80|6.00|6.20|
|D|5.00|5.20|5.40|
|D2|4.15||4.45|
|D3|4.05|4.20|4.35|
|D4|4.80|5.00|5.20|
|D5|0.25|0.40|0.55|
|D6|0.15|0.30|0.45|
|e||1.27||
|E|5.95|6.15|6.35|
|E2|3.50||3.70|
|E3|2.35||2.55|
|E4|0.40||0.60|
|E5|0.08||0.28|
|E6|0.20|0.325|0.45|
|E7|0.75|0.90|1.05|
|K|1.275||1.575|
|L|0.60||0.80|
|L1|0.05|0.15|0.25|
|θ||0°|12°|



**Figure 17: PowerFLAT™ 5x6 recommended footprint (dimensions are in mm)** 

**==> picture [408 x 212] intentionally omitted <==**

**----- Start of picture text -----**<br>
8231817_FOOTPRINT_simp_Rev_14<br>**----- End of picture text -----**<br>


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**Packing information** 

## **5** 

## **Packing information** 

**Figure 18: PowerFLAT™ 5x6 tape (dimensions are in mm)** 

**Figure 19: PowerFLAT™ 5x6 package orientation in carrier tape** 

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**Packing information** 

**Figure 20: PowerFLAT™ 5x6 reel** 

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**Revision history** 

## **6 Revision history** 

**Table 10: Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|30-May-2014|1|First release.|
|05-Sep-2014|2|Updated the title, the features and the description in cover page.<br>Updated Section 7:_"Electrical characteristics_". Minor text changes.|
|11-Sep-2014|3|Updated Figure 6:_"Gate charge vs gate_-_source voltage_". Minor text<br>changes.|
|16-Dec-2014|4|Document status promoted from preliminary to production data.|
|07-Apr-2015|5|Updated_Section 7.1: "Electrical characteristics (curves)"_and Section<br>9.1:_"PowerFLAT 5x6 type R package information_"|
|20-Oct-2016|6|Updated_Figure 2: "Safe operating area"_.<br>Minor text changes.|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

- © 2016 STMicroelectronics – All rights reserved 

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## Links

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- [Supplier page](https://es.farnell.com/en-ES/stmicroelectronics/stl62p3llh6/mosfet-p-ch-30v-62a-powerflat/dp/2807204)
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