# Power MOSFET, N Channel, 30 V, 56 A, 7600 µohm, PowerFLAT, Surface Mount

![Product image](https://novapart.co/image/farnell:3367059RL/)

**URL**: https://novapart.co/products/STL56N3LLH5/power-mosfet-n-channel-30-v-56-a-7600-ohm
**SKU**: STL56N3LLH5
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.2910
**Stock**: 1000+
**Lead Time**: 2 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 8Pins |
| Channel Type | N Channel |
| Product Range | STripFET H5 |
| Qualification | - |
| Power Dissipation | 62.5W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | PowerFLAT |
| Drain Source Voltage Vds | 30V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 56A |
| Drain Source On State Resistance | 7600µohm |
| Gate Source Threshold Voltage Max | 2.5V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3367059RL/)

## **STL56N3LLH5** 

N-channel 30 V, 0.0076 Ω typ., 56 A STripFET™  H5 Power MOSFET in a PowerFLAT™ 5x6 package 

**Datasheet — production data** 

## **Features** 

|**Order code**|**VDS**|**RDS(on)max**|**ID**|
|---|---|---|---|
|STL56N3LLH5|30 V|0.009Ω|56 A|



- Low on-resistance R DS(on) 

**==> picture [39 x 23] intentionally omitted <==**

**----- Start of picture text -----**<br>
1<br>2<br>3<br>4<br>**----- End of picture text -----**<br>


- High avalanche ruggedness 

- Low gate drive power loss 

**PowerFLAT™ 5x6** 

## **Applications** 

- Switching applications 

## **Figure 1.  Internal schematic diagram** 

## **Description** 

This device is an N-channel Power MOSFET developed using STMicroelectronics’ STripFET™ H5 technology. The device has been optimized to achieve very low on-state resistance, contributing to a FoM that is among the best in its class. 

**Table 1. Device summary** 

|**Order code**|**Marking**|**Package**|**Packaging**|
|---|---|---|---|
|STL56N3LLH5|56N3LH5|PowerFLAT™ 5x6|Tape and reel|



July 2014 

_www.st.com_ 

DocID18415 Rev 5 

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This is information on a product in full production. 

**Contents** 

**STL56N3LLH5** 

|**Contents**|**Contents**|
|---|---|
|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3**|
|**2**|**Electrical characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4**|
||2.1<br>Electrical characteristics (curves)         . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6|
|**3**|**Test circuits     . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8**|
|**4**|**Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9**|
|**5**|**Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13**|
|**6**|**Revision history  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2. Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VDS|Drain-source voltage|30|V|
|VGS|Gate-source voltage|+22 / -20|V|
|ID<br>(1)|Drain current (continuous) at TC= 25 °C|56|A|
|ID<br>(1)|Drain current (continuous) at TC= 100 °C|37|A|
|ID<br>(2)|Drain current (continuous) at Tpcb= 25 °C|15|A|
|ID<br>(2)|Drain current (continuous) at Tpcb=100°C|10|A|
|IDM<br>(1)(3)|Drain current (pulsed)|224|A|
|IDM<br>(2)(3)|Drain current (pulsed)|60|A|
|PTOT<br>(1)|Total dissipation at TC= 25°C|62.5|W|
|PTOT<br>(2)|Total dissipation at Tpcb= 25°C|4|W|
|EAS<br>(4)|Single pulse avalanche energy|150|mJ|
|TJ<br>Tstg|Operating junction temperature<br>Storage temperature|-55 to 150|°C|



1. The value is rated according to Rthj-c 

2. The value is rated according to Rthj-pcb 

3. Pulse width limited by safe operating area 

4. Starting Tj = 25 °C, ID = 56 A, VDD = 50 V 

**Table 3. Thermal resistance** 

||**Table 3. Thermal resistance**|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|Rthj-case|Thermal resistance junction-case|2|°C/W|
|Rthj-pcb<br>(1)|Thermal resistance junction-pcb|31.3|°C/W|



1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10 sec 

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**STL56N3LLH5** 

**Electrical characteristics** 

## **2 Electrical characteristics** 

(TCASE = 25 °C unless otherwise specified) 

**Table 4. On/off states** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown<br>voltage|VGS= 0, ID= 250 µA|30|||V|
|IDSS|Zero gate voltage drain<br>current|VGS= 0, VDS= 30 V,|||1|µA|
|||VGS= 0<br>VDS= 30 V, TC= 125 °C|||10|µA|
|IGSS|Gate body leakage current|VDS= 0, VGS= +22 / -20 V|||±100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|1||2.5|V|
|RDS(on)|Static drain-source<br>on- resistance|VGS= 10 V, ID= 7.5 A||0.0076|0.009|Ω|
|||VGS= 4.5 V, ID= 7.5 A||0.0099|0.0112|Ω|



**Table 5. Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS=25 V, f=1 MHz,<br>VGS=0|-|950||pF|
|Coss|Output capacitance||-|193||pF|
|Crss|Reverse transfer<br>capacitance||-|27||pF|
|Qg|Total gate charge|VDD=15 V, ID= 15 A<br>VGS=4.5 V<br>_Figure 14_|-|6.5|10|nC|
|Qgs|Gate-source charge||-|3.3||nC|
|Qgd|Gate-drain charge||-|2.4||nC|
|Rg|Gate input resistance|f = 1 MHz, gate DC<br>Bias = 0,<br>test signal level = 20 mV,<br>ID= 0|-|1.7|2.5|Ω|



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**Electrical characteristics** 

**Table 6. Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delay time|VDD=15 V, ID= 7.5 A,<br>RG=4.7Ω,VGS=10 V<br>_Figure 13_|-|10.8|-|ns|
|tr|Rise time||-|15.6|-|ns|
|td(off)|Turn-off delay time||-|14.2|-|ns|
|tf|Fall time||-|6|-|ns|



**Table 7. Source drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min**|**Typ.**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain current||-||56|A|
|ISDM<br>(1)|Source-drain current (pulsed)||-||224|A|
|VSD<br>(2)|Forward on voltage|ISD= 15 A, VGS=0|-||1.1|V|
|trr|Reverse recovery time|ISD= 15 A,<br>di/dt = 100 A/µs,<br>VDD=25 V, Tj=150 °C|-<br>-<br>-|20|36|ns|
|Qrr|Reverse recovery charge|||10|18|nC|
|IRRM|Reverse recovery current|||1||A|



1. Pulse width limited by safe operating area 

2. Pulsed: pulse duration= 300 µs, duty cycle 1.5% 

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**Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**Figure 2. Safe operating area** 

## **Figure 3. Thermal impedance** 

**==> picture [203 x 166] intentionally omitted <==**

**----- Start of picture text -----**<br>
ID AM010329v1<br>(A)<br>1µs<br>100<br>10µs<br>100µs<br>10<br>1<br>Tj=150°C<br>Tc=25°C<br>Single pulse<br>0.1<br>0.1 1 10 VDS(V)<br>DS(on)<br>Operation in this area is<br>Limited by max R<br>**----- End of picture text -----**<br>


**Figure 4. Output characteristics** 

## **Figure 5. Transfer characteristics** 

**==> picture [425 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM10330v1 AM10331v1<br>ID ID (A)<br>(A) VGS=10V VDS=3V<br>120140 A fF 6V 140120 |PT TA]LES<br>5V<br>100 100<br>80 fefe 80 |[ftft<br>4V<br>60 _f [|] 60 |ee<br>PffT<br>40 po 40 fF ft fT<br>TT<br>20 20<br>fo fT<br>3V<br>0 [| + _—_| 0 Yttf ft<br>0 1 2 3 4 VDS(V) 0 2 4 6 8 VGS(V)<br>**----- End of picture text -----**<br>


## **Figure 6. Normalized V(BR)DSS vs temperature** 

## **Figure 7. Static drain-source on-resistance** 

**==> picture [432 x 168] intentionally omitted <==**

**----- Start of picture text -----**<br>
V(BR)DSS AM10334v1 RDS(on) AM10335v1<br>(norm) (mΩ)<br>TT ID=1mA TL LIA VGS=10V<br>13<br>1.08 So ee<br>CELLET<br>1.04 POOP-COL AAA 119<br>(COLA EL<br>1.00<br>7<br>POPE<br>0.96 (CALE ELT<br>ZEEE 5<br>0.92 PEELEEL FT] 3<br>-75 -25 25 75 125 TJ(°C) 4 6 8 10 12 14 ID(A)<br>**----- End of picture text -----**<br>


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**STL56N3LLH5** 

**Electrical characteristics** 

**Figure 8. Gate charge vs gate-source voltage** 

## **Figure 9. Capacitance variations** 

**==> picture [462 x 176] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGS AM10332v1 C AM10333v1<br>(V) (pF)<br>VDD=15V<br>6<br>ID=15A<br>1200<br>5<br>Ciss<br>900<br>4<br>3<br>600<br>2<br>300<br>1 Coss<br>0 0 Crss<br>0 2 4 6 8 Qg(nC) 0 5 10 15 20 25 VDS(V)<br>**----- End of picture text -----**<br>


**Figure 10. Normalized gate threshold voltage vs temperature** 

**Figure 11. Normalized on-resistance vs temperature** 

**==> picture [462 x 176] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGS(th) AM10336v1 RDS(on) AM10337v1<br>(norm) (norm)<br>ID=7.5A<br>ID=250µA VGS=10V<br>1.2 1.6<br>1.0 1.6<br>0.8 1.2<br>0.6 0.8<br>0.4 0.4<br>-75 -25 25 75 125 TJ(°C) -75 -25 25 75 125 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 12. Source-drain diode forward characteristics** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
VSD AM10338v1<br>(V)<br>TJ=-55°C<br>0.9<br>TJ=25°C<br>0.8<br>0.7<br>0.6 TJ=150°C<br>0.5<br>4 6 8 10 12 14 ISD(A)<br>**----- End of picture text -----**<br>


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**Test circuits** 

## **3 Test circuits** 

**Figure 13. Switching times test circuit for resistive load** 

**Figure 14. Gate charge test circuit** 

**==> picture [462 x 162] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDD<br>12V 47kΩ<br>1kΩ<br>100nF<br>RL 2200 3.3<br>μF μF<br>VDD IG=CONST<br>VD Vi=20V=VGMAX 100Ω D.U.T.<br>VGS<br>2200<br>RG D.U.T. μF 2.7kΩ VG<br>PW<br>47kΩ<br>1kΩ<br>PW<br>AM01468v1 AM01469v1<br>**----- End of picture text -----**<br>


**Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test circuit switching and diode recovery times** 

**==> picture [462 x 346] intentionally omitted <==**

**----- Start of picture text -----**<br>
L<br>A A A<br>D<br>FAST L=100μH VD<br>G D.U.T. DIODE 2200 3.3<br>S B 3.3 1000 μF μF VDD<br>25 Ω B B D μF μF VDD ID<br>G<br>RG S<br>Vi D.U.T.<br>Pw<br>AM01470v1 AM01471v1<br>Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform<br>V(BR)DSS ton toff<br>VD tdon tr tdoff tf<br>90% 90%<br>IDM<br>10%<br>ID 0 10% VDS<br>VDD VDD 90%<br>VGS<br>AM01472v1 0 10% AM01473v1<br>**----- End of picture text -----**<br>


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**Package mechanical data** 

## **4 Package mechanical data** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _www.st.com_ . ECOPACK[®] is an ST trademark. 

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**Package mechanical data** 

**==> picture [405 x 480] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 19. PowerFLAT™ 5x6 type S-R drawing<br>5 8<br>Bottom View<br>Pin 1<br>identification<br>4 1<br>Side View<br>4 1 Pin 1<br>identification<br>Top View<br>5 8<br>8231817_Rev_I_type S-R<br>.<br>**----- End of picture text -----**<br>


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**Package mechanical data** 

**Table 8. PowerFLAT 5x6 type S-R mechanical data** 

||**Table 8. PowerFLAT 5x6 type S-R mechanical data**|**Table 8. PowerFLAT 5x6 type S-R mechanical data**|**Table 8. PowerFLAT 5x6 type S-R mechanical data**|
|---|---|---|---|
|**Dim.**|**mm**|||
||**Min.**|**Typ.**|**Max.**|
|A|0.80||1.00|
|A1|0.02||0.05|
|A2||0.25||
|b|0.30||0.50|
|D|5.00|5.20|5.40|
|D2|4.11||4.31|
|E|5.95|6.15|6.35|
|e||1.27||
|E2|3.50||3.70|
|E3|2.35||2.55|
|E4|0.40||0.60|
|E5|0.08||0.28|
|K|1.275||1.575|
|L|0.60||0.80|



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**Package mechanical data** 

**==> picture [166 x 11] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 20. Recommended footprint<br>**----- End of picture text -----**<br>


**==> picture [405 x 347] intentionally omitted <==**

**----- Start of picture text -----**<br>
Footprint<br>**----- End of picture text -----**<br>


_Note: All dimensions are in mm_ 

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**Packaging mechanical data** 

## **5 Packaging mechanical data** 

## **Figure 21. PowerFLAT™ 5x6 tape[(a)]** 

**==> picture [405 x 257] intentionally omitted <==**

**----- Start of picture text -----**<br>
P 2 P 0<br>(0.30 T ±0.05) Do 2.0±0.1 (I) 4.0±0.1 (II) E1<br>Ø1.55±0.05 Y 1.75±0.1<br>D1<br>Ø1.5 MIN.<br>CL<br>Y<br>P1(8.00±0.1) Ao(6.30±0.1)<br>Ko (1.20±0.1)<br>SECTION Y-Y<br>(I) Measured from centerline of sprocket holeto centerline of pocket. Base and bulk quantity 3000 pcs<br>(II) Cumulative tolerance of 10 sprocket<br>holes is ± 0.20 .<br>(III) Measured from centerline of sprocket<br>hole to centerline of pocket.<br>8234350_Tape_rev_C<br>REF.R0.50<br>REF 0.20<br>))((IIIF5.50±0.1 )(W12.00±0.3<br>5.30±0.1)(Bo<br>**----- End of picture text -----**<br>


## **Figure 22. PowerFLAT™ 5x6 package orientation in carrier tape.** 

**==> picture [386 x 143] intentionally omitted <==**

**----- Start of picture text -----**<br>
Pin 1<br>identification<br>**----- End of picture text -----**<br>


a. All dimensions are in millimeters. 

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**Packaging mechanical data** 

**==> picture [158 x 11] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 23. PowerFLAT™ 5x6 reel<br>**----- End of picture text -----**<br>


**==> picture [405 x 256] intentionally omitted <==**

**----- Start of picture text -----**<br>
R0.60<br>W3<br>PART NO. 11.9/15.4<br>1 .90<br>2.50<br>W2<br>18.4 (max)<br>R25.00<br>   ØN    A<br>4.00 178(±2.0) 330 (+0/-4.0)<br>2.50<br>ESD LOGO<br>W1<br>12.4 (+2/-0)<br>ØA<br>R1.10<br>Ø21.2<br>All dimensions are in millimeters<br>13.00<br>CORE DETAIL<br>8234350_Reel_rev_C<br>128<br>77<br>ATTENTION OBSERVE PRECAUTIONS FOR HANDLING ELECTROSTATIC SENSITIVE DEVICES<br>2.20<br>06PS<br>**----- End of picture text -----**<br>


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**Revision history** 

## **6 Revision history** 

**Table 9. Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|24-Jan-2011|1|First release.|
|01-Jul-2011|2|Document status promoted from preliminary data to datasheet.|
|27-Apr-2012|3|Added EASvalue in_Table 2: Absolute maximum ratings_.<br>Updated_Table 3: Thermal resistance_,_Table 4: On/off states_,_Table 5:_<br>_Dynamic_and_Table 7: Source drain diode_.<br>Minor text changes.|
|13-Feb-2013|4|– Added:_Section 5: Packaging mechanical data_.<br>– Updated_Section 4: Package mechanical data_.|
|25-Jul-2014|5|– Modified: title, features and description in cover page<br>– Modified: ISDand ISDMmax values in_Table 7_<br>– Updated:_Figure 2_and_3_<br>– Updated:_Figure 13_,_14_,_15_and_16_<br>– Updated:_Section 4: Package mechanical data_<br>– Minor text changes|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2014 STMicroelectronics – All rights reserved 

16/16 DocID18415 Rev 5 



## Links

- [View this product on Novapart](https://novapart.co/products/STL56N3LLH5/power-mosfet-n-channel-30-v-56-a-7600-ohm)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/stmicroelectronics/stl56n3llh5/mosfet-n-ch-30v-56a-150deg-c-62/dp/3367059RL)
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